DATA SHEET
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MOSFET – Power, Single
N-Channel
V(BR)DSS
RDS(ON) MAX
2.4 mW @ 10 V
60 V
60 V, 2.4 mW, 150 A
ID MAX
150 A
3.3 mW @ 4.5 V
NVMFS5C628NL
D (5)
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS5C628NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25°C
Power Dissipation
RqJC (Note 1)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
Pulsed Drain Current
Value
Unit
VDSS
60
V
VGS
±20
V
ID
150
A
TC = 100°C
TC = 25°C
110
PD
TC = 100°C
TA = 25°C
Power Dissipation
RqJA (Notes 1 & 2)
Symbol
Steady
State
56
ID
TA = 100°C
TA = 25°C
W
110
A
28
20
PD
TA = 100°C
W
3.7
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
D
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = 5C628L
XXXXXX = (NVMFS5C628NL) or
XXXXXX = 628LWF
XXXXXX = (NVMFS5C628NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
1.9
IDM
900
A
ORDERING INFORMATION
TJ, Tstg
−55 to
+ 175
°C
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
IS
120
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 9 A)
EAS
565
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
1.3
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
40
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2016
February, 2022 − Rev. 3
1
Publication Order Number:
NVMFS5C628NL/D
NVMFS5C628NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
60
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
26
VGS = 0 V,
VDS = 60 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 135 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.2
2.0
−5.0
VGS = 10 V
ID = 50 A
2.0
2.4
VGS = 4.5 V
ID = 50 A
2.6
3.3
gFS
VDS =15 V, ID = 50 A
V
mV/°C
110
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
3600
VGS = 0 V, f = 1 MHz, VDS = 25 V
1700
pF
28
Total Gate Charge
QG(TOT)
VGS = 4.5 V, VDS = 48 V; ID = 50 A
24
nC
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 48 V; ID = 50 A
52
nC
Threshold Gate Charge
QG(TH)
6.0
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Plateau Voltage
VGP
3.0
td(ON)
10
VGS = 10 V, VDS = 48 V; ID = 50 A
12
nC
4.5
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 10 V, VDS = 48 V,
ID = 50 A, RG = 2.5 W
tf
55
ns
37
8.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 50 A
TJ = 25°C
0.8
TJ = 125°C
0.75
tRR
ta
tb
1.2
V
55
VGS = 0 V, dIs/dt = 100 A/ms,
IS = 50 A
QRR
28
ns
28
60
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS5C628NL
TYPICAL CHARACTERISTICS
250
225
3.6 V
225
ID, DRAIN CURRENT (A)
200
175
150
3.2 V
125
100
75
2.8 V
50
25
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
0
0
1.0
2.0
3.0
150
125
100
TJ = 25°C
75
50
4.0
TJ = 125°C
0
2.5
3.0
5
4
3
2
3
4
5
7
6
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
4.0
3.5
Figure 2. Transfer Characteristics
6
3.0
TJ = 25°C
2.8
VGS = 4.5 V
2.6
2.4
2.2
VGS = 10 V
2.0
1.8
1.6
0
20
40
60
80
100
120
140
160
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.E+06
2.0
VGS = 10 V
ID = 50 A
TJ = 175°C
1.E+05
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
2.0
Figure 1. On−Region Characteristics
7
1.6
1.4
1.2
1.0
1.E+04
TJ = 125°C
1.E+03
TJ = 85°C
1.E+02
0.8
0.6
−50
1.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
8
1.8
1.0
0.5
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 50 A
2
175
0
9
1
VDS = 5 V
200
25
2.4 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
250
VGS = 4.0 V to 10 V
−25
0
25
50
75
100
125
150
175
1.E+01
5
15
25
35
45
55
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS5C628NL
C, CAPACITANCE (pF)
10000
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
CISS
COSS
1000
100
10
VGS = 0 V
TJ = 25°C
f = 1 MHz
1
0.1
CRSS
0
10
20
30
40
60
50
5
QGD
QGS
4
3
VDS = 48 V
TJ = 25°C
ID = 50 A
2
1
0
0
20
10
40
30
50
Figure 8. Gate−to−Source vs. Total Charge
100
IS, SOURCE CURRENT (A)
t, TIME (ns)
7
6
Figure 7. Capacitance Variation
tf
tr
100
td(on)
10
VGS = 10 V
VDS = 48 V
ID = 50 A
1
10
VGS = 0 V
10
1
TJ = 125°C
0.1
100
0.3
0.4
0.5
TJ = 25°C
0.6
0.7
TJ = −55°C
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
1000
1 ms
10 ms
100
500 ms
IPEAK, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
8
QG, TOTAL GATE CHARGE (nC)
td(off)
10
TC = 25°C
VGS ≤ 10 V
Single Pulse
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
0.01
QT
9
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
1
10
0.1
1
TJ (initial)= 25°C
10
TJ (initial)= 100°C
1
10
100
1.E−05
1.E−04
1.E−03
1.E−02
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TAV, TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NVMFS5C628NL
TYPICAL CHARACTERISTICS
ZqJA, EFFECTIVE TRANSIENT THERMAL
RESISTANCE (°C/W)
100
50% Duty Cycle
10 20%
10%
5%
1 2%
1%
0.1
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
Marking
Package
Shipping†
NVMFS5C628NLT1G
5C628L
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS5C628NLWFT1G
628LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
NVMFS5C628NLT3G
5C628L
DFN5
(Pb−Free)
5000 / Tape & Reel
NVMFS5C628NLWFT3G
628LWF
DFN5
(Pb−Free, Wettable Flanks)
5000 / Tape & Reel
NVMFS5C628NLAFT1G
5C628L
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS5C628NLWFAFT1G
628LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
DATE 25 JUN 2018
SCALE 2:1
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
A1
4
TOP VIEW
C
DETAIL A
0.10 C
SEATING
PLANE
A
0.10 C
SIDE VIEW
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
GENERIC
MARKING DIAGRAM*
DETAIL A
1
0.10
b
C A B
0.05
c
8X
XXXXXX
AYWZZ
e/2
e
L
1
4
K
RECOMMENDED
SOLDERING FOOTPRINT*
E2
PIN 5
(EXPOSED PAD)
L1
M
2X
0.495
4.560
2X
1.530
G
D2
2X
BOTTOM VIEW
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
0.475
3.200
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
1.330
STYLE 2:
2X
PIN 1. ANODE
0.905
2. ANODE
3. ANODE
4. NO CONNECT
0.965
5. CATHODE
1
4X
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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