NVTFS5811NLWFTWG

NVTFS5811NL MOSFET – Power, Single N-Channel 40 V, 6.7 mW, 40 A Features • • • • • • Small Footprint (3.3 x 3.3 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses NVTFS5811NLWF − Wettable Flanks Product AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) MAX ID MAX 6.7 mW @ 10 V 40 V 10 mW @ 4.5 V 40 A MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V ID 40 A Continuous Drain Current RYJ−mb (Notes 1, 2, 3, 4) Power Dissipation RYJ−mb (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1 & 3, 4) Power Dissipation RqJA (Notes 1, 3) Pulsed Drain Current Tmb = 25°C Steady State Tmb = 100°C Tmb = 25°C TA = 25°C Steady State ID Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL(pk) = 36 A, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) MARKING DIAGRAM A 16 11 PD W 3.2 TA = 100°C TA = 25°C, tp = 10 ms S (1,2,3) 10 TA = 100°C TA = 25°C W 21 Tmb = 100°C D (5−8) G (4) 28 PD N−Channel MOSFET 1.6 IDM 354 A TJ, Tstg −55 to +175 °C IS 17 A EAS 65 mJ 1 WDFN8 (m8FL) CASE 511AB XXXX A Y WW G 1 S S S G XXXX AYWWG G D D D D = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. THERMAL RESISTANCE MAXIMUM RATINGS (Note 1) Parameter Junction−to−Mounting Board (top) − Steady State (Note 2 and 3) Junction−to−Ambient − Steady State (Note 3) Symbol Value Unit RYJ−mb 7.2 °C/W RqJA 47 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2013 August, 2019 − Rev. 2 1 Publication Order Number: NVTFS5811NL/D NVTFS5811NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = 250 mA 40 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current VGS = 0 V, VDS = 40 V V TJ = 25°C 1.0 TJ = 125°C 10 mA IGSS VDS = 0 V, VGS = "20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA 2.2 V Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 20 A 5.8 6.7 mW VGS = 4.5 V, ID = 20 A 8.8 10 gFS VDS = 5 V, ID = 10 A 24.6 S Input Capacitance Ciss 1570 pF Output Capacitance Coss VGS = 0 V, f = 1.0 MHz, VDS = 25 V Reverse Transfer Capacitance Crss 157 Total Gate Charge QG(TOT) 17 nC Threshold Gate Charge QG(TH) 1 nC Gate−to−Source Charge QGS Gate−to−Drain Charge QGD "100 nA ON CHARACTERISTICS (Note 5) Forward Transconductance 1.5 CHARGES AND CAPACITANCES Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 32 V, ID = 20 A, RG = 2.5 W 215 5 9 VGS = 10 V, VDS = 32 V, ID = 20 A 30 nC 11 ns SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = 4.5 V, VDS = 32 V, ID = 20 A, RG = 2.5 W tf 55 20 40 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.83 TJ = 125°C 0.70 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 20 A 22 VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A QRR http://onsemi.com 2 V ns 12 10 17 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 6. Switching characteristics are independent of operating junction temperatures. 1.2 nC NVTFS5811NL TYPICAL CHARACTERISTICS ID, DRAIN CURRENT (A) 80 4.0 V 60 3.8 V 50 3.6 V 40 30 3.4 V 20 3.2 V 10 0 1 2 3 4 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 60 50 40 30 TJ = 25°C 20 0 5 1 2 3 4 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.016 ID = 20 A TJ = 25°C 0.012 0.010 0.008 0.006 0.004 2 4 6 10 8 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.012 TJ = 25°C 0.010 VGS = 10 V 0.006 0.004 0.002 5 10 15 20 25 30 35 40 45 50 55 60 65 70 ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100000 2.00 VGS = 0 V ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VGS = 4.5 V 0.008 Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.80 5 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics 0.014 TJ = −55°C TJ = 125°C 10 3.0 V 0 VDS ≥ 10 V 70 4.2 V VGS = 5 V 70 80 TJ = 25°C 4.6 V 10 V 90 ID, DRAIN CURRENT (A) 100 1.60 10000 1.40 1.20 1.00 TJ = 150°C TJ = 125°C 1000 0.80 0.60 −50 −25 0 25 50 75 100 125 150 175 100 10 20 30 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 40 NVTFS5811NL TYPICAL CHARACTERISTICS 10 2000 VGS = 0 V 1800 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 2200 TJ = 25°C Ciss 1600 1400 1200 1000 800 600 400 Coss 200 0 Crss 0 10 20 30 DRAIN−TO−SOURCE VOLTAGE (V) 40 QT 8 6 4 Qgs 2 0 VDS = 32 V ID = 20 A TJ = 25°C 0 5 Figure 7. Capacitance Variation IS, SOURCE CURRENT (A) t, TIME (ns) 100 tr tf td(off) 10 td(on) 1 10 RG, GATE RESISTANCE (W) 100 40 30 20 10 0 0.5 10 ms 100 ms 1 ms 10 ms RDS(on) Limit Thermal Limit Package Limit 0.1 dc 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (A) VGS = 10 V Single Pulse TC = 25°C 10 0.6 0.7 0.8 0.9 VSD, SOURCE−TO−DRAIN VOLTAGE (V) 1.0 Figure 10. Diode Forward Voltage vs. Current 1000 0.1 30 VGS = 0 V TJ = 25°C 50 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 1 25 60 VDD = 32 V ID = 20 A VGS = 4.5 V 100 10 15 20 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source Voltage vs. Total Charge 1000 1.0 Qgd 100 60 ID = 36 A 50 40 30 20 10 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 175 NVTFS5811NL TYPICAL CHARACTERISTICS RqJA(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 100 Duty Cycle = 0.5 10 1 0.2 0.1 0.05 0.02 0.01 0.1 0.01 0.000001 Single Pulse 0.00001 0.0001 0.001 0.01 0.1 PULSE TIME (sec) 1 10 100 1000 Figure 13. Thermal Response DEVICE ORDERING INFORMATION Marking Package Shipping† NVTFS5811NLTAG 5811 WDFN8 (Pb−Free) 1500 / Tape & Reel NVTFS5811NLWFTAG 11LW WDFN8 (Pb−Free) 1500 / Tape & Reel NVTFS5811NLTWG 5811 WDFN8 (Pb−Free) 5000 / Tape & Reel NVTFS5811NLWFTWG 11LW WDFN8 (Pb−Free) 5000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511AB ISSUE D 1 SCALE 2:1 DATE 23 APR 2012 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A D1 B 2X 0.20 C 8 7 6 5 4X E1 E q c 1 2 3 4 A1 TOP VIEW 0.10 C A e SIDE VIEW 0.10 8X b C A B 0.05 C 4X DETAIL A 8X e/2 1 0.42 4 INCHES NOM 0.030 −−− 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.009 0.012 0.026 BSC 0.012 0.016 0.026 0.032 0.012 0.017 0.002 0.005 0.055 0.059 0_ −−− MIN 0.028 0.000 0.009 0.006 MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.016 0.020 0.037 0.022 0.008 0.063 12 _ 0.65 PITCH PACKAGE OUTLINE 4X 0.66 M E3 8 5 D2 BOTTOM VIEW 1 3.60 L1 GENERIC MARKING DIAGRAM* XXXXX A Y WW G MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 −−− 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.23 0.30 0.40 0.65 BSC 0.30 0.41 0.51 0.65 0.80 0.95 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ −−− 12 _ SOLDERING FOOTPRINT* L G SEATING PLANE DETAIL A K E2 C 6X 0.10 C DIM A A1 b c D D1 D2 E E1 E2 E3 e G K L L1 M q XXXXX AYWWG G 0.75 2.30 0.57 0.47 2.37 3.46 DIMENSION: MILLIMETERS = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DOCUMENT NUMBER: DESCRIPTION: 98AON30561E WDFN8 3.3X3.3, 0.65P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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