AN77L08

Voltage Regulators AN77L00/AN77L00M Series 3-pin Low Power Loss Voltage Regulato r 100mA Type) ( s Overview The AN77L00/AN77L00M series is a stabilized constant voltage power supply with a low input/output voltage(0.3V max.). It is suitable for the low-voltage equipment using batteries, and consumer/industrial equipment with great fluctuation of the supply voltage. A wide range of output voltage is available from 3V through 10V. AN77L00 Series 5.0±0.2 5.1±0.2 4.0±0.2 Unit : mm s Features • Minimum input/output voltage difference : 0.3V(max.) • Built-in overcurrent limiting circuit • Built-in rush current preventive circuit at saturation voltage rise time • Built-in overheat protective circuit • Built-in input short-circuit protective circuit 2.54 0.45 – 0.1 +0.2 13.5±0.5 2.3±0.2 2 31 3-pin SIL Plastic Package (TO-92) (SSIP003-P-0000) AN77L00M Series Unit : mm 4.6max. 1.8max. 4.25max. 2.6max. 1.6max. 2.6 4.5 0.48max. 0.58max. 1.5 3.0 1 2 3 3-pin SIL Mini Power Type Plastic Package (TO-220F) (SSIP003-P-0000D) 0.8min. 0.44max. 1 AN77L00/AN77L00M Series s Block Diagram Voltage Regulators Input Short-Circuit Protection Over Current Protection Error Amp. + – Voltage Reference Over Current Protection Starter Rush Current Protection Thermal Protection 3 IN (1) 2 GND (3) 1 OUT (2) The pin numbers in are for the AN77L00M series. The pin numbers in ( ) are for the AN77L00 series. s Absolute Maximum Ratings (Ta=25˚C) Parameter Supply voltage Supply current Power dissipation Note1) Operating ambient temperature Storage temperature Note 1) Symbol VIN IIN PD Topr Tstg Rating 30 200 650 –30 to + 85 –55 to + 150 Unit V mA mW ˚C ˚C s Recommended Operating Range (Ta= 25˚C) Part No. AN77L03/M AN77L035/M AN77L04/M AN77L045/M AN77L05/M AN77L06/M AN77L07/M AN77L08/M AN77L09/M AN77L10/M AN77L12/M Output voltage (VO) 3 3.5 4 4.5 5 6 7 8 9 10 12 Operating supply voltage range (VI) VO + 0.3 to 13.62 VO + 0.41 to 14.14 VO + 0.3 to 14.66 VO + 0.43 to 15.18 VO + 0.3 to 15.7 VO + 0.46 to 16.74 VO + 0.48 to 17.78 VO + 0.51 to 18.82 VO + 0.53 to 19.86 VO + 0.55 to 20.9 VO + 0.6 to 22.98 Unit V V V V V V V V V V V 2 Voltage Regulators s Electrical Characteristics (Ta=25˚C) • AN77L03/M (3V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C Condition AN77L00/AN77L00M Series min 2.88 typ 3 2 8 0.9 3 1.5 max 3.12 60 60 1.5 5 5 0.25 0.3 Unit V mV mV mA mA mA dB V V µV mV/˚C VI=3.62 to 13.62V, Tj=25˚C IO=0 to 100mA, Tj=25˚C IO=0mA, Tj=25˚C IO=0 to 100mA, Tj=25˚C VI=2.7V, IO=0mA, Tj=25˚C VI=3.62 to 5.62V, f=120Hz VI=2.7V, IO=50mA, Tj=25˚C VI=2.7V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 60 70 0.12 0.22 70 0.2 Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=4V, IO=50mA, CO=10µF unless otherwise specified. • AN77L035/M (3.5V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI= 4.14 to 14.14V, Tj=25˚C IO= 0 to 100mA, Tj= 25˚C IO= 0mA, Tj= 25˚C IO= 0 to 100mA, Tj= 25˚C VI= 3.15V, IO= 0mA, Tj=25˚C VI= 4.14 to 6.14V, f=120Hz VI= 3.15V, IO= 50mA, Tj= 25˚C VI= 3.15V, IO=100mA, Tj= 25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 59 Condition min 3.36 typ 3.5 3 9 0.9 3 1.5 69 0.12 0.22 75 0.23 0.25 0.41 max 3.64 60 60 1.5 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=4.5V, IO=50mA, CO=10µF unless otherwise specified. • AN77L04/M (4V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI= 4.66 to 14.66V, Tj= 25˚C IO= 0 to 100mA, Tj= 25˚C IO= 0mA, Tj= 25˚C IO= 0 to 100mA, Tj=25˚C VI=3.6V, IO= 0mA, Tj= 25˚C VI= 4.66 to 6.66V, f=120Hz VI=3.6V, IO=50mA, Tj= 25˚C VI=3.6V, IO=100mA, Tj= 25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 59 Condition min 3.84 typ 4 3 9 0.9 3 1.5 69 0.12 0.23 80 0.26 0.25 0.3 max 4.16 60 60 1.5 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=5V, IO=50mA, CO=10µF unless otherwise specified. 3 AN77L00/AN77L00M Series s Electrical Characteristics (Ta=25˚C) • AN77L045/M (4.5V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI=5.18 to 15.18V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 4.05V, IO= 0mA, Tj=25˚C VI=7.18 to 6.18V, f=120Hz VI= 4.05V, IO=50mA, Tj=25˚C VI= 4.05V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 58 Condition min 4.32 Voltage Regulators typ 4.5 3 10 0.9 3 1.5 68 0.12 0.23 85 0.3 max 4.68 60 60 1.5 5 5 0.25 0.43 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=5.5V, IO=50mA, CO=10µF unless otherwise specified. • AN77L05/M (5V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI=5.7 to 15.7V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 4.5V, IO= 0mA, Tj=25˚C VI= 5.7 to 7.7V, f=120Hz VI= 4.5V, IO= 50mA, Tj=25˚C VI= 4.5V, IO= 100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 58 Condition min 4.8 typ 5 4 10 0.9 3 1.5 68 0.12 0.24 90 0.33 0.25 0.3 max 5.2 60 60 1.5 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=6V, IO=50mA, CO=10µF unless otherwise specified. • AN77L06/M (6V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI= 6.74 to 16.74V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 5.4V, IO= 0mA, Tj=25˚C VI= 6.74 to 8.74V, f=120Hz VI=5.4V, IO=50mA, Tj=25˚C VI=5.4V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 56 Condition min 5.76 typ 6 4 11 0.9 3 1.5 66 0.12 0.25 105 0.4 0.25 0.46 max 6.24 60 60 1.5 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=7V, IO=50mA, CO=10µF unless otherwise specified. 4 Voltage Regulators s Electrical Characteristics (Ta=25˚C) • AN77L07/M (7V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min)1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C Condition AN77L00/AN77L00M Series min 6.72 typ 7.0 5 11 1.1 3 1.5 max 7.28 70 70 1.6 5 5 0.25 0.48 Unit V mV mV mA mA mA dB V V µV mV/˚C VI=7.78 to 17.78V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 6.3V, IO= 0mA, Tj=25˚C VI=7.78 to 9.78V, f=120Hz VI= 6.3V, IO= 50mA, Tj=25˚C VI= 6.3V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 55 65 0.12 0.26 120 0.46 Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI= 8V, IO=50mA, CO=10µF unless otherwise specified. • AN77L08/M (8V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min)1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI= 8.82 to 18.82V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI=7.2V, IO= 0mA, Tj=25˚C VI= 8.82 to 10.82V, f=120Hz VI=7.2V, IO=50mA, Tj= 25˚C VI=7.2V, IO=100mA, Tj= 25˚C f=10Hz to 100kHz Tj= –30 to +125˚C 53 Condition min 7.68 typ 8 5 12 1.1 3 1.5 63 0.12 0.27 135 0.53 0.25 0.51 max 8.32 80 80 1.6 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=9V, IO=50mA, CO=10µF unless otherwise specified. • AN77L09/M (9V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI=9.86 to 19.86V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI=8.1V, IO= 0mA, Tj=25˚C VI=9.86 to 11.86V, f=120Hz VI=8.1V, IO= 50mA, Tj=25˚C VI=8.1V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj=–30 to+125˚C 52 Condition min 8.64 typ 9 6 13 1.2 3 1.5 62 0.13 0.28 150 0.6 0.25 0.53 max 9.36 90 90 1.7 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=10V, IO=50mA, CO=10µF unless otherwise specified. 5 AN77L00/AN77L00M Series s Electrical Characteristics (Ta=25˚C) • AN77L10/M (10V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI=10.9 to 20.9V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 9.0V, IO=0mA, Tj=25˚C VI=10.9 to 12.9V, f=120Hz VI= 9.0V, IO=50mA, Tj=25˚C VI= 9.0V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 50 Condition min 9.6 Voltage Regulators typ 10 7 14 1.2 3 1.5 60 0.13 0.29 165 0.67 max 10.4 100 100 1.7 5 5 0.25 0.55 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=11V, IO=50mA, CO=10µF unless otherwise specified. • AN77L12/M (12V, 100mA Type) Parameter Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Symbol VO REGIN REGL Ibias ∆Ibias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆VO/Ta Tj=25˚C VI=12.98 to 22.98V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI=10.8V, IO=0mA, Tj=25˚C VI=12.98 to 14.98V, f=120Hz VI=10.8V, IO=50mA, Tj=25˚C VI=10.8V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj=–30 to+125˚C 48 Condition min 11.52 typ 12 8 15 1.4 3 1.5 58 0.13 0.31 190 0.8 0.25 0.6 max 12.48 120 120 1.9 5 5 Unit V mV mV mA mA mA dB V V µV mV/˚C Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms)and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=13V, IO=50mA, CO=10µF unless otherwise specified. s Application Circuit VI VO AN77L00/M series 0.33µF + – 10µF • For the AN77L00/M series, the gain inside the IC is set high to improve the performance. For the reason, use the capacitor of 10µF or more when the power line in the output side should be long. In addition, install the capacitor in the output side as near as possible to the IC. 6 Voltage Regulators s Characteristics Curve Input/Output Characteristics VO —VI AN77L03/M IO=50mA 5 AN77L00/AN77L00M Series Input Stability VO —VI AN77L03/M IO=50mA Rush Current (Under No Load) II —VI 3 AN77L03/M IO= 0A Output Voltage VO (V) Output Voltage VO (V) Input Current II (mA) 3.02 4 2 3.01 3 3.00 2 1 2.99 1 2.98 0 0 1 2 3 4 5 0 0 10 20 30 0 0 1 2 3 4 5 Input Voltage VI (V) Input Voltage VI (V) Input Voltage VI (V) Bias Current Ibias — IO AN77L03/M VI=4V 5 3.02 Load Stability VO —IO AN77L03/M VI=4V Over-current Limiting Characteristics VO —IO AN77L03/M VI=4V IO(short)=200mA (typ) 5 Output Voltage VO (V) 4 3.01 Output Voltage VO (V) Bias Current Ibias (mA) 4 3 3.00 3 2 2.99 2 1 2.98 1 0 1 50 100 0 0 50 100 0 0 100 200 300 Output Current IO (mA) Output Current IO (mA) Output Voltage IO (mA) Minimum Input/Output Voltage Difference VDIF (min) (V) Minimum Input/Output Voltage Difference VDIF (min) — IOUT 0.5 AN77L03/M VI=2.88V 0.4 100 Ripple Rejection Ratio RR — f AN77L03/M IO=50mA Output Voltage Temperature Characteristics VO — Ta AN77L03/M VI= 4V IO= 0mA Ripple Rejection Ratio RR (dB) 80 3.10 0.3 60 Output Voltage VO (V) 0.2 40 3.00 0.1 20 0 0 50 100 0 10 100 1k 10k 100k 2.90 –25 0 25 50 75 Output Voltage IO (mA) Frequency f (Hz) Ambient Temperature Ta (˚C) 7 AN77L00/AN77L00M Series AN77L00 series [Power Dissipation (TO-92 Package)] PD —Ta 1.0 Voltage Regulators AN77L00M Series [Power Dissipation (TO-243 Package)] PD —Ta 1.0 Power Dissipation PD (W) Single Unit Rthj – a=190˚C/W PD=658mW (25˚C) 0.5 Power Dissipation PD (W) 0.5 0 0 25 50 75 85 100 125 150 0 0 25 50 75 85 100 125 150 Ambient Temperature Ta (˚C) Ambient Temperature Ta (˚C) Note) SM to printed board (glass epoxy board of 20 × 20 × 1.7mm with copper film of 1cm2 or more) s Precautions on Use 1. Input Short-Circuit Protection Circuit For the conventional Matsushita 3-pin regulators (such as of the AN8000 series), when DC input pin3 is shortcircuited with GND w in the normal operation condition, the potential of output pinq becomes higher than that of DC input pin and the electric charges which is charged in output capacitor CO flows in the input side, resulting in the breakage of elements. In the above case, the common silicon diode is connected as shown in the right figure (the dotted line). However, for the AN77L00/M series, since the protection circuit, which protects the elements from the discharging current, is incorporated in the internal circuit, the protection diode is not required. Not required (2) VI 3 (1) (3) CI 0.33µF 2 + – CO 10µF 1 VO Pin number in is for the AN77L00M series. Pin number in ( ) is for the AN77L00 series. Equivalent Series Resistance ESR (Ω) 2. Capacitor for External Compensation In order to secure the safety, the capacitor of 10 µF is required in the output side and it should be added as near as possible to output pin1 and GND 2. When it is used under low temperature, oscillation may occur due to the decrease of the aluminum electrolytic capacitor and increase of ESR. For the AN77L00/M, it is recommended that the tantalum capacitor or aluminum electrolytic capacitor whose serialconnected resistance equivalent with that of output capacitor CO has temperature characteristics within the recommended range specified in the right. 8

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, , ,   40 30 20 Recommended Range 10 0 20 40 60 80 100 50 Output Current IO (mA)