AN8049FHN

Voltage Regulators AN8049FHN 1.8-volt 3-channel step-up, step-down, and polarity inverting DC-DC converter control IC Unit: mm s Overview The AN8049FHN is a three-channel PWM DC-DC converter control IC that features low-voltage operation. This IC can form a power supply that provides two stepup outputs and one step-down or polarity inverted output with a minimal number of external components. Minimal operating supply voltage of this IC is as low as 1.8 V, so that it can operate from 2 dry-batteries. And also, it is housed in an ultrathin, 4-directionallead SMD-package whose thickness is 0.8 mm maximum and pin-pitch is 0.5 mm therefore it is most suitable for making a power supply small and thin. A 5.2±0.2 5.0±0.1 19 20 13 4.0±0.1 4.2±0.2 3.0±0.1 12 (1.10) 2.0±0.2 12 24 1 R0.3 7 8 8 0.80max. 0.50 , ,, , ,, 13 19 20 (1.10) 24 7 1 0.2±0.1 0.10 3- C 0. 3.0±0.2 4.0±0.1 5 B M SAB 0.10 S Seating plane 0.2±0.1 S s Features QFN024-P-0405 • Wide operating supply voltage range: 1.8 V to 14 V • High-precision reference voltage circuit — VREF pin voltage: ±1% — Error amplifier: ±1.5% • Ultrathin surface mounting package for miniaturized and thinner power supplies Package: QFN-24 0.5-mm lead pitch 5.4 mm × 4.4 mm × t 0.8 mm • Supports control over a wide output frequency range: 20 kHz to 1 MHz • On/off (sequence control) pins provided for each channel for easy sequence control setup • The negative supply error amplifier supports 0-volt input. Common-mode input voltage range: − 0.1 V to VCC −1.4 V This allows the number of external components to be reduced by two resistors. • Fixed duty factor: 86% However, the duty can be adjusted to anywhere from 0% to 100% with an external resistor. • Timer latch short-circuit protection circuit (charge current: 1.1 µA typical) • Low input voltage malfunction prevention circuit (U.V.L.O.) (operation start voltage: 1.67 V typical) • Standby function (active-high control input, standby mode current: 1 µA maximum) s Applications • Electronic equipment that requires a power supply system 1 AN8049FHN s Block Diagram CTL1 VREF OSC IN-1 DT1 VCC FB1 Voltage Regulators 22 21 14 5 2 15 Reference voltage supply VREF 1.26 V (Allowance: ±1%) 1.1 mA 7 50 kΩ Triangular wave generator Error amplifier 1 20 kΩ 1.26 V VCC 1.1 mA S.C.P. comp. 0.9 V 50 kΩ50 kΩ 0.7 V V 0.3 V On/off CC control 9 10 6 Off RB1 OUT1 50 kΩ PWM1 1.26 V S.C.P. FB3 23 18 U.V.L.O. RQ S Latch 1.26 V Error 16 amplifier 2 IN+3 17 IN−3 DT3 CTL3 24 3 Error amplifier 3 PWM3 30 kΩ 13 OUT3 VREF 1.1 mA 20 kΩ 1.26 V 20 kΩ VCC PWM2 8 11 RB2 OUT2 1.26 V 19 20 1.1 mA 1.26 V VREF 50 kΩ 1 CTL2 4 50 kΩ 12 30 kΩ GND IN−2 s Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 2 DT2 DT1 CTL3 CTL2 CTL1 Off VREF RB2 RB1 OUT1 OUT2 GND Description Pin No. 13 14 15 16 17 18 19 20 21 22 23 24 OUT3 VCC OSC IN+3 IN−3 FB3 IN−2 FB2 IN−1 FB1 S.C.P. DT3 Description DT2 FB2 Voltage Regulators s Absolute Maximum Ratings Parameter Supply voltage Off pin allowable application voltage Error amplifier input allowable application voltage *2 AN8049FHN Symbol VCC VOFF VIN Rating 14.2 14.2 VCC −50 +50 111 −30 to +85 −55 to +150 Unit V V V OUT1 and OUT2 pin output source current OUT3 pin output current Power dissipation *1 ISO(OUT) mA ISI(OUT) PD Topr Tstg mA mW °C °C Operating temperature Storage temperature Note) *1: Ta = 85°C. For the independent IC without a heat sink. *2: When VCC is less than 6 V, VIN−1 and VIN+2 must be VCC. s Recommended Operating Range Parameter Off pin application voltage OUT1 and OUT2 pin output source current OUT3 pin output current Timing resistance Timing capacitance Oscillator frequency Short-circuit protection time-constant setting capacitance Output current setting resistance Symbol VOFF ISO(OUT) ISI(OUT) RT CT fOUT CSCP RB Range 0 to 14 −40 (min.) 40 (max.) 3 to 33 100 to 1 000 20 to 1 000 1 000 (min.) 750 to 15 000 Unit V mA mA kW pF kHz pF Ω 3 AN8049FHN s Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C Parameter Reference voltage block Reference voltage Line regulation with input fluctuation Load regulation VREF temperature characteristics VREF pin short-circuit current U.V.L.O. block Circuit operation start voltage Error amplifier 1 block Input threshold voltage 1 Input bias current 1 High-level output voltage 1 Low-level output voltage 1 Output source current 1 Output sink current 1 VTH temperature characteristics 1 Open-loop gain 1 Error amplifier 2 block Input threshold voltage 2 Input bias current 2 High-level output voltage 2 Low-level output voltage 2 Output source current 2 Output sink current 2 VTH temperature characteristics 2 Open-loop gain 2 Error amplifier 3 block Input offset voltage Common-mode input voltage range Input bias current 3 High-level output voltag 3 Low-level output voltage 3 Output source current 3 Output sink current 3 Open-loop gain 3 VIO VICR IB3 VEH3 VEL3 ISO(FB)3 ISI(FB)3 AV3 VTH2 IB2 VEH2 VEL2 ISO(FB)2 ISI(FB)2 VTHdT2 AV2 Ta = −30°C to +85°C VTH1 IB1 VEH1 VEL1 ISO(FB)1 ISI(FB)1 VTHdT1 AV1 Ta = −30°C to +85°C VUON VREF Line Load VRFEdT IOC IREF = − 0.1 mA VCC = 1.8 V to 14 V IREF = −0.1 mA to −1 mA Ta = −30°C to +85°C Symbol Conditions Voltage Regulators Min Typ Max Unit 1.247  −20   1.26 2 −3 1 −10 1.273 20    V mV mV % mA 1.59 1.67 1.75 V 1.241  1.0  −38 0.5   1.26 0.1 1.2  −31  1.5 80 1.279 0.2 1.4 0.2 −24    V µA V µA mA % dB 1.241  1.0  −38 0.5   −6 − 0.1 − 0.6 1.0  −38 0.5  1.26 0.1 1.2  −31  1.5 80   − 0.3 1.2  −31  80 1.279 0.2 1.4 0.2 −24    V µA V µA mA % dB 6 VCC −1.4  1.4 0.2 −24   mV V µA V µA mA dB 4 Voltage Regulators s Electrical Characteristics (continued) at VCC = 2.4 V, CREF = 0.1 µF, Ta = 25°C Parameter Oscillator block Oscillator frequency Frequency supply voltage characteristics Frequency temperature characteristics Output 1 block Output duty factor 1 High-level output voltage 1 Low-level output voltage 1 Output source current 1 Output sink current 1 Pull-down resistor 1 Output 2 block Output duty factor 2 High-level output voltage 2 Low-level output voltage 2 Output source current 2 Output sink current 2 Pull-down resistor 2 Output 3 block Output duty factor 3 Output saturation voltage Du3 VO(SAT) RT = 7.5 kΩ, CT = 680 pF 80   0.8  VSCP = 0 V −1.3  86   Du2 VOH2 VOL2 RT = 7.5 kΩ, CT = 680 pF IO = −10 mA, RB = 1 kΩ IO = 10 mA, RB = 1 kΩ VO = 0.7 V, RB = 1 kΩ 80 VCC −1  −32 40 20 86   Du1 VOH1 VOL1 RT = 7.5 kΩ, CT = 680 pF IO = −10 mA, RB = 1 kΩ IO = 10 mA, RB = 1 kΩ VO = 0.7 V, RB = 1 kΩ 80 VCC −1  −32 40 20 86   fOUT fDV fDT RT = 7.5 kΩ, CT = 680 pF RT = 7.5 kΩ, CT = 680 pF RT = 7.5 kΩ, CT = 680 pF 170   Symbol Conditions Min AN8049FHN Typ Max Unit 190 1 3 210   kHz % % 92  0.2 −22  40 % V V mA mA kΩ ISO(OUT)1 VO = 0.7 V, RB = 1 kΩ ISI(OUT)1 RO1 −27  30 92  0.2 −22  40 % V V mA mA kΩ ISO(OUT)2 VO = 0.7 V, RB = 1 kΩ ISI(OUT)2 RO2 −27  30 92 0.2 % V Short-circuit protection circuit block Input standby voltage Input threshold voltage Input latch voltage Charge current Comparator threshold voltage On/off control block Input threshold voltage Off pin current CTL block Input threshold voltage Charge current Whole device Average consumption current Standby mode current ICC(OFF) ICC(SB) RB = 9.1 kΩ, duty = 50%   4.2  5.5 1 mA µA 5 VTHCTL ICTL VCTL = 0 V 1.07 −1.3 1.26 −1.0 1.47 −0.7 V µA VON(TH) IOFF VOFF = 5 V 0.7  1.0 35 1.3  V µA VSTBY VTHPC VIN ICHG VTHL 0.1 1.0 0.1 −0.7  V V V µA V 0.9  −1.0 1.26 AN8049FHN s Terminal Equivalent Circuit Pin No. 1 Equivalent circuit Description Voltage Regulators I/O I 7 20 15 50 kΩ 1 50 kΩ PWM2 DT2: Sets the channel 2 soft start time. Set the time by connecting a capacitor between this pin and ground. Note that although the channel 2 maximum on duty is set internally to 86%, the maximum on duty can be set to a value of 86% or less by inserting a resistor between this pin and ground, and can be set to a value of 86% or more by inserting a resistor between this pin and the VREF pin. DT1: Sets the channel 1 soft start time. Set the time by connecting a capacitor between this pin and ground. Note that although the channel 1 maximum on duty is set internally to 86%, the maximum on duty can be set to a value of 86% or less by inserting a resistor between this pin and ground, and can be set to a value of 86% or more by inserting a resistor between this pin and the VREF pin. CTL3: Controls the on/off state of channel 3. A delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. tDLY3 = 1.26 (V) × CCTL3 (µF)/1.1 (µA) (s) This pin can also be used to control the on/off state with an external signal. In that case, the allowable input voltage range is from 0 V to VCC. Note that during U.V.L.O. and timer latch operation, this pin is connected to ground through a 20 kΩ resistor. 2 7 22 15 50 kΩ 2 50 kΩ PWM1 3 I VCC 20 kΩ 1.1 µA High channel 3 operation 1.26 V is turned off. 3 6 Voltage Regulators s Terminal Equivalent Circuit (continued) Pin No. 4 Equivalent circuit Description AN8049FHN I/O I VCC 20 kΩ 1.1 µA High channel 2 operation 1.26 V is turned off. 4 CTL2: Controls the on/off state of channel 2. A delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. tDLY2 = 1.26 (V) × CCTL2 (µF)/1.1 (µA) (s) This pin can also be used to control the on/off state with an external signal. In that case, the allowable input voltage range is from 0 V to VCC. Note that during U.V.L.O. and timer latch operation, this pin is connected to ground through a 20 kΩ resistor. CTL1: Controls the on/off state of channel 1. A delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. tDLY1 = 1.26 (V) × CCTL1 (µF)/1.1 (µA) (s) This pin can also be used to control the on/off state with an external signal. In that case, the allowable input voltage range is from 0 V to VCC. Note that during U.V.L.O. and timer latch operation, this pin is connected to ground through a 20 kΩ resistor. Off: Controls the on/off state. When the input is high: normal operation (VOFF > 1.2 V) When the input is low: standby mode VOFF < 0.6 V) In standby mode, the total current consumption is held to under 1 µA. VREF: Outputs the internal reference voltage. The reference voltage is 1.26 V (allowance: ±1%) when VCC is 2.4 V and IREF is −0.1 mA. Insert a capacitor of at least 0.1 µF between VREF and ground for phase compensation. 5 I VCC 20 kΩ 1.1 µA High channel 1 operation 1.26 V is turned off. 5 6 I 6 100 kΩ Start and stop of internal circuits. 7 VCC O 7 7 AN8049FHN s Terminal Equivalent Circuit (continued) Pin No. 8 Equivalent circuit Description Voltage Regulators I/O I VCC RB2: Connection for a resistor that sets the channel 2 output source current. Use a resistor in the range 750 Ω to 1.5 kΩ. 11 200 Ω 8 9 VCC 30 kΩ RB1: Connection for a resistor that sets the channel 1 output source current. Use a resistor in the range 750 Ω to 1.5 kΩ. 10 200 Ω 9 30 kΩ I 10 VCC 9 ISO(OUT)1 10 30 kΩ OUT1: Push-pull output. The absolute maximum rating for the output source current is −50 mA. Connecting the external resistor to RB1 terminal allows this circuit to provide an output source current with excellent line regulation and minimal sample-tosample variations. O 11 VCC 8 ISO(OUT)2 11 30 kΩ OUT2: Push-pull output. The absolute maximum rating for the output source current is −50 mA. Connecting the external resistor to RB2 terminal allows this circuit to provide an output source current with excellent line regulation and minimal sample-tosample variations. O 12 12 GND: Ground.  8 Voltage Regulators s Terminal Equivalent Circuit (continued) Pin No. 13 Equivalent circuit VCC 13 AN8049FHN Description OUT3: Open-collector output. The absolute maximum rating for the output current is +50 mA. I/O O 14 14 VCC: Power supply terminal. Provide the operating supply voltage in the range 1.8 V to 14 V. OSC: Connection for the capacitor and resistor that determine the oscillator frequency. Use a capacitor in the range 100 pF to 1 000 pF and a resistor in the range 3 kΩ to 33 kΩ. Use an oscillator frequency in the range 20 kHz to 1 MHz. IN+3: Noninverting input to the error amplifier 3.  15 VCC Latch S Q 0.2 V R 15 16 VCC O I 17 17 1.5 kΩ 16 1.5 kΩ IN−3: Inverting input to the error amplifier 3. FB3: I 18 O 7 Output from the error amplifier 3. 16 17 31 µA OSC This circuit can provide a source PWM3 current of −31 µA or a sink current of 0.5 mA (minimum). 0.5 mA min. 18 19 IN−2: Inverting input to the error amplifier 2. I 14 19 1.5 kΩ 1.26 V 9 AN8049FHN s Terminal Equivalent Circuit (continued) Pin No. 20 Equivalent circuit Description FB2: Voltage Regulators I/O O VCC 31 µA OSC PWM2 Output from the error amplifier 2. This circuit can provide a source current of −31 µA or a sink current of 0.5 mA (minimum). 19 1.26 V 0.5 mA min. 20 21 14 IN−1: Inverting input to the error amplifier 1. I 21 1.5 kΩ 1.26 V 22 VCC 31 µA OSC PWM1 FB1: Output from the error amplifier 1. This circuit can provide a source current of −31 µA or a sink current of 0.5 mA (minimum). O 21 1.26 V 0.5 mA min. 22 23 VCC 1.1 µA S.C.P.: Connection for the capacitor that sets the timer latch short-circuit protection circuit time constant. Use a capacitor with a value of 1 000 pF or higher. The charge current ICHG is 1.1 µA typical. DT3: Sets the channel 3 soft start time. Set the time by connecting a capacitor between this pin and ground. Note that although the channel 3 maximum on duty is set internally to 86%, the maximum on duty can be set to a value of 86% or less by inserting a resistor between this pin and ground, and can be set to a value of 86% or more by inserting a resistor between this pin and the VREF pin. O 1.5 kΩ Latch S Q 1.26 V R Output shutoff 23 24 I 7 18 15 50 kΩ 24 50 kΩ PWM3 10 Voltage Regulators s Usage Notes AN8049FHN [1] Allowable power dissipation Since the power dissipation (P) in this IC increases proportionally with the supply voltage, applications must be careful to operate so that the loss does not exceed the allowable power dissipation, PD, for the package. Reference formula: P = (VCC−VBEQ1) × ISO(OUT)1 × Du1 ← Power dissipation in the channel 1 output stage +(VCC−VBEQ2) × ISO(OUT)2 × Du2 ← Power dissipation in the channel 2 output stage +VO(SAT)3 × IOUT3 × Du3 ← Power dissipation in the channel 3 output stage +VCC × ICC ← Power dissipation between VCC and ground