MN102H950F

MN102H950F Type Internal ROM type ROM (byte) RAM (byte) Package (Lead-free) Minimum Instruction Execution Time MN102H950F External  10K LQFP100-P-1414 [With main clock operated] 58 ns (at 3.0 V to 3.6 V, 34 MHz)  Interrupts /RST pin, Watchdog, /NMI pin, Timer counter 0 to 9 underflow, Timer counter 10 to 14 underflow, Timer counter 10 to 14 compare capture A, Timer counter 10 to 14 compare capture B, ATC ch.0 to ch.3 tra nsfer finish, External 0 to 4, Serial ch.0 to ch.4 tra nsmission, Serial ch.0 to ch.4 reception, A/D conversion finish Timer counter 0 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 8; TM0IO pin; system clock (BOSC) Interrupt source ........... underflow of timer counter 0 Timer counter 1 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 8, 9; timer counter 0 output Interrupt source ........... underflow of timer counter 1 Timer counter 2 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 8; TM2IO pin; timer counter 1 output Interrupt source ........... underflow of timer counter 2 Timer counter 3 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 8; TM3IO pin; timer counter 2 output Interrupt source ........... underflow of timer counter 3 Timer counter 4 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 9; TM4IO pin; system clock (BOSC) Interrupt source ........... underflow of timer counter 4 Timer counter 5 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 8, 9; timer counter 4 output Interrupt source ........... underflow of timer counter 5 Timer counter 6 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 9; TM6IO pin; timer counter 5 output Interrupt source ........... underflow of timer counter 6 Timer counter 7 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 9; TM7IO pin; timer counter 6 output Interrupt source ........... underflow of timer counter 7 Timer counter 8 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; system clock (BOSC); 1/4 of system clock (XI) frequency; TM8IO pin Interrupt source ........... underflow of timer counter 8 Timer counter 9 : 8-bit × 1 Clock source................ 1/2 of system clock (BOSC) frequency; underflow of timer counter 8; TM9IO pin; timer counter 8 output Interrupt source ........... underflow of timer counter 9 Timer counter 10 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ underflow of timer counter 8, 9; TM10IOB pin; 1/2 of system clock (BOSC) frequency; 2-phase encode of TM10IOA pin/TM10IOB pin (1 ×, 4 ×) Interrupt source ........... underflow of timer counter 10; timer counter 10 compare capture A; timer counter 10 compare capture B  Timer Counter MAE00021CEM MN102H950F Timer counter 11 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ underflow of timer counter 8, 9; TM11IOB pin; 1/2 of system clock (BOSC) frequency; 2-phase encode of TM11IOA pin/TM11IOB pin (1 ×, 4 ×) Interrupt source ........... underflow of timer counter 11; timer counter 11 compare capture A; timer counter 11 compare capture B Timer counter 12 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ underflow of timer counter 8, 9; TM12IOB pin; 1/2 of system clock (BOSC) frequency; 2-phase encode of TM12IOA pin/TM12IOB pin (1 ×, 4 ×) Interrupt source ........... underflow of timer counter 12; timer counter 12 compare capture A; timer counter 12 compare capture B Timer counter 13 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ underflow of timer counter 8, 9; TM13IOB pin; 1/2 of system clock (BOSC) frequency; 2-phase encode of TM13IOA pin/TM13IOB pin (1 ×, 4 ×) Interrupt source ........... underflow of timer counter 13; timer counter 13 compare capture A; timer counter 13 compare capture B Timer counter 14 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ underflow of timer counter 8, 9; TM14IOB pin; 1/2 of system clock (BOSC) frequency; 2-phase encode of TM14IOA pin/TM14IOB pin (1 ×, 4 ×) Interrupt source ........... underflow of timer counter 14; timer counter 14 compare capture A; timer counter 14 compare capture B  Serial interface Serial 0, 1 : 8-bit × 1 (transfer direction of MSB / LSB selectable, transmission / reception of 7, 8-bit length) Clock source................ 1/8 of timer counter 6 underflow frequency; 1/8, 1/2 of timer counter 0 underflow frequency; external pin Serial 2, 3 : 8-bit × 1 (transfer direction of MSB / LSB selectable, transmission / reception of 7, 8-bit length) Clock source................ 1/8 of timer counter 2 underflow frequency; 1/8, 1/2 of timer counter 4 underflow frequency; external pin UART × 4 (common use with serial 0 to 3) I²C × 2 (common use with serial 1,3; single master)  I/O Pins I/O 63 Common use : 43 (use of full address, address data separate 16-bit mode) Common use : 57 (use of address 16-bit, address data separate 8-bit mode) Common use : 56 (use of full address, address data multiplex 16-bit mode) Common use : 63 (use of address 16-bit, address data multiplex 8-bit mode)  A/D converter  D/A converter 8-bit × 4-ch. 10-bit × 12-ch. (with S/H)  PWM  ICR 16-bit × 5-ch. (timer counter 10 to 14) 16-bit × 5-ch. (timer counter 10 to 14) 16-bit × 5-ch. (timer counter 10 to 14) Address / data separate bus interface; 8 / 16-bit bus width selectable; SRAM interface Address / data multiplex bus interface support  OCR  Notes MAE00021CEM  Electrical Charactreistics (Supply current) Parameter Operating supply current Supply current at STOP Supply current at HALT0 Symbol IDDopr IDDS IDDH Condition Limit min typ max Unit VI = VDD or VSS, output open 60 mA f = 34 MHz , VDD = 3.3 V Pin with pull-up resistor is open all other input pins and 70 µA Hi-Z state input/output pins are simultaneously applied VDD or VSS level 30 mA f = 34 MHz , VDD = 3.3 V, output open (Ta = –40°C to +85°C , VDD = AVDD = 3.3 V , VSS = AVSS = 0 V)  Development tools In-circuit Emulator PX-ICE102H930F-LQFP100-P-1414  Pin Assignment A6, AD6 A5, AD5 A4, AD4 A3, AD3 A2, AD2 A1, AD1 A0, AD0 VDD P17, D15 P16, D14 P15, D13 P14, D12 P13, D11 P12, D10 P11, D9 P10, D8 VSS P07, D7 P06, D6 P05, D5 P04, D4 P03, D3 P02, D2 P01, D1 P00, D0 AD7, A7 AD8, A8 AD9, A9 AD10, A10 AD11, A11 VSS AD12, A12 AD13, A13 AD14, A14 AD15, A15 TM0O, A16, P40 TM2O, A17, P41 TM3O, A18, P42 TM4O, A19, P43 VDD AN0, A20, P44 AN1, A21, P45 STOP, AN2, A22, P46 WDOUT, AN3, A23, P47 /CS0 /CS1, P51 /CS2, P52 /CS3, P53 TM14IOA, /DMAREQ0, /BREQ, /WR, P54 TM14IOB, /DMAACK0, /BRACK, P55 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 MN102H950F ALE, P56 /WORD, P57 WAIT, P60 /RE /WEL, P62 /WEH, P63 VDD TM10IOA, /DMAREQ1, P80 TM10IOB, /DMAACK1, P81 TM11IOA, SBT2, P82 TM11IOB, SBI2, P83 TM12IOA, SBO2, P84 TM12IOB, SBT3, SCL3, P85 TM13IOA, SBI3, P86 TM13IOB, SBO3, SDA3, P87 AVDD DAC0, AN4, P90 DAC1, AN5, P91 DAC2, AN6, P92 DAC3, AN7, P93 AN8, P94 AN9, P95 AN10, P96 AN11, P97 AVSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 MODE OSCO OSCI VDD XO PB2, XI VSS PB1, /NMI VDD /RST PB0, BOSC PA5, ADSEP PA4, /IRQ4, TM14IC PA3, /IRQ3, TM13IC PA2, /IRQ2, TM12IC PA1, /IRQ1, TM11IC PA0, /IRQ0, TM10IC P77, TM9IO P76, TM8IO P75, SBO1, SDA1, TM7IO P74, SBI1, TM6IO P73, SBT1, SCL1, TM4IO P72, SBO0, TM3IO P71, SBI0, TM2IO P70, SBT0, TM0IO LQFP100-P-1414 MAE00021CEM Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 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