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74ALVC244D

74ALVC244D

  • 厂商:

    PHILIPS

  • 封装:

  • 描述:

    74ALVC244D - Octal buffer/line driver; 3-state - NXP Semiconductors

  • 数据手册
  • 价格&库存
74ALVC244D 数据手册
INTEGRATED CIRCUITS DATA SHEET 74ALVC244 Octal buffer/line driver; 3-state Product specification Supersedes data of 2003 Aug 11 2003 Sep 08 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 FEATURES • Wide supply voltage range from 1.65 to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption • Direct interface with TTL levels (2.7 to 3.6 V) • Power-down mode • Latch-up performance exceeds 250 mA • Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V) • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL tPHL/tPLH PARAMETER propagation delay nAn to nYn DESCRIPTION The 74ALVC244 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC244 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. CONDITIONS VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ TYPICAL 2.7 ns ns ns ns UNIT VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 2.0 VCC = 2.7 V; CL = 50 pF; RL = 500 Ω 2.3 VCC = 3.3 V; CL = 50 pF; RL = 500 Ω 2.2 CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 3.5 20 pF pF 2003 Sep 08 2 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER 74ALVC244D 74ALVC244PW 74ALVC244BQ PINNING PIN 1 2 3 4 5 6 7 8 9 10 SYMBOL 1OE 1A0 2Y0 1A1 2Y1 1A2 2Y2 1A3 2Y3 GND data input bus output data input bus output data input bus output data input bus output ground (0 V) DESCRIPTION output enable input (active LOW) TEMPERATURE RANGE −40 to +85 °C −40 to +85 °C −40 to +85 °C PINS 20 20 20 PACKAGE SO20 TSSOP20 DHVQFN20 MATERIAL plastic plastic plastic CODE SOT163-1 SOT360-1 SOT764-1 nAn L H X OUTPUT nYn L H Z PIN 11 12 13 14 15 16 17 18 19 20 SYMBOL 2A3 1Y3 2A2 1Y2 2A1 1Y1 2A0 1Y0 2OE VCC data input DESCRIPTION bus output data input bus output data input bus output data input bus output output enable input (active LOW) supply voltage 2003 Sep 08 3 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 handbook, halfpage 1OE 1 VCC 20 19 18 17 16 2OE 1Y0 2A0 1Y1 2A1 1Y2 2A2 1Y3 handbook, halfpage 1A0 1OE 1 1A0 2 2Y0 3 1A1 4 2Y1 5 1A2 6 2Y2 7 1A3 8 2Y3 9 GND 10 MNA162 2 3 4 5 20 VCC 19 2OE 18 1Y0 17 2A0 2Y1 16 1Y1 2Y0 1A1 244 GND(1) 1A2 2Y2 1A3 6 7 8 9 10 Top view GND 11 2A3 MNA981 15 2A1 14 1Y2 13 2A2 15 14 13 12 12 1Y3 11 2A3 2Y3 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage 1 EN 18 16 14 12 handbook, halfpage 2 17 4 15 6 13 8 11 1 19 1A0 2A0 1A1 2A1 1A2 2A2 1A3 2A3 1OE 2OE 1Y0 2Y0 1Y1 2Y1 1Y2 2Y2 1Y3 2Y3 18 3 16 5 14 7 12 9 2 4 6 8 19 EN 9 7 5 3 MNA169 11 13 MNA168 15 17 Fig.3 Logic symbol. Fig.4 IEE/IEC logic symbol. 2003 Sep 08 4 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 handbook, halfpage 1A0 2 1A1 4 1A2 1Y0 18 1Y1 16 1Y2 14 6 8 1 1A3 1OE 1Y3 12 2A0 17 2A1 15 2A2 2Y0 3 2Y1 5 2Y2 7 13 11 19 2A3 2OE 2Y3 9 MNA170 Fig.5 Logic diagram. 2003 Sep 08 5 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO PARAMETER supply voltage input voltage output voltage CONDITIONS 0 VCC = 1.65 to 3.6 V; enable mode 0 VCC = 1.65 to 3.6 V; disable mode 0 VCC = 0 V; Power-down mode Tamb tr, tf operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 3.6 V 0 −40 0 0 MIN. 1.65 3.6 3.6 VCC 3.6 3.6 +85 20 10 MAX. V V V V V °C ns/V ns/V UNIT LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO PARAMETER supply voltage input diode current input voltage output diode current output voltage VO > VCC or VO < 0 enable mode; notes 1 and 2 disable mode Power-down mode; note 2 IO IGND, ICC Tstg Ptot Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. 3. For SO20 packages: above 70 °C derate linearly with 8 mW/K. For TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN20 packages: above 60 °C derate linearly with 4.5 mW/K. output source or sink current VCC or GND current storage temperature power dissipation Tamb = −40 to +85 °C; note 3 VO = 0 to VCC VI < 0 CONDITIONS − −0.5 − −0.5 −0.5 −0.5 − − −65 − MIN. −0.5 MAX. +4.6 −50 +4.6 ±50 VCC + 0.5 +4.6 +4.6 ±50 ±100 +150 500 V mA V mA V V V mA mA °C mW UNIT 2003 Sep 08 6 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = −40 to +85 °C VIH HIGH-level input voltage 1.65 to 1.95 0.65 × VCC − 2.3 to 2.7 2.7 to 3.6 VIL LOW-level input voltage 2.3 to 2.7 2.7 to 3.6 VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA IO = 6 mA IO = 12 mA IO = 18 mA IO = 12 mA IO = 18 mA IO = 24 mA VOH HIGH-level output voltage VI = VIH or VIL IO = −100 µA IO = −6 mA IO = −12 mA IO = −18 mA IO = −12 mA IO = −18 mA IO = −24 mA ILI IOZ Ioff ICC ∆ICC input leakage current 3-state output OFF-state current VI = 3.6 V or GND VI = VIH or VIL; VO = 3.6 V or GND; note 2 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 3.0 3.6 3.6 0.0 3.6 3.0 to 3.6 VCC − 0.2 1.25 1.8 1.7 2.2 2.4 2.2 − − − − − − − − − − − − ±0.1 0.1 ±0.1 0.2 5 − − − − − − − ±5 ±10 ±10 20 750 V V V V V V V µA µA µA µA µA 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 3.0 − − − − − − − − − − − − − − 0.2 0.3 0.4 0.6 0.4 0.4 0.55 V V V V V V V 1.7 2 − − − − − − − − − − 0.7 0.8 V V V V V VCC (V) MIN. TYP.(1) MAX. UNIT 1.65 to 1.95 − 0.35 × VCC V power OFF leakage VI or VO = 3.6 V current quiescent supply current additional quiescent supply current per input pin VI = VCC or GND; IO = 0 VI = VCC − 0.6 V; IO = 0 Notes 1. All typical values are measured at Tamb = 25 °C. 2. For transceivers, the parameters IOZ includes the input leakage current. 2003 Sep 08 7 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 AC CHARACTERISTICS TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = −40 to +85 °C tPHL/tPLH propagation delay nAn to nYn see Figs 6 and 8 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 tPZH/tPZL 3-state output enable time nOE to nYn see Figs 7 and 8 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 tPHZ/tPLZ 3-state output disable time nOE to nYn see Figs 7 and 8 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 Note 1. All typical values are measured at Tamb = 25 °C. AC WAVEFORMS 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 2.7 2.0 2.3 2.2 3.4 2.6 3.2 2.5 3.8 2.2 3.0 2.9 4.4 3.1 3.1 2.8 6.9 5.4 5.3 4.5 5.9 4.1 4.4 4.2 ns ns ns ns ns ns ns ns ns ns ns ns VCC (V) MIN. TYP.(1) MAX. UNIT handbook, halfpage VI nAn input GND tPLH VOH nYn output VOL VM VM tPHL VM VM MNA171 INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V VM 0.5 × VCC 0.5 × VCC 1.5 V 1.5 V VCC VCC 2.7 V 2.7 V VI tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns Fig.6 Input nAn to output nYn propagation delay times. 2003 Sep 08 8 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 handbook, full pagewidth VI nOE input GND tPLZ output LOW-to-OFF OFF-to-LOW VCC VM VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled MNA654 VM tPZL Vx tPZH Vy VM INPUT VCC VM VI VCC VCC 2.7 V 2.7 V tr = tf ≤ 2.0 ns ≤ 2.0 ns ≤ 2.5 ns ≤ 2.5 ns VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.15 V at VCC < 2.7 V; VY = VOH − 0.3 V at VCC ≥ 2.7 V; VY = VOH − 0.15 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. 1.65 to 1.95 V 0.5 × VCC 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 0.5 × VCC 1.5 V 1.5 V Fig.7 3-state enable and disable times. 2003 Sep 08 9 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 handbook, full pagewidth VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL MNA616 VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V VI VCC VCC 2.7 V 2.7 V CL 30 pF 30 pF 50 pF 50 pF RL 1 kΩ 500 Ω 500 Ω 500 Ω VEXT tPLH/tPHL open open open open tPZH/tPHZ GND GND GND GND tPZL/tPLZ 2 × VCC 2 × VCC 6V 6V Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.8 Load circuitry for switching times. 2003 Sep 08 10 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c y HE vMA Z 20 11 Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) θ A 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.1 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.05 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) θ 0.9 0.4 0.035 0.016 0.012 0.096 0.004 0.089 0.019 0.013 0.014 0.009 0.419 0.043 0.055 0.394 0.016 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 2003 Sep 08 11 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 D E A X c y HE vMA Z 20 11 Q A2 pin 1 index A1 (A 3) A θ Lp L 1 e bp 10 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 6.6 6.4 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.5 0.2 θ 8 0o o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 2003 Sep 08 12 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm D B A A A1 E c terminal 1 index area detail X terminal 1 index area e 2 L e1 b 9 vMCAB wM C y1 C C y 1 Eh 20 10 e 11 19 Dh 0 12 X 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 4.6 4.4 Dh 3.15 2.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 3.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT764-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 2003 Sep 08 13 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74ALVC244 DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes  Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2003 Sep 08 14 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 SCA75 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/03/pp15 Date of release: 2003 Sep 08 Document order number: 9397 750 12018
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