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PLL602-00DC

PLL602-00DC

  • 厂商:

    PLL

  • 封装:

  • 描述:

    PLL602-00DC - Multiplier XO IC Die for 12 to 25MHz Parallel Resonant Crystals - PhaseLink Corporatio...

  • 数据手册
  • 价格&库存
PLL602-00DC 数据手册
P LL602-00 M ultiplier XO IC Die for 12 to 25MHz Parallel Resonant Crystals F EATURES • • • • • • I ntegrated crystal oscillator circuitry (XO). L ow phase noise (-135dBc @ 10kHz offset) selectable frequency multipliers (x1, x2, x4, x8 as bonding options). 3 .3V supply voltage. U ses inexpensive fundamental-mode parallel resonant crystals (from 12 to 25MHz). S electable High Drive (30mA) or Standard Drive (10mA) output. A vailable in DIE (65 mil x 62 mil). D IE CONFIGURATION 65 mil VDD VDD OE^ S0V S1V S2V (1550,1475) 25 23 21 20 19 18 Die ID: A0303-03H XIN 27 62 mil 13 CLK XOUT 29 D ESCRIPTION T he PLL602-00 is a monolithic low jitter and low phase noise (-135dBc @10kHz offset), high performance CMOS XO IC. This flexible device can be used as a XO with output frequencies ranging from F XIN x 1 t o F XIN x 8 t hanks to selector pads allowing bonding options (see Divider Selection Table on this page). This makes the PLL602-00 ideal for a wide range of applications from 12MHz to 200MHz (including 50MHz, 77.76MHz, 125MHz and 155.52MHz, etc.). Y X (0,0) C502A 7 10 GND Note: ^ denotes internal pull up V denotes internal pull down MULTIPLIER SELECTION S ELECTION S2 S1 S0 0 0 0 0 0 1 0 1 0 1 0 0 0 1 1 1 1 0 1 0 1 1 1 1 F XIN C LK (MHz) F XIN x 2 F XIN x 4 F XIN x 1 F XIN x 8 F XIN x 2 * F XIN x 4 * F XIN x 1 * F XIN x 8 * B LOCK DIAGRAM S[0:2] 1 2MHz – 25MHz XIn XO XOut Selectable PLL CLK N ote: - S elector pads default to ‘0’, wire bond to VDD to set to ‘1’ - (*) High-drive CMOS output P AD DESCRIPTION N ame Number Description X IN 27 29 7,10 13 18,19,20 21,22,23 25 Crystal input connection. Crystal connection. Ground. Clock Output. Frequency selection pad 3.3V Power Supply. Output Enable: ‘0’ to disable (tristate output), 1’ (default value when not connected) to enabled the output. DIE SPECIFICATIONS N ame Value X OUT G ND C LK S [0:2] V DD OE S ize R everse side P ad dimensions T hickness 62 x 65 mil GND 80 micron x 80 micron 10 mil 4 7745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 w ww.phaselink.com R ev 09/03/04 Page 1 GND P LL602-00 M ultiplier XO IC Die for 12 to 25MHz Parallel Resonant Crystals E LECTRICAL SPECIFICATIONS 1 . Absolute Maximum Ratings P ARAMETERS S upply Voltage I nput Voltage, dc O utput Voltage, dc S torage Temperature A mbient Operating Temperature* J unction Temperature L ead Temperature (soldering, 10s) E SD Protection, Human Body Model SYMBOL V DD VI VO TS TA TJ MIN. - 0.5 - 0.5 - 65 - 40 MAX. 4 .6 V DD +0.5 V DD +0.5 150 85 1 25 260 2 UNITS V V V °C °C °C °C kV E xposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * N ote : Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2 . DC Electrical Specifications P ARAMETERS S upply Current, Dynamic, with Loaded Outputs O perating Voltage O utput drive current (High Drive) O utput drive current (Standard Drive) S hort Circuit Current SYMBOL I DD V DD I OH I OL I OH I OL CONDITIONS F XIN = 1 2 - 25MHz Output load of 10pF V OH = V DD -0.4V, V DD =3.3V V OL = 0 .4V, V DD = 3 .3V V OH = V DD -0.4V, V DD =3.3V V OL = 0 .4V, V DD = 3 .3V MIN. TYP. 16 MAX. 20 3.63 UNITS mA V mA mA mA mA mA 2 .97 30 30 10 10 ± 50 3 . AC Electrical Specifications P ARAMETERS I nput Crystal Frequency O utput Clock Rise/Fall Time (Standard Drive) O utput Clock Rise/Fall Time (High Drive) O utput Clock Duty Cycle SYMBOL CONDITIONS 0 .3V ~ 3.0V with 15 pF load 0 .3V ~ 3.0V with 15 pF load M easured @ 50% V DD MIN. 12 TYP. 2.4 1.2 MAX. 25 UNITS MHz ns 45 50 55 % 4 7745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 w ww.phaselink.com R ev 09/03/04 Page 2 P LL602-00 M ultiplier XO IC Die for 12 to 25MHz Parallel Resonant Crystals 4 . Crystal Specifications P ARAMETERS C rystal Resonator Frequency C rystal Loading Rating R ecommended ESR SYMBOL F XIN C L (xtal) RE CONDITIONS P arallel Fundamental Mode A T cut MIN. 12 20 30 TYP. MAX. 25 UNITS MHz pF Ω 5 . Jitter and Phase Noise Specification P ARAMETERS CONDITIONS a t 155MHz, with capacitive decoupling between VDD and GND. R MS Period Jitter (1 sigma – 1000 samples) a t 80MHz, with capacitive decoupling between VDD and GND. at 44MHz, with capacitive decoupling between VDD and GND. P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier P hase Noise relative to carrier 44MHz @100Hz offset 44MHz @1kHz offset 44MHz @10kHz offset 44MHz @100kHz offset 44MHz @1MHz offset 155MHz @100Hz offset 155MHz @1kHz offset 155MHz @10kHz offset 155MHz @100kHz offset 155MHz @1MHz offset MIN. TYP. 4 3 2.5 -80 -110 -135 -130 -132 -80 -110 -125 -120 -125 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz ps MAX. UNITS 4 7745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 w ww.phaselink.com R ev 09/03/04 Page 3 P LL602-00 M ultiplier XO IC Die for 12 to 25MHz Parallel Resonant Crystals P AD ASSIGNMENT P ad # 7 10 13 18 19 20 21 23 25 27 29 Name G ND GND CLK S2 S1 S0 VDD VDD OE XIN XOUT X ( µ m) 1042 1400 1400 1232 1042 854 659 459 194 109 109 Y ( µ m) 109 259 716 1365 1365 1365 1365 1365 1365 1017 646 Ground. Ground. CMOS clock output. Used to select multiplication factor and drive level. Internal pull down. Used to select multiplication factor and drive level. Internal pull down. Used to select multiplication factor and drive level. Internal pull down. 3.3V power supply. 3.3V power supply. Used to enable/disable the output(s). Internal pull up. Crystal input. See crystal specification page 3. Crystal output. See crystal specification page 3. Description O RDERING INFORMATION F or part ordering, please contact our Sales Department: 4 7745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 P ART NUMBER T he order number for this device is a combination of the following: Device number, Package type and Operating temperature range P LL602-00 D C P ART NUMBER T EMPERATURE C=COMMERCIAL I=INDUSTRAL P ACKAGE TYPE D=DIE O rder Number P LL602-00DC Marking P602-00DC Package Option Die – Waffle Pack P haseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. L IFE SUPPORT POLICY : PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 4 7745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 w ww.phaselink.com R ev 09/03/04 Page 4
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