BP6A-L

Application First Release: February 2, 2005 NOTES: www.pwrx.com Caution: Verify PCB Orientation Before Applying Power BP6A – L-Series IPM Interface Circuit Reference Design Description: The BP6A is a complete isolated interface circuit for high power six pack L-Series IPMs. This circuit provides opto-coupled isolation for control signals and isolated power supplies for the IPM’s built-in gate drive and protection circuits. The isolated interface helps to simplify prototype development and minimize design time by allowing direct connection of the IPM to logic level control circuits. Features: • Complete three-phase isolated interface circuit with fault feedback • 2500VRMS isolation for control power and signals • Standard AMP MTA .100” Input Signal and Control Power Connectors • Operates from a single 24VDC supply • Compact Size 3.2” x 5.5” (80mm x 140mm) Applications: BP6A is designed for use with Powerex L-Series six pack IPMs: 450A-600A 600V and 200A-450A 1200V. ¾ Use Powerex VLA106-24151 DC to DC converter for isolated control power. See Table 1 for requirements. Ordering Information: BP6A-L is a kit containing a bare PCB and six VLA106-24151 DC to DC converters (For use with L-Series IPMs in package D) BP6A is a bare PCB only. Note: User must supply Opto-Couplers and passive components to fully populate the BP6A (See Table 2) 1 Table 1: L-Series IPM Line-Up and Interface Circuit Selection Part Num ber Voltage Curre nt Re com m ended Re fe rence Package (V) (A) DC to DC Conve rters Des ign PM50(#)L(*)060 50 PM75(#)L(*)060 75 PM100(#)L(*)060 100 PM150(#)L(*)060 PM200(#)LA060 600 200 PM300(#)LA060 300 450 PM25(#)L(*)120 25 PM50(#)L(*)120 50 PM75(#)L(*)120 75 PM100(#)LA120 100 PM200CLA120 PM300CLA120 PM450CLA120 600 1200 A or B VLA106-24151 x 4pc. BP7A 150 PM450CLA060 PM600CLA060 PM150(#)LA120 Figure 1: L-Series IPMs 150 C VLA106-24151 x 3pc. VLA106-24154 x 1pc. D VLA106-24151 x 6pc. A or B VLA106-24151 x 4pc. Package A BP6A BP7A C VLA106-24151 x 3pc. VLA106-24154 x 1pc. D VLA106-24151 x 6pc. Package B 200 300 BP6A 450 (*) Package Option: B=Solder pin, A=Screw terminal (#) Circuit Option: R=Six Pack+Brake, C=Six pack Example: PM75RLB120 is a 75A, 1200V six pack with brake in a solder pin package Package C Overview: A significant advantage provided by the L-Series IPM’s builtin gate drive and protection circuits is that the entire family outlined in Table 1 requires only two different interface circuit designs. The standard interface circuit consists of opto-couplers to transfer control signals and isolated power supplies to power the IPM’s internal circuits. The two circuits are similar except that large L-Series IPMs in package D utilize separate control grounds on the low side to minimize ground bounce induced noise. As a result these devices require six isolated power supplies. The Powerex BP6A reference design is an example of this circuit. The remaining devices in packages A, B, and C have a common control ground for all three low side IGBTs. This permits use of a single low side supply so that only four isolated supplies are required. Interface circuit details for these devices are available in the Powerex BP7A reference design application note. Package D Isolated DC to DC Converters: In order to simplify the design and layout of the required control power supplies, Powerex has introduced the VLA106-24151 isolated DC to DC converter shown in figure 2. The VLA106-24151 operates from a 24V DC supply and produces an isolated 15V DC output at up to 100mA. A Transformer is used to provide 2500VRMS isolation between the primary and secondary side. The BP6A board uses six VLA106-24151 DC to DC converters to supply control power for the LSeries IPM. 2 VLA106-24151 Figure 2: Isolated DC to DC Converter for IPM Control BP6A Circuit Explanation: Figure 3: BP6A L-Series IPM Interface Circuit Schematic IC6 A complete circuit VWN1 C6 WN schematic of the BP6A + C14 R6 R14 D7 WNFO interface is shown in figure 3 VWNC and the bill of materials is R7 IC18 given in Table 2. This circuit D6 1 2 3 8 9 10 11 uses two types of optocoupled transistors to VLA106-24151 IC12 R13 IC5 transfer logic level control VWP1 signals between the system C5 WP + C13 R5 controller and the IPM. The WPFO optocouplers provide VWPC IC17 galvanic isolation to CN5 D5 completely separate the 1 2 3 8 9 10 11 controller from the high VLA106-24151 IC11 voltage in the power circuit. IC4 VVN1 The BP6A also provides C4 VN + C12 isolated control power R4 VNFO + supplies to power the IPM’s C7 VVNC IC16 built-in gate drive and protection circuits. D4 1 2 3 8 9 10 11 The six main IGBT VLA106-24151 IC10 on/off control signals IC3 VVP1 (UP,VP,WP,UN,VN,WN) are R10 R12 C3 VP + C11 transferred from the system R3 VPFO controller to the IPM using VVPC IC15 high speed optocoupled CN4 transistors (IC1-IC6). To D3 1 2 3 8 9 10 11 maintain noise immunity, high VLA106-24151 IC9 speed optos generally require IC2 VUN1 a film or ceramic decoupling C2 UN capacitor connected near + C10 R2 UNFO + their VCC and GND pins (C1C8 VUNC C6). The IPM’s active low IC14 control inputs are pulled high D2 1 2 3 8 9 10 11 (off state) by resistors (R1R9 R11 VLA106-24151 IC8 R6). An on signal is IC1 VUP1 generated by turning on the C1 UP opto-coupler to pull the IPM’s + C9 R1 UPFO control input pin low. The VUPC R8 resistance of the control input IC13 pull up resistors is selected CN3 D1 1 2 3 8 9 10 11 CN1 low enough to avoid noise C +V VLA106-24151 IC7 pick up by the IPM’s high impedance input and high +VL WN VN UN WP VP UP FO GND CN2 enough so that the high speed opto-transistor with its relatively low current transfer ratio can still pull the IPM’s input low enough to assure turn on. The high speed optocouplers must have very high common mode transient noise immunity. For reliable operation in IGBT power circuits optocouplers with internal shielding and a minimum common mode transient noise immunity of at least 10,000 V/µs should be used. The BP6A is designed to use the Agilent HCPL4504 opto-coupler which has a minimum common mode transient noise immunity of 15,000V/µs. The IPM’s fault output signals are transferred back to the system controller using low speed optocoupled transistors (IC7-IC12). During normal operation the fault feedback line (pin 2 of CN1) is pulled high to the +VL supply by the 4.7K resistor R15. When a fault condition is detected by the IPM it will immediately turn off the involved IGBT and pull its fault output pin low. The IPM’s fault output has an open collector characteristic with an internal 1.5k ohm limiting resistor. Current flows from the +15V local supply through the low speed 3 Table 2: BP6A Reference Design Component Selection Characteristic 15KΩ, 0.25W 180Ω, 0.25W 4.7KΩ, 0.25W 1.8KΩ, 0.25W 0.1µF, 50V Multi-Layer Ceramic 39µF, 35V, 105C, Low imp. 560µF, 50V, 105C, Low imp. Super bright red LED Super bright green LED Fast Opto coupler HCPL 4504 Slow Opto coupler NEC PS2501 10 pos. 0.1” right angle single row header Single row bottom entry header receptacle 2 pos. 0.1” right angle single row header Isolated DC/DC converter 4 IPM Connector Figure 4: BP6A External Connections VWN1 WN WNFO VWNC VWP1 WP WPFO VWPC IPM Connector CN5 VVN1 VN VNFO VVNC VVP1 VP VPFO VVPC CN4 IPM Connector optocoupler’s LED to the IPM’s fault pin. The optocoupler’s transistor turns on and its collector pulls the fault feedback line low to indicate a fault. If any of the IPM’s six fault output signals become active its fault isolation opto will pull the fault feedback line low. Slow optos are used because they offer the advantages of lower cost and higher current transfer ratios. High speed is not necessary because the IPM disables a faulted device and produces a fault signal for a minimum of 1ms. The BP6A also includes an LED in series with each fault output (D1-D6) to provide a quick visual indication when the IPM’s fault signal is active. This was included for trouble shooting purposes only so it can be replaced by a jumper without affecting the operation of the interface circuit. Isolated control power for the IPM is supplied by Powerex isolated DC to DC converters (IC13-IC18) as described above. Each power supply is decoupled at the IPM’s pins with a low impedance electrolytic capacitor (C9-C14). These capacitors must be low impedance/high ripple current types because they are required to supply the high current gate drive pulses to the IPM’s internal gate driving circuits. The DC to DC converters are powered from a single 24VDC supply connected at CN2. The 24VDC supply is decoupled by the electrolytic capacitors C7 and C8 to maintain a stable well filtered source for the DC to DC converters. The current draw on the 24V supply will range from about 80mA to 380mA depending on the module being driven and switching frequency. For a more accurate estimate it is necessary to use the IPM’s circuit current (ID) versus fC characteristic to obtain the current required by the IPM being used. The IPM current draw can then be adjusted using the DC to DC converter efficiency specification to arrive at the current draw on the 24V supply. Refer to the general IPM application notes for detailed information. A power indicator consisting of an LED (D7) in series with current limiting resistor (R14) is provided to show that the 24VDC supply is present. Description Control input pull-up Input current limiter (15mA@VL=5V) Fault signal pull-up Power Indicator Current limiter High speed opto decoupling capacitor Control power decoupling capacitor DC to DC input decoupling capacitor Fault indicator LED Control power LED Control signal isolator Fault signal isolator Control signal connector IPM connector Hirose MDF7-11S-2.54DSA(22) 24VDC Control power connector Powerex P/N VLA106-24151 +VL WN VN UN NC WP VP UP FO GND Designation R1, R2, R3, R4, R5, R6 R8, R9, R10, R11, R12, R13 R7 R14 C1, C2, C3, C4, C5, C6 C9,C10,C11,C12,C13,C14 C7,C8 D1, D2, D3, D4,D5,D6 D7 IC1, IC2, IC3, IC4, IC5, IC6 IC7, IC8, IC9, IC10, IC11,IC12 CN1 CN3,CN4,CN5 CN2 IC13,IC14,IC15, IC16,IC17,IC18 CN1 +5 VDC CMOS type buffer must sink 15mA VUN1 UN UNFO VUNC VUP1 UP UPFO VUPC CN3 RC Filter to remove noise on fault signal RC~10us To Logic Level Control Circuits CN2 + 24 VDC Controller Interface: A typical controller interface for the BP6A is shown in figure 4. The control inputs (WN,VN,UN,WP,VP,UP) consist of the opto coupler’s LED in series with a 180Ω current limiting resistor. This combination is designed to provide approximately 16mA of drive current for the optocoupler when a 5V control signal is applied. The anodes of the opto LEDs are tied directly to the 5V logic power supply (+VL). An on signal (IPM control input low) is generated by pulling the respective control input low (GND) using a CMOS buffer capable of sinking at least 16mA (74HC04 or similar). In the off state the buffer should actively pull the control input high to maintain good noise immunity. Open collector drive that allows the control input to float will degrade common mode noise immunity and is therefore not recommended. If a different logic power supply (+VL) voltage is desired the current limiting resistors (R8-R13) must be adjusted. The value of the limiting resistor can be calculated by assuming the forward voltage drop of the optocoupler’s photodiode is approximately 1.5V and that the buffer/driver on-state output voltage is approximately 0.6V. For example, if a 15V logic power supply is desired, the required limiting resistors would be: (15V-1.5V-0.6V)÷16mA = 800Ω. If the IPM’s built in protection is activated it will immediately shut down the gate drive to the affected IGBT and pull the associated FO pin low. This causes the fault isolation opto to turn on and pull the fault feedback signal (Pin 2 of CN1) low. When a fault is detected by the IPM a fault signal with a minimum duration of 1ms is produced. Any signal on the fault line that is significantly shorter than 1ms can not be a legitimate fault and should be ignored by the controller. Therefore, for a robust noise immune design, it is recommended that an RC filter with a time constant of approximately 10us be added to the fault feedback as shown in figure 4. An active fault signal indicates that severe conditions have caused the IPM’s self protection to operate. The fault feedback signal should be used by the system controller to stop the operation of the circuit until the cause of the fault is identified and corrected. Repetitive fault operations may result in damage to the IPM. Printed Circuit Layout: Figure 5 shows the printed circuit layout of the BG6A interface circuit. The compact 80mm x 140mm circuit board with only 58 components provides a complete isolated six channel driving circuit with short circuit, over temperature and under voltage protection. This clearly demonstrates the advantage of using L-Series Intelligent Power Modules. One important feature of this PCB is the use of separate ground plane islands for each of the isolated driving circuits, logic level interface, and 24V power supply. Six of the islands are tied to the common pin of the IPM’s six isolated control power supplies (IPM pins 13, 17, 21, 25, 29, 33). The remaining two islands are connected at the logic ground (pin 1 of CN1) and 24 VDC power supply ground (pin 1 of CN3) respectively. This layout is designed to prevent undesirable coupling of noise between the control side and the floating gate drive channels. The BP6A PCB is designed to plug directly onto the control pins of the L-Series IPM. This configuration helps to maintain good noise immunity by providing minimal interconnection distance. More Information: For more information refer to the following documents available from the Powerex website: (1) L-Series IPM individual data sheets provide detailed electrical characteristics of L-Series IPMs (2) Application Note – “General Considerations: IGBT & IPM modules”, Provides detailed information on power circuit design including bus bars, snubber circuits and loss calculations. This document also includes heatsink mechanical requirements and proper mounting procedures. (3) Application Note – “Introduction to IPMs (Intelligent Power Modules)”, Provides detailed information regarding features, operational characteristics and interface circuit requirements for Intelligent Power Modules. (4) BP7A technical data – provides interface circuit information for L-Series IPMs in the low and medium power “A, B, C” packages. (5) VLA106-24151 data sheet provides detailed electrical characteristics for the DC to DC converter. (6) Melcosim loss simulation software - provides quick power loss estimation for L-Series IPMs in three phase inverter applications. 5 Figure 5: BP6A PCB Layout Component Legend Component Side Solder Side 6