LYT4211-4218/4311-4318
™
LYTSwitch-4
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options
Optimized for Different Applications and Power Levels
Part Number
Input Voltage Range
TRIAC Dimmable
LYT4211-LYT4218
LYT4311-LYT4318
85-132 VAC
85-132 VAC
No
Yes
Output Power Table
Product
Minimum Output Power Maximum Output Power
LYT4x11E
LYT4x12E
2.5 W
2.5 W
12 W
15 W
LYT4x13E
3.8 W
18 W
LYT4x14E
4.5 W
22 W
LYT4x15E
5.5 W
25 W
LYT4x16E
6.8 W
35 W
LYT4x17E
8.0 W
50 W
LYT4x18E
18 W
78 W
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To read about
LYTSwitch-4 Low-Line
LYT4221-4228/4321-4328
™
LYTSwitch-4
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options
Optimized for Different Applications and Power Levels
Part Number
Input Voltage Range
TRIAC Dimmable
LYT4221-LYT4228
LYT4321-LYT4328
160-300 VAC
160-300 VAC
No
Yes
Output Power Table
Product
Minimum Output Power Maximum Output Power
LYT4x21E
LYT4x22E
6W
6W
12 W
15 W
LYT4x23E
8W
18 W
LYT4x24E
9W
22 W
LYT4x25E
11 W
25 W
LYT4x26E
14 W
35 W
LYT4x27E
19 W
50 W
LYT4x28E
33 W
78 W
Click Here
To read about
LYTSwitch-4 High-Line
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LYT4211-4218/4311-4318
™
LYTSwitch-4
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for Low-Line Applications with TRIAC Dimming and Non-Dimming Options
Product Highlights
•
•
•
•
•
•
•
Better than ±5% CC regulation
TRIAC dimmable to less than 5% output
Fast start-up
• 80%.
3. Minimum output power requires CBP = 47 µF.
4. Maximum output power requires CBP = 4.7 µF.
5. LYT4311 CBP = 47 µF, LYT4211 CBP = 4.7 µF.
6. Package: eSIP-7C (see Figure 2).
www.power.com
November 2014
This Product is Covered by Patents and/or Pending Patent Applications.
LYT4211-4218/4311-4318
Topology
Isolation
Efficiency
Cost
THD
Output Voltage
Yes
No
No
No
88%
92%
89%
90%
High
Low
Middle
Low
Best
Good
Best
Best
Any
Limited
Any
High-Voltage
Isolated Flyback
Buck
Tapped-Buck
Buck-Boost
Table 2.
Performance of Different Topologies in a Typical Non-Dimmable 10 W Low-Line Design.
Typical Circuit Schematic
Key Features
Flyback
AC
IN
LYTSwitch-4
V
D
CONTROL
S
R
BP
FB
PI-6800-050913
Figure 3a. Typical Isolated Flyback Schematic.
Benefits
• Provides isolated output
• Supports widest range of output voltages
• Very good THD performance
Limitations
• Flyback transformer
• Overall efficiency reduced by parasitic capacitance
and inductance in the transformer
• Larger PCB area to meet isolation requirements
• Requires additional components (primary clamp and bias)
• Higher RMS switch and winding currents increases losses
and lowers efficiency
Buck
AC
IN
LYTSwitch-4
V
D
CONTROL
S
R
BP
FB
PI-6841-111813
Benefits
• Highest efficiency
• Lowest component count – small size
• Simple low-cost power inductor
• Low drain source voltage stress
• Best EMI/lowest component count for filter
Limitations
• Single input line voltage range
• Output voltage 0.9). The design is fully protected from faults
such as no-load (open load), overvoltage and output shortcircuit or overload conditions and over temperature.
Circuit Description
The LYTSwitch-4 device (U1- LYT4317E) integrates the power
FET, controller and start-up functions into a single package
reducing the component count versus typical implementations.
Configured as part of an isolated continuous conduction mode
flyback converter, U1 provides high power factor via its internal
control algorithm together with the small input capacitance of
the design. Continuous conduction mode operation results in
reduced primary peak and RMS current. This both reduces
EMI noise, allowing simpler, smaller EMI filtering components
and improves efficiency. Output current regulation is maintained
without the need for secondary-side sensing which eliminates
current sense resistors and improves efficiency.
The VOLTAGE MONITOR pin current and the FEEDBACK pin
current are used internally to control the average output LED
current. For TRIAC phase-dimming applications a 49.9 kW
resistor (R14) is used on the REFERENCE pin and 2 MW (R10)
on the VOLTAGE MONITOR pin to provide a linear relationship
between input voltage and the output current and maximizing
the dimming range.
Diode D3, R15 and C7 clamp the drain voltage to a safe level
due to the effects of leakage inductance. Diode D4 is
necessary to prevent reverse current from flowing through U1
for the period of the rectified AC input voltage that the voltage
across C4 falls to below the reflected output voltage (VOR).
Input Stage
Fuse F1 provides protection from component failures while RV1
provides a clamp during differential line surges, keeping the
C13
R26 100 pF
30 Ω 200 V
D9
DFLU1400-7
R24
47 kΩ
1/8 W
BR1
MB6S
600 V
D2
DFLU1400
R9
510 kΩ
1/8 W
FL1
1
FL2
D3
US1J
R2
L1 47 kΩ
1 mH 1/8 W
R6
360 kΩ
L3
5 mH
L2
1 mH
T1
RM8
LYTSwitch-4
U1
LYT4317E
RV1
140 VAC
L
90 - 132
VAC
Q1
X0202MA2BL2
N
C3
470 nF
50 V
R8
100 Ω
1W
D5
BAV16
R17
3 kΩ
1/10 W
V
CONTROL
S
R
R18
165 kΩ
1%
1/16 W
BP
FB
R14
49.9 kΩ
1%
1/16 W C8
47 µF
16 V
Q2
MMBT3904
C14
10 nF
50 V
RTN
C9
56 µF
50 V
C5
100 nF
50 V
R19
20 kΩ
1/8 W
D4
US1D
C4
C6
100 nF 2.2 µF
250 V 250 V
D
F1
5A
R20
39 Ω
1/8 W
D8
BAV21
VR4
MAZS3300ML
33 V
C2
100 nF
250 V
R25
47 kΩ
1/8 W
11
R10
2 MΩ
1%
C1
220 nF
250 V
36 V,
550 mA
D6
BAV21
10
R1
510
1/2 W
C11
C12
330 µF 330 µF R23
63 V
63 V 20 kΩ
D7
BYW29-200
C7
2.2 nF
630 V
R15
200 kΩ
12
R27
10 Ω
1/10 W
C15
100 nF
50 V
R22
1 kΩ
1/10 W
CY1
470 pF
250 VAC
PI-6875-052213
Figure 8.
DER-350 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 90-132 VAC, 20 W / 36 V / 550 mA LED Driver.
6
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Diode D6, C5, C9, R19 and R20 create the primary bias supply
from an auxiliary winding on the transformer. Capacitor C8
provides local decoupling for the BYPASS pin of U1 which is the
supply pin for the internal controller. During start-up C8 is
charged to ~6 V from an internal high-voltage current source
tied to the device DRAIN pin. This allows the part to start
switching at which point the operating supply current is provided
from the bias supply via R17. Capacitor C8 also selects the
output power mode (47 mF for reduced power was selected to
reduce dissipation in U1 and increase efficiency for this design).
Feedback
The bias winding voltage is proportional to the output voltage
(set by the turns ratio between the bias and secondary
windings). This allows the output voltage to be monitored
without secondary-side feedback components. Resistor R18
converts the bias voltage into a current which is fed into the
FEEDBACK pin of U1. The internal engine within U1 combines
the FEEDBACK pin current, the VOLTAGE MONITOR pin current
and drain current information to provide a constant output
current over a 1.5:1 output voltage variation (LED string voltage
variation of ±25%) at a fixed line input voltage.
To limit the output voltage at no-load an output overvoltage
protection circuit is set by D8, C15, R22, VR4, R27, C14 and Q2.
Should the output load be disconnected then the bias voltage
will increase until VR4 conducts, turning on Q2 and reducing
the current into the FEEDBACK pin. When this current drops
below 10 mA the part enters auto-restart and switching is
disabled for 300 ms allowing time for the output and bias
voltages to fall.
Output Rectification
The transformer secondary winding is rectified by D7 and
filtered by C11 and C12. An ultrafast TO-220 diode was
selected for efficiency and the combined value of C11 and C12
were selected to give peak-to-peak LED ripple current equal to
30% of the mean value. For designs where lower ripple is
desirable the output capacitance value can be increased.
TRIAC Phase Dimming Control Compatibility
The requirement to provide output dimming with low-cost,
TRIAC-based, leading edge phase dimmers introduces a
number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting
the current drawn by the overall lamp is below the holding
current of the TRIAC within the dimmer. This can cause
undesirable behaviors such as limited dimming range and/or
flickering as the TRIAC fires inconsistently. The relatively large
impedance the LED lamp presents to the line allows significant
ringing to occur due to the inrush current charging the input
capacitance when the TRIAC turns on. This too can cause
similar undesirable behavior as the ringing may cause the
TRIAC current to fall to zero and turn off.
To overcome these issues simple two circuits, the SCR active
damper and R-C passive bleeder, are incorporated. The
drawback of these circuits is increased dissipation and
therefore reduced efficiency of the supply. For non-dimming
applications these components can simply be omitted.
The SCR active damper consists of components R6, C3, and
Q1 in conjunction with R8. This circuit limits the inrush current
that flows to charge C4 when the TRIAC turns on by placing R8
in series for the first ~1 ms of the TRIAC conduction. After
approximately 1 ms, Q1 turns on and bypasses R8. This keeps
the power dissipation on R8 low and allows a larger value
during current limiting. Resistor R6 and C3 provide the delay
on Q1 turn on after the TRIAC conducts. Diode D9 blocks the
charge in capacitor C4 from flowing back after the TRIAC turns
on which helps in dimming compatibility especially with high
power dimmers.
The passive bleeder circuit is comprised of R1 and C1. This
helps keep the input current above the TRIAC holding current
while the input current corresponding to the effective driver
resistance increases during each AC half-cycle.
A small pre-load is provided by R23 which discharges residual
charge in output capacitors when turned off.
7
www.power.com
Rev. E 11/14
LYT4211-4218/4311-4318
Modified DER-350 20 W High Power Factor LED Driver
for Non-Dimmable and Enhanced Line Regulation
•
The circuit schematic in Figure 9 shows a high power factor
LED driver based on a LYT4317 from the LYTSwitch-4 family of
devices. It was optimized to drive an LED string at a voltage of
36 V with a constant current of 0.55 A, ideal for high lumen PAR
lamp retro-fit applications. The design operates over the
low-line input voltage range of 90 VAC to 132 VAC and is
non-dimming application. A non-dimming application has
tighter output current variation with changes in the line voltage
than a dimming application. It’s key to note that, although not
specified for dimming, no circuit damage will result if the end
user does operate the design with a phase controlled dimmer.
Modification for Non-Dimmable Configuration
The design is configurable for non-dimmable application by
simply removing the component for SCR active damper (R6,
R8, C3, and Q1), blocking diode D9 and R-C bleeder (R1, C1)
changes and replacing the reference resistor R14 with 24.9 kW.
(See Figure 9)
Key Application Considerations
Power Table
The data sheet power table (Table 1) represents the minimum
and maximum practical continuous output power based on the
following conditions:
•
•
•
•
Note that input line voltages above 85 VAC do not change the
power delivery capability of LYTSwitch-4 devices.
Device Selection
Select the device size by comparing the required output power
to the values in Table 1. For thermally challenging designs, e.g.,
incandescent lamp replacement, where either the ambient
temperature local to the LYTSwitch-4 device is high and/or
there is minimal space for heat sinking use the minimum output
power column. This is selected by using a 47 µF BYPASS pin
capacitor and results in a lower device current limit and therefore
lower conduction losses. For open frame design or designs
where space is available for heat sinking then refer to the
maximum output power column. This is selected by using a
4.7 µF BYPASS pin capacitor for all but the LYT4x11 which has
only one power setting. In all cases in order to obtain the best
output current tolerance maintain the device temperature below
100 °C
Maximum Input Capacitance
To achieve high power factor, the capacitance used in both the
EMI filter and for decoupling the rectified AC (bulk capacitor)
must be limited in value. The maximum value is a function of
the output power of the design and reduces as the output
power reduces. For the majority of designs limit the total
capacitance to less than 200 nF with a bulk capacitor value of
100 nF. Film capacitors are recommended compared to
ceramic types as they minimize audible noise with operating
with leading edge phase dimmers. Start with a value of 10 nF
for the capacitance in the EMI filter and increase in value until
there is sufficient EMI margin.
Efficiency of 80%
Device local ambient of 70 °C
Sufficient heat sinking to keep the device temperature below
100 °C
For minimum output power column
• Reflected output voltage (VOR) of 120 V
• FEEDBACK pin current of 135 µA
• BYPASS pin capacitor value of 47 µF
C13
R26 100 pF
30 Ω 200 V
R24
47 kΩ
1/8 W
D2
DFLU1400
R9
510 kΩ
1/8 W
BR1
MB6S
600 V
For maximum output power column
Reflected output voltage (VOR) of 65 V
• FEEDBACK pin current of 165 µA
• BYPASS pin capacitor value of 4.7 µF (LYT4x11 = 4.7 µF)
•
FL1
1
FL2
D6
BAV21
10
D3
US1J
11
R10
2 MΩ
1%
L2
1 mH
L3
5 mH
T1
RM8
LYTSwitch-4
U1
LYT4317E
RV1
140 VAC
V
CONTROL
S
L
90 - 132
VAC
N
D5
BAV16
R17
3 kΩ
1/10 W
R
R18
165 kΩ
1%
1/16 W
BP
FB
R14
24.9 kΩ
1%
1/16 W C8
47 µF
16 V
36 V,
550 mA
Q2
MMBT3904
C14
10 nF
50 V
RTN
C9
56 µF
50 V
C5
100 nF
50 V
R19
20 kΩ
1/8 W
D4
US1D
C4
C6
100 nF 2.2 µF
250 V 250 V
D
F1
5A
R20
39 Ω
1/8 W
D8
BAV21
VR4
MAZS3300ML
33 V
R2
L1 47 kΩ
1 mH 1/8 W
R25
47 kΩ
1/8 W
C2
100 nF
250 V
C11
C12
330 µF 330 µF R23
63 V
63 V 20 kΩ
D7
BYW29-200
C7
2.2 nF
630 V
R15
200 kΩ
12
R27
10 Ω
1/10 W
C15
100 nF
50 V
R22
1 kΩ
1/10 W
CY1
470 pF
250 VAC
PI-6875a-052213
Figure 9. Modified Schematic of RD-350 for Non-Dimmable, Isolated, High Power Factor, 90-132 VAC, 20 W / 36 V LED Driver.
8
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Primary Clamp and Output Reflected Voltage VOR
A primary clamp is necessary to limit the peak drain to source
voltage. A Zener clamp requires the fewest components and
board space and gives the highest efficiency. RCD clamps are
also acceptable however the peak drain voltage should be
carefully verified during start-up and output short-circuits as the
clamping voltage varies with significantly with the peak drain
current.
For the highest efficiency, the clamping voltage should be
selected to be at least 1.5 times the output reflected voltage,
VOR, as this keeps the leakage spike conduction time short.
This will ensure efficient operation of the clamp circuit and will
also keep the maximum drain voltage below the rated
breakdown voltage of the FET. An RCD (or RCDZ) clamp
provides tighter clamp voltage tolerance than a Zener clamp.
The RCD clamp is more cost effective than the Zener clamp but
requires more careful design to ensure that the maximum drain
voltage does not exceed the power FET breakdown voltage.
These VOR limits are based on the BVDSS rating of the internal
FET, a VOR of 60 V to 100 V is typical for most designs, giving
the best PFC and regulation performance.
Series Drain Diode
An ultrafast or Schottky diode in series with the drain is
necessary to prevent reverse current flowing through the
device. The voltage rating must exceed the output reflected
voltage, VOR. The current rating should exceed two times the
average primary current and have a peak rating equal to the
maximum drain current of the selected LYTSwitch-4 device.
Line Voltage Peak Detector Circuit
LYTSwitch-4 devices use the peak line voltage to regulate the
power delivery to the output. A capacitor value of 1 mF to 4.7 mF
is recommended to minimize line ripple and give the highest
power factor (>0.9), smaller values are acceptable but result in
lower PF and higher line current distortion.
Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with lowcost, TRIAC-based, leading edge phase dimmers introduces a
number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting
the current drawn by the overall lamp is below the holding
current of the TRIAC within the dimmer. This causes
undesirable behaviors such as limited dimming range and/or
flickering. The relatively large impedance the LED lamp presents
to the line allows significant ringing to occur due to the inrush
current charging the input capacitance when the TRIAC turns
on. This too can cause similar undesirable behavior as the
ringing may cause the TRIAC current to fall to zero and turn off.
To overcome these issues two circuits, the active damper and
passive bleeder, are incorporated. The drawback of these
circuits is increased dissipation and therefore reduced efficiency
of the supply so for non-dimming applications these components
can simply be omitted.
Figure 10a shows the line voltage and current at the input of a
leading edge TRIAC dimmer with Figure 10b showing the
resultant rectified bus voltage. In this example, the TRIAC
conducts at 90 degrees.
PI-5983-060810
350
0.35
Voltage
Current
250
0.25
150
0.15
50
0.05
-50 0.5
50
100
150
200
250
300
350
400
-0.05
-150
-0.15
-250
-0.25
-350
-0.35
Line Current (Through Dimmer) (A)
VOLTAGE MONITOR Pin Resistance Network Selection
For widest AC phase angle dimming range with LYT4311-4318,
use a 2 MΩ (1.7 MΩ for 100 VAC (Japan)) resistor connected to
the line voltage peak detector circuit. Make sure that the
resistor’s voltage rating is sufficient for the peak line voltage. If
necessary use multiple series connected resistors.
Operation with Phase Controlled Dimmers
Dimmer switches control incandescent lamp brightness by not
conducting (blanking) for a portion of the AC voltage sine wave.
This reduces the RMS voltage applied to the lamp thus reducing
the brightness. This is called natural dimming and the LYTSwitch-4
LYT4311-4318 devices when configured for dimming utilize
natural dimming by reducing the LED current as the RMS line
voltage decreases. By this nature, line regulation performance is
purposely decreased to increase the dimming range and more
closely mimic the operation of an incandescent lamp. Using a
49.9 kW REFERENCE pin resistance selects natural dimming
mode operation.
Line Voltage (at Dimmer Input) (V)
REFERENCE Pin Resistance Value Selection
The LYTSwitch-4 family contains phase dimming devices,
LYT4311-4318, and non-dimming devices, LYT4211-4218. The
non-dimmable devices use a 24.9 kΩ ±1% REFERENCE pin
resistor for best output current tolerance (over AC input voltage
changes). The dimmable devices (i.e. LYT4311-4318) use 49.9 kΩ
±1% to achieve the widest dimming range.
Conduction Angle (°)
Figure 10a. Ideal Input Voltage and Current Waveform for a Leading Edge
TRIAC Dimmer at 90°.
9
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Rev. E 11/14
LYT4211-4218/4311-4318
250
0.25
200
0.2
150
0.15
100
0.1
50
0.05
0
0
0
50
100
150
200
250
300
350
400
Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output.
Figure 11 shows undesired rectified bus voltage and current
with the TRIAC turning off prematurely and restarting.
If the TRIAC is turning off before the end of the half-cycle
erratically or alternate half AC cycles have different conduction
angles then flicker will be observed in the LED light due to
variations in the output current. This can be solved by including
a bleeder and damper circuit.
Dimmers will behave differently based on manufacturer and
power rating, for example a 300 W dimmer requires less
dampening and requires less power loss in the bleeder than a
600 W or 1000 W dimmer due to different drive circuits and
TRIAC holding current specifications. Multiple lamps in parallel
driven from the same dimmer can introduce more ringing due to
the increased capacitance of parallel units. Therefore, when
testing dimmer operation verify on a number of models,
different line voltages and with both a single driver and multiple
drivers in parallel.
Rectified Input Voltage (V)
Voltage
Current
300
0.35
0.3
250
0.25
200
0.2
150
0.15
100
0.1
50
0.05
0
0
0
50
100
150
200
250
300
350
Conduction Angle (°)
400
Rectified Input Current (A)
PI-5985-060810
0.15
150
0.05
50
-50
0.25
0
50
100
150
200
250
300
350
-0.05
-150
-0.15
-250
-0.25
-350
-0.35
Conduction Angle (°)
Conduction Angle (°)
350
Voltage
Current
250
0.35
Dimmer Output Current (A)
0.3
PI-5986-060810
350
Dimmer Output Voltage (V)
Rectified Input Voltage (V)
Voltage
Current
300
0.35
Rectified Input Current (A)
PI-5984-060810
350
Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing
Edge Dimmer at 90° Conduction Angle.
Start by adding a bleeder circuit. Add a 0.44 µF capacitor and
510 W 1 W resistor (components in series) across the rectified
bus (C1 and R1 in Figure 8). If the results in satisfactory operation
reduce the capacitor value to the smallest that result in acceptable
performance to reduce losses and increase efficiency.
If the bleeder circuit does not maintain conduction in the TRIAC,
then add an active damper as shown in Figure 8. This consists
of components R6, C3, and Q1 in conjunction with R8. This
circuit limits the inrush current that flows to charge C4 when the
TRIAC turns on by placing R8 in series for the first 1 ms of the
TRIAC conduction. After approximately 1 ms, Q1 turns on and
shorts R8. This keeps the power dissipation on R8 low and
allows a larger value to be used during current limiting.
Increasing the delay before Q1 turns on by increasing the value
of resistor R6 will improve dimmer compatibility but cause more
power to be dissipated across R8. Monitor the AC line current
and voltage at the input of the power supply as you make the
adjustments. Increase the delay until the TRIAC operates
properly but keep the delay as short as possible for efficiency.
As a general rule the greater the power dissipated in the bleeder
and damper circuits, the more types of dimmers will work with
the driver.
Trailing Edge Phase Controlled Dimmers
Figure 11 shows the line voltage and current at the input of the
power supply with a trailing edge dimmer. In this example, the
dimmer conducts at 90 degrees. Many of these dimmers use
back-to-back connected power FETs rather than a TRIAC to
control the load. This eliminates the holding current issue of
TRIACs and since the conduction begins at the zero crossing,
high current surges and line ringing are minimized. Typically these
types of dimmers do not require damping and bleeder circuits.
Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing.
10
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Audible Noise Considerations for Use with
Leading Edge Dimmers
Noise created when dimming is typically created by the input
capacitors, EMI filter inductors and the transformer. The input
capacitors and inductors experience high di/dt and dv/dt every
AC half-cycle as the TRIAC fires and an inrush current flows to
charge the input capacitance. Noise can be minimized by
selecting film vs. ceramic capacitors, minimizing the capacitor
value and selecting inductors that are physically short and wide.
The transformer may also create noise which can be minimized
by avoiding cores with long narrow legs (high mechanical
resonant frequency). For example, RM cores produce less
audible noise than EE cores for the same flux density. Reducing
the core flux density will also reduce the noise. Reducing the
maximum flux density (BM) to 1500 Gauss usually eliminates
any audible noise but must be balanced with the increased core
size needed for a given output power.
Thermal and Lifetime Considerations
Lighting applications present thermal challenges to the driver.
In many cases the LED load dissipation determines the working
ambient temperature experienced by the drive so thermal
evaluation should be performed with the driver inside the final
enclosure. Temperature has a direct impact on driver and LED
Input EMI Filter
LYT4317E
Bullk
Capacitor
lifetime. For every 10 °C rise in temperature, component life is
reduced by a factor of 2. Therefore it is important to properly
heat sink and to verify the operating temperatures of all devices.
Layout Considerations
Primary-Side Connections
Use a single point (Kelvin) connection at the negative terminal of
the input filter capacitor for the SOURCE pin and bias returns.
This improves surge capabilities by returning surge currents
from the bias winding directly to the input filter capacitor. The
BYPASS pin capacitor should be located as close to the
BYPASS pin and connected as close to the SOURCE pin as
possible. The SOURCE pin trace should not be shared with the
main power FET switching currents. All FEEDBACK pin
components that connect to the SOURCE pin should follow the
same rules as the BYPASS pin capacitor. It is critical that the
main power FET switching currents return to the bulk capacitor
with the shortest path as possible. Long high current paths
create excessive conducted and radiated noise.
Secondary-Side Connections
The output rectifier and output filter capacitor should be as
close as possible. The transformer’s output return pin should
have a short trace to the return side of the output filter capacitor.
BYPASS Pin
Capacitor Clamp Transformer Output
Diode
Output
Capacitor
REFERENCE Pin
Resistor
FEEDBACK Pin
Resistor
VOLTAGE MONITOR Pin
Resistor
Output
Capacitors
PI-6904-072313
Figure 13. DER-350 20 W Layout Example, Top Silk / Bottom Layer.
11
www.power.com
Rev. E 11/14
LYT4211-4218/4311-4318
Quick Design Checklist
Maximum Drain Voltage
Verify that the peak VDS does not exceed 725 V under all
operating conditions including start-up and fault conditions.
Maximum Drain Current
Measure the peak drain current under all operation conditions
including start-up and fault conditions. Look for signs of
transformer saturation (usually occurs at highest operating
ambient temperatures). Verify that the peak current is less than
the stated Absolute Maximum Rating in the data sheet.
Thermal Check
At maximum output power, both minimum and maximum line
voltage and ambient temperature; verify that temperature
specifications are not exceeded for the LYTSwitch-4,
transformer, output diodes, output capacitors and drain clamp
components.
12
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Absolute Maximum Ratings(1,4)
DRAIN Pin Peak Current(5): LYT4x11..................................1.37 A
LYT4x12..................................2.08 A
LYT4x13..................................2.72 A
LYT4x14................................. 4.08 A
LYT4x15................................. 5.44 A
LYT4x16................................. 6.88 A
LYT4x17.................................. 7.73 A
LYT4x18................................. 9.00 A
DRAIN Pin Voltage ……………………….................. -0.3 to 725 V
BYPASS Pin Voltage.................................................. -0.3 to 9 V
BYPASS Pin Current ………………………....................... 100 mA
VOLTAGE MONITOR Pin Voltage.............................. -0.3 to 9 V(6)
FEEDBACK Pin Voltage ……..................................... -0.3 to 9 V
REFERENCE Pin Voltage .......................................... -0.3 to 9 V
Lead Temperature(3) .........................................................260 °C
Storage Temperature ………………….................... -65 to 150 °C
Operating Junction Temperature(2)..........................-40 to 150 °C
Notes:
1. All voltages referenced to SOURCE, TA = 65 °C.
2. Normally limited by internal circuitry.
3. 1/16 in. from case for 5 seconds.
4. Absolute Maximum Ratings specified may be applied, one
at a time without causing permanent damage to the
product. Exposure to Absolute Maximum Ratings for
extended periods of time may affect product reliability.
5. Peak DRAIN current is allowed while the DRAIN voltage is
simultaneously less than 400 V. See also Figure 13.
6. During start-up (the period before the BYPASS pin begins
powering the IC) the VOLTAGE MONITOR pin voltage can
safely rise to 15 V without damage.
Thermal Resistance
Thermal Resistance: E Package
(qJA) ....................................................105 °C/W(1)
(qJC)..................................................... 2 °C/W(2)
Parameter
Symbol
Notes:
1. Free standing with no heat sink.
2. Measured at back surface tab.
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
124
132
140
Units
Control Functions
Switching Frequency
Frequency Jitter
Modulation Rate
fOSC
TJ = 65 °C
Peak-Peak Jitter
VBP = 0 V,
TJ = 65 °C
Charging Current
Temperature Drift
BYPASS Pin Voltage
BYPASS Pin
Voltage Hysteresis
BYPASS Pin
Shunt Voltage
Soft-Start Time
VBP = 5 V,
TJ = 65 °C
2.6
-4.1
-3.4
-2.7
LYT4x12
-7.3
-6.1
-4.9
LYT4x13-4x17
-12
-9.5
-7.0
LYT4x18
-13.3
-10.8
-8.3
LYT4x11
-0.85
-0.62
-0.43
LYT4x12
-3.5
-2.4
-1.7
LYT4x13-4x17
-6.5
-4.35
-3.1
LYT4x18
-7.5
-5.5
-4.25
See Note A, B
0.7
VBP
0 °C < TJ < 100 °C
5.75
5.95
VBP(H)
0 °C < TJ < 100 °C
VBP(SHUNT)
IBP = 4 mA
0 °C < TJ < 100 °C
6.1
6.4
tSOFT
TJ = 65 °C
VBP = 5.9 V
55
76
kHz
kHz
LYT4x11
BYPASS Pin
Charge Current
ICH2
5.4
TJ = 65 °C
See Note B
fM
ICH1
Average
mA
%/°C
6.15
0.85
V
V
6.6
V
ms
13
www.power.com
Rev. E 11/14
LYT4211-4218/4311-4318
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
ICD2
0 °C < TJ < 100 °C
FET Not Switching
0.5
0.8
1.2
ICD1
0 °C < TJ < 100 °C
FET Switching at fOSC
1
2.5
4
115
123
131
Units
Control Functions (cont.)
Drain Supply Current
mA
VOLTAGE MONITOR Pin
TJ = 65 °C
RR = 24.9 kW
RR = 49.9 kW
Threshold
Line Overvoltage
Threshold
IOV
VOLTAGE MONITOR
Pin Voltage
VV
0 °C < TJ < 100 °C
IV < IOV
2.75
3.0
3.25
V
IV(SC)
VV = 5 V
TJ = 65 °C
165
185
205
mA
VV(REM)
TJ = 65 °C
0.5
FEEDBACK Pin Current
at Onset of Maximum
Duty Cycle
IFB(DCMAXR)
0 °C < TJ < 100 °C
FEEDBACK Pin Current
Skip Cycle Threshold
IFB(SKIP)
0 °C < TJ < 100 °C
210
Maximum Duty Cycle
DCMAX
IFB(DCMAXR) < IFB < IFB(SKIP)
0 °C < TJ < 100 °C
90
VFB
IFB = 150 mA
0 °C < TJ < 100 °C
2.1
IFB(SC)
VFB = 5 V
TJ = 65 °C
320
DC10
IFB = IFB(AR), TJ = 65 °C, See Note B
17
DC40
IFB = 40 mA, TJ = 65 °C
34
DC60
IFB = 60 mA, TJ = 65 °C
55
tAR
TJ = 65 °C
VBP = 5.9 V
Auto-Restart
Duty Cycle
DCAR
TJ = 65 °C
See Note B
SOA Minimum Switch
ON-Time
tON(SOA)
TJ = 65 °C
See Note B
IFB(AR)
0 °C < TJ < 100 °C
VOLTAGE MONITOR Pin
Short-Circuit Current
Remote ON/OFF
Threshold
Hysteresis
6
mA
V
FEEDBACK Pin
FEEDBACK Pin Voltage
FEEDBACK Pin
Short-Circuit Current
Duty Cycle Reduction
90
mA
mA
99.9
%
2.3
2.56
V
400
480
mA
%
Auto-Restart
Auto-Restart ON-Time
FEEDBACK Pin Current
During Auto-Restart
55
76
ms
25
%
6.5
0.875
ms
10
mA
14
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
Units
1.223
1.245
1.273
V
48.69
49.94
51.19
mA
REFERENCE Pin
REFERENCE Pin
Voltage
VR
REFERENCE Pin
Current
IR
RR = 24.9 kW
0 °C < TJ < 100 °C
Current Limit/Circuit Protection
Full Power
Current Limit
(CBP = 4.7 mF)
Reduced Power
Current Limit
(CBP = 47 mF)
Minimum ON-Time
Pulse
di/dt = 174 mA/ms
LYT4x12
1.00
1.17
di/dt = 174 mA/ms
LYT4x13
1.24
1.44
ILIMIT(F)
di/dt = 225 mA/ms
LYT4x14
1.46
1.70
TJ = 65 °C
di/dt = 320 mA/ms
LYT4x15
1.76
2.04
di/dt = 350 mA/ms
LYT4x16
2.43
2.83
di/dt = 426 mA/ms
LYT4x17
3.26
3.79
di/dt = 133 mA/ms
LYT4x11
0.74
0.86
di/dt = 195 mA/ms
LYT4x12
0.81
0.95
di/dt = 192 mA/ms
LYT4x13
1.00
1.16
ILIMIT(R)
di/dt = 240 mA/ms
LYT4x14
1.19
1.38
TJ = 65 °C
di/dt = 335 mA/ms
LYT4x15
1.43
1.66
di/dt = 380 mA/ms
LYT4x16
1.76
2.05
di/dt = 483 mA/ms
LYT4x17
2.35
2.73
di/dt = 930 mA/ms
LYT4x18
4.90
5.70
tLEB + tIL(D)
TJ = 65 °C
300
Leading Edge
Blanking Time
tLEB
TJ = 65 °C
See Note B
150
Current Limit Delay
tIL(D)
TJ = 65 °C
See Note B
Thermal Shutdown
Temperature
See Note B
Thermal Shutdown
Hysteresis
See Note B
BYPASS Pin Power-Up
Reset Threshold
Voltage
VBP(RESET)
0 °C < TJ < 100 °C
500
155
ns
500
ns
ns
164
3.30
°C
°C
56
2.25
A
700
150
147
A
4.25
V
15
www.power.com
Rev. E 11/14
LYT4211-4218/4311-4318
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
TJ = 65 °C
11.5
13.2
TJ = 100 °C
13.5
15.5
TJ = 65 °C
6.9
8.0
TJ = 100 °C
8.4
9.7
TJ = 65 °C
5.3
6.0
TJ = 100 °C
6.3
7.3
TJ = 65 °C
3.4
3.9
TJ = 100 °C
3.9
4.5
TJ = 65 °C
2.5
2.9
TJ = 100 °C
3.0
3.4
TJ = 65 °C
1.9
2.2
TJ = 100 °C
2.3
2.7
TJ = 65 °C
1.7
2.0
TJ = 100 °C
2.0
2.4
TJ = 65 °C
1.3
1.5
TJ = 100 °C
1.6
1.8
Units
Output
LYT4x11
ID = 100 mA
LYT4x12
ID = 100 mA
LYT4x13
ID = 150 mA
ON-State Resistance
RDS(ON)
LYT4x14
ID = 150 mA
LYT4x15
ID = 200 mA
LYT4x16
ID = 250 mA
LYT4x17
ID = 350 mA
LYT4x18
ID = 600 mA
OFF-State Drain
Leakage Current
Breakdown Voltage
W
IDSS
VBP = 6.4 V
VDS = 560 V
TJ = 100 °C
BVDSS
VBP = 6.4 V
TJ = 65 °C
725
V
TJ < 100 °C
36
V
Minimum Drain
Supply Voltage
Rise Time
tR
Fall Time
tF
Measured in a Typical Flyback
See Note B
50
mA
100
V
50
ns
NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing
temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature.
B. Guaranteed by characterization. Not tested in production.
16
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Power (mW)
Scaling Factors:
LYT4x11 0.18
LYT4x12 0.28
LYT4x13 0.38
LYT4x14 0.56
LYT4x15 0.75
LYT4x16 1.00
LYT4x17 1.16
LYT4x18 1.55
1000
100
10
1
100
200
300
400
500
300
PI-6715-072313
DRAIN Capacitance (pF)
10000
Scaling Factors:
LYT4x11 0.18
LYT4x12 0.28
LYT4x13 0.38
LYT4x14 0.56
LYT4x15 0.75
LYT4x16 1.00
LYT4x17 1.16
LYT4x18 1.55
200
100
0
600
0
DRAIN Pin Voltage (V)
3
Scaling Factors:
LYT4x11 0.18
LYT4x12 0.28
LYT4x13 0.38
LYT4x14 0.56
LYT4x15 0.75
LYT4x16 1.00
LYT4x17 1.16
LYT4x18 1.55
2
1
LYT4x28 TCASE = 25 °C
LYT4x28 TCASE = 100 °C
0
0
2
4
6
8 10 12 14 16 18 20
DRAIN Voltage (V)
Figure 16. Drain Current vs. Drain Voltage.
1.2
PI-6909-110512
PI-6717-071012
Figure 15. Power vs. Drain Voltage.
DRAIN Current
(Normalized to Absolute Maximum Rating)
DRAIN Current (A)
4
100 200 300 400 500 600 700
DRAIN Voltage (V)
Figure 14. Drain Capacitance vs. Drain Pin Voltage.
5
PI-6716-071012
Typical Performance Characteristics
1
0.8
0.6
0.4
0.2
0
0
100 200 300 400 500 600 700 800
DRAIN Voltage (V)
Figure 17. Maximum Allowable Drain Current vs. Drain Voltage.
17
www.power.com
Rev. E 11/14
LYT4211-4218/4311-4318
eSIP-7C (E Package)
2
A
C
0.403 (10.24)
0.397 (10.08)
0.264 (6.70)
Ref.
0.081 (2.06)
0.077 (1.96)
B
Detail A
2
0.290 (7.37)
Ref.
0.519 (13.18)
Ref.
0.325 (8.25)
0.320 (8.13)
Pin #1
I.D.
0.140 (3.56)
0.120 (3.05)
3
0.047 (1.19)
0.118 (3.00)
FRONT VIEW
SIDE VIEW
4
0.033 (0.84)
6×
0.028 (0.71)
0.010 M 0.25 M C A B
0.100 (2.54)
3 0.016 (0.41) 6×
0.011 (0.28)
0.020 M 0.51 M C
10° Ref.
All Around
0.207 (5.26)
0.187 (4.75)
0.016 (0.41)
Ref.
0.070 (1.78) Ref.
0.050 (1.27)
0.198 (5.04) Ref.
BACK VIEW
0.100 (2.54)
0.021 (0.53)
0.019 (0.48)
0.050 (1.27)
0.020 (0.50)
0.060 (1.52)
Ref.
0.050 (1.27)
PIN 1
0.378 (9.60)
Ref.
0.048 (1.22)
0.046 (1.17)
0.059 (1.50)
0.019 (0.48) Ref.
0.155 (3.93)
0.023 (0.58)
END VIEW
PIN 7
0.027 (0.70)
0.059 (1.50)
DETAIL A
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions noted are determined at the outermost extremes of the plastic
body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but
including any mismatch between the top and bottom of the plastic body.
Maximum mold protrusion is 0.007 [0.18] per side.
0.100 (2.54) 0.100 (2.54)
MOUNTING HOLE PATTERN
(not to scale)
3. Dimensions noted are inclusive of plating thickness.
4. Does not include inter-lead flash or protrusions.
5. Controlling dimensions in inches (mm).
PI-4917-020515
Part Ordering Information
• LYTSwitch-4 Product Family
• 4 Series Number
• PFC/Dimming
2
PFC No Dimming
3
PFC Dimming
• Voltage Range
1
Low-Line
• Device Size
• Package Identifier
LYT 4 2 1 3 E
E
eSIP-7C
18
Rev. E 11/14
www.power.com
LYT4211-4218/4311-4318
Revision
Notes
Date
A
Initial Release.
11/12
B
Corrected Min and Typ parameter table values on pages 13 and 14.
02/13
B
Updated parameters ICH1, ICH2, ICD1, DCAR, ILIMIT(F), ILIMIT(R), on pages 13, 14 and 15.
C
Updated figures 1, 3a, 3b, 3c, 3d, 8, 9 and 13.
06/13
D
Added Note 6 to Absolute Maximum Ratings section.
10/13
E
Removed L pin parts, updated ICH2, BVDSS, Thermal Shutdown Temperature and Hysteresis parameters per PCN-14441.
02/20/13
11/11/14
19
www.power.com
Rev. E 11/14
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD
PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be
covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power
Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers
a license under certain patent rights as set forth at http://www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)
whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in
significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero,
HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are
trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc.
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LYT4221-4228/4321-4328
™
LYTSwitch-4
High Power LED Driver IC Family
Single-Stage Accurate Primary-Side Constant Current (CC) Controller with
PFC for High-Line Applications with TRIAC Dimming and Non-Dimming Options
Product Highlights
•
•
•
•
•
•
•
Better than ±5% CC regulation
TRIAC dimmable to less than 5% output
Fast start-up
• 80%.
3. Minimum output power requires CBP = 47 µF.
4. Maximum output power requires CBP = 4.7 µF.
5. LYT4321 CBP = 47 µF, LYT4221 CBP = 4.7 µF.
6. Package: eSIP-7C (see Figure 2).
www.power.com
November 2014
This Product is Covered by Patents and/or Pending Patent Applications.
LYT4221-4228/4321-4328
Topology
Isolation
Efficiency
Cost
THD
Output Voltage
Yes
No
No
No
88%
92%
89%
90%
High
Low
Middle
Low
Best
Good
Best
Best
Any
Limited
Any
High-Voltage
Isolated Flyback
Buck
Tapped Buck
Buck-Boost
Table 2.
Performance of Different Topologies in a Typical Non-Dimmable 10 W High-Line Design.
Typical Circuit Schematic
Key Features
Flyback
AC
IN
LYTSwitch-4
V
D
CONTROL
S
R
BP
FB
PI-6800-050913
Figure 3a. Typical Isolated Flyback Schematic.
Benefits
• Provides isolated output
• Supports widest range of output voltages
• Very good THD performance
Limitations
• Flyback transformer
• Overall efficiency reduced by parasitic capacitance
and inductance in the transformer
• Larger PCB area to meet isolation requirements
• Requires additional components (primary clamp and bias)
• Higher RMS switch and winding currents increases losses
and lowers efficiency
Buck
AC
IN
LYTSwitch-4
V
D
CONTROL
S
R
BP
FB
PI-6841-111813
Benefits
• Highest efficiency
• Lowest component count – small size
• Simple low-cost power inductor
• Low drain source voltage stress
• Best EMI/lowest component count for filter
Limitations
• Single input line voltage range
• Output voltage 0.9). The design
is fully protected from faults such as no-load (open-load), overvoltage and output short-circuit or overload conditions and
over-temperature.
Circuit Description
The LYTSwitch-4 high-line device (U1-LYT4324E) integrates the
power FET, controller and start-up functions into a single package
reducing the component count versus typical implementations.
Configured as part of an isolated continuous conduction mode
flyback converter, U1 provides high power factor via its internal
control algorithm together with the small input capacitance of
the design. Continuous conduction mode operation results in
reduced primary peak and RMS current. This both reduces
EMI noise, allowing simpler, smaller EMI filtering components
and improves efficiency. Output current regulation is maintained
without the need for secondary-side sensing which eliminates
current sense resistors and improves efficiency.
Input Stage
Fuse F1 provides protection from component failures while RV1
provides a clamp during differential line surges, keeping the
peak drain voltage of U1 below the device absolute maximum
rating of the internal power FET. Bridge rectifier BR1 rectifies
the AC line voltage. EMI filtering is provided by L1, L2, C4, C5,
R3 and R12 together with the safety rated Y class capacitor
(CY1) that bridges the safety isolation barrier between primary
and secondary. Resistor R3 and R12 damp any resonances
formed between L1, L2, C4 and the AC line impedance. A small
bulk capacitor (C5) is required to provide a low impedance path
for the primary switching current. The maximum value of C4
and C5 is limited in order to maintain a power factor of greater
than 0.9.
LYTSwitch-4 High-Line Primary
To provide peak line voltage information to U1 the incoming
rectified AC peak charges C6 via D2. This is then fed into the
VOLTAGE MONITOR pin of U1 as a current via R14 and R15.
This sensed current is also used by the device to set the line
input overvoltage protection threshold. Resistor R13 provides a
discharge path for C6 with a time constant much longer than that
of the rectified AC to minimize generation of line frequency ripple.
The VOLTAGE MONITOR pin current and the FEEDBACK pin
current are used internally to control the average output LED
current. For TRIAC phase-dimming or non-dimming applications
the same value of resistance 24.9 kW is used on the REFERENCE
pin resistor (R18) and 4 MW (R14 + R15) on the VOLTAGE MONITOR
pin to provide a linear relationship between input voltage and
the output current and maximizing the dimming range.
C13
R25 100 pF
30 Ω 200 V
R13
510 kΩ
1/8 W
R7
162 kΩ
1%
R4
1 MΩ
1
4
R3
12 kΩ
1/8 W
L1
RM5
D1
BAV21
C1
220 nF
400 V
R2
R1
510 Ω 510 Ω
1%
1%
L
TP1
190 - 265
VAC
R6
2.4 MΩ
N
TP2
Q2
MMBT3906
Q1
MMBT3906
R27
R28
510 Ω 510 Ω
1%
1%
F1
5A
C2
47 pF
1 kV
C4
120 nF
400 V
4
1
L2 2
5 mH
VR1
1N5245B-T
15 V
R10
15 Ω
R9
30.1 kΩ
1%
3
C3
22 nF
50 V
C5
220 nF
400 V
TP3
RTN
R22
39 Ω
1/8 W
C11
D6
BAV21 100 nF
50 V
R21
20 kΩ
1/8 W
TP4
C9
56 µF
50 V
T1
RM7/1
R19
6.2 kΩ
V
CONTROL
S
R12
47 kΩ
C15
C14
36 V,
330 µF 330 µF R26
63 V 7.5 kΩ 550 mA
63 V
D4
US1D
C6
2.2 µF
400 V
D
R11
240 Ω
2W
FL2
8
LYTSwitch-4
U1
LYT4324E
Q3
IRFU320PBF
3
7
D3
US1J
R15
2 MΩ
1%
R5
1 MΩ
2
FL1
6
R14
2 MΩ
1%
R8
162 kΩ
1%
RV1
250 VAC
1
D8
BYW29-200
C7
2.2 nF
630 V
R
BP
D5
BAV16WS-7-F
BR1
B10S-G
1000 V
D2
DFLU1400-7
VR4
SMAJ200A-13-F
200 V
FB
R18
24.9 kΩ
1%
1/16 W
C8
100 µF
10 V
D7
BAV21WS-7-F
R20
133 kΩ
1%
1/8 W
VR2
MMSZ5256BS-7-F
33 V
Application Example
Q4
MMBT3904LT1G
C10
10 nF
50 V
R23
10 Ω
1/10 W
C12
100 nF
50 V
R24
1 kΩ
1/10 W
CY1
470 pF
250 VAC
PI-7088-072913
Figure 8. DER-396 Schematic of an Isolated, TRIAC Dimmable, High Power Factor, 185 – 265 VAC, 20 W / 36 V LED Driver.
6
Rev. C 11/14
www.power.com
LYT4221-4228/4321-4328
Diode D3, VR4 and C7 clamp the drain voltage to a safe level
due to the effects of leakage inductance. Diode D4 is
necessary to prevent reverse current from flowing through U1
for the period of the rectified AC input voltage that the voltage
across C5 falls to below the reflected output voltage (VOR).
Diode D6, C9, C11, R21 and R22 create the primary bias supply
from an auxiliary winding on the transformer. Capacitor C8
provides local decoupling for the BYPASS pin of U1 which is the
supply pin for the internal controller. During start-up C8 is
charged to ~6 V from an internal high-voltage current source
tied to the device DRAIN pin. This allows the part to start
switching at which point the operating supply current is provided
from the bias supply via R19 and D5. Capacitor C8 also selects
the output power mode (47 mF for reduced power was selected
to reduce dissipation in U1 and increase efficiency).
Feedback
The bias winding voltage is proportional to the output voltage
(set by the turn ratio between the bias and secondary windings).
This allows the output voltage to be monitored without secondaryside feedback components. Resistor R20 converts the bias
voltage into a current which is fed into the FEEDBACK pin of U1.
The internal engine within LYTSwitch-4 (U1) combines the
FEEDBACK pin current, the VOLTAGE MONITOR pin current
and drain current information to provide a constant output
current over up to 1.5 : 1 output voltage variation (LED string
voltage variation of ±25%) at a fixed line input voltage.
To limit the output voltage at no-load an output overvoltage
protection circuit is set by D7, C12, R24, VR2, R23, C10 and Q4.
Should the output load be disconnected the bias voltage will
increase until VR2 conducts, biasing Q4 to turn on via R23 and
pulling down current going into the FEEDBACK pin. When the
feedback current drops below 10 mA the part enters autorestart and the switching of the MOSFET is disabled for 600 ms,
allowing time for the output and bias voltages to fall.
Output Rectification
The transformer secondary winding is rectified by D8 and
filtered by C14 and C15. An ultrafast TO-220 diode was
selected for efficiency and the combined value of C11 and C12
were selected to give peak-to-peak LED ripple current equal to
30% of the mean value. For designs where lower ripple is
desirable the output capacitance value can be increased.
A small pre-load is provided by R26 which discharges residual
charge in output capacitors when turned off.
TRIAC Phase Dimming Control Compatibility
The requirement to provide output dimming with low cost,
TRIAC-based, leading edge phase dimmers introduces a
number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting
the current drawn by the overall lamp is below the holding
current and/or latching of the TRIAC within the dimmer. This
can cause undesirable behaviors such as limited dimming
range and/or flickering as the TRIAC fires inconsistently. The
relatively large impedance the LED lamp presents to the line
allows significant ringing to occur due to the inrush current
charging the input capacitance when the TRIAC turns on. This
too can cause similar undesirable behavior as the ringing may
cause the TRIAC current to fall to zero and turn off.
To overcome these issues two simple circuits, the MOSFET
active damper and RC passive bleeder were employed.
Employing these circuits however comes without penalty, since
their purpose is to satisfy the holding and latching current of a
TRIAC by providing some low impedance path for the TRIAC
current to flow continuously during the turn-on phase will
introduce additional dissipation and therefore reduced system
efficiency of the supply. For non-dimming applications these
circuits can simply be omitted (see Figure 9).
Power Integrations proprietary active damper circuit is used in
this design for achieving high efficiency, good dimmer
compatibility and line surge protection.
MOSFET Q3 is always on during non-dimming (no TRIAC
connected) operation. It bypasses the loss across the damper
resistor (R11) via the low RDS(ON) of the MOSFET Q3 thereby
maintaining high system efficiency. The gate of Q3 is biased
through the divider of R4, R5, and R6 and filtered by C13.
While Q3 is always on during non-dimming operation, MOSFET
Q3 operates differently during dimming. When the TRIAC turns
on at the beginning of every AC half-line cycle MOSFET Q3 is
off initially allowing the resistor (R11) to damp the current ringing
due to inrush of current induced by the input bulk capacitance
and EMI filter impedance. After approximately 1 ms Q3 turns
on and bypasses R11. The effect is increased compatibility with
different types of dimmers.
During differential line surge occurrence where a high dv/dt is
detected through the RC high-pass filter R7, R8 and C2.
Transistor Q2 will turn off Q3 and a voltage proportional to the
input current that will develop across the damper resistor will be
subtracted from the input thus limiting the voltage stress on the
DRAIN pin of U1.
Resistor R9 bleeds the charge from C2 and ensures Q2 is off
during normal operation.
The passive bleeder circuit is comprised of R1, R2, R27, R28
and C1. This network helps keep the input current above the
TRIAC holding current while the input current corresponding to
the effective driver resistance increases during each AC half-cycle.
7
www.power.com
Rev. C 11/14
LYT4221-4228/4321-4328
Modified DER-396 20 W High Power Factor LED Driver
for Non-Dimmable and Enhanced Line Regulation
•
•
•
The circuit schematic in Figure 9 shows a high power factor
LED driver based on a LYT4224E from the LYTSwitch-4 nondimming high-line family of devices. It was optimized to drive
an LED string at a voltage of 36 V with a constant current of
0.55 A, ideal for high lumens PAR lamp retro-fit applications.
The design operates over the high-line input voltage range of
185 VAC to 265 VAC and is non-dimming application. A nondimming application has tighter output current variation with
changes in the line voltage than a dimming application. It’s key
to note that, although not specified for dimming, no circuit
damage will result if the end user does operate the design with
a phase controlled dimmer.
•
•
Efficiency of 85%
Device local ambient of 70 °C
Sufficient heat sinking to keep the device temperature
below 100 °C
For minimum output power column
• Reflected output voltage (VOR) of 135 V
• FEEDBACK pin current of 135 mA
• BYPASS pin capacitor value of 47 mF
For maximum output power column
• Reflected output voltage (VOR) of 90 V
• FEEDBACK pin current of 165 mA
• BYPASS pin capacitor value of 4.7 mF
• (LYT4x21 = 4.7 mF)
Note that input line voltages above 185 VAC do not change the
power delivery capability of LYTSwitch-4 high-line devices.
Modification for Non-Dimmable Configuration
The DER-396 is configurable for non-dimmable application by
simply removing the components of the MOSFET active damper
(R4, R5, R6, R7, R8, R9, R10, R11, D1, Q1, Q2, C3, and VR1)
and passive R-C bleeder (R1, R2, R27, R28 and C1) and replacing
the IC U1 to LYT4224E, non-dimmable device LYTSwitch-4 nondimming high-line family. For non-dimmable application audible
noise is not critical so L1 and L2 can be replaced with a regular
off-the-shelf dog bone inductor for cost reduction (See Figure 9).
Device Selection
Select the device size by comparing the required output power
to the values in Table 1. For thermally challenging designs, e.g.,
incandescent lamp replacement, where either the ambient
temperature local to the LYTSwitch-4 high-line device is high
and/or there is minimal space for heat sinking use the minimum
output power column. This is selected by using a 47 mF BYPASS
pin capacitor and results in a lower device current limit and
therefore lower conduction losses. For open frame design or
designs where space is available for heat sinking then refer to the
maximum output power column. This is selected by using a
4.7 mF BYPASS pin capacitor for all but the LYT4x21 which has only
one power setting. In all cases in order to obtain the best output
current tolerance maintain the device temperature below 100 °C.
Key Application Considerations
Power Table
The data sheet power table (Table 1) represents the minimum
and maximum practical continuous output power based on the
following assumed conditions:
C13
R25 100 pF
30 Ω 200 V
VR4
SMAJ200A-13-F
200 V
D3
US1J
8
R19
6.2 kΩ
L
TP1
190 - 265
VAC
V
CONTROL
S
R12
47 kΩ
1/8 W
N
TP2
TP4
C9
56 µF
50 V
D4
US1D
C6
2.2 µF
400 V
D
F1
5A
C11
D6
BAV21 100 nF
50 V
R21
20 kΩ
1/8 W
T1
RM7/1
LYTSwitch-4
U1
LYT4224E
L3
1.5 mH
TP3
RTN
R22
39 Ω
1/8 W
R
BP
FB
R18
24.9 kΩ
1%
1/16 W
C8
47 µF
16 V
R20
133 kΩ
1%
1/8 W
D7
BAV21WS-7-F
VR2
MMSZ5256BS-7-F
33 V
L1
1.5 mH
C5
220 nF
400 V
C15
C14
36 V,
330 µF 330 µF R26
63 V 7.5 kΩ 550 mA
63 V
FL2
6
D5
BAV16WS-7-F
R3
12 kΩ
1/8 W
R29
12 kΩ
1/8 W
7
R15
2 MΩ
1%
C4
120 nF
400 V
FL1
D8
BYW29-200
C7
2.2 nF
630 V
R14
2 MΩ
1%
BR1
B10S-G
1000 V
RV1
250 VAC
D2
DFLU1400-7
R13
510 kΩ
1/8 W
1
Q4
MMBT3904LT1G
C10
10 nF
50 V
R23
10 Ω
1/10 W
C12
100 nF
50 V
R24
1 kΩ
1/10 W
L2
1.5 mH
CY1
470 pF
250 VAC
PI-7089-102313
Figure 9. Modified Schematic of DER-396 for Non-Dimmable, Isolated, High Power Factor, 185-265 VAC, 20 W / 36 V LED Driver.
8
Rev. C 11/14
www.power.com
LYT4221-4228/4321-4328
Maximum Input Capacitance
To achieve high power factor, the capacitance used in both the
EMI filter and for decoupling the rectified AC (bulk capacitor)
must be limited in value. The maximum value is a function of
the output power of the design and reduces as the output
power reduces. For the majority of designs limit the total
capacitance to less than 220 nF with a bulk capacitor value of
100 nF. Film capacitors are recommended compared to
ceramic types as they minimize audible noise with operating
with leading edge phase dimmers. Start with a value of 10 nF
for the capacitance in the EMI filter and increase in value until
there is sufficient EMI margin.
REFERENCE Pin Resistance Value Selection
The LYTSwitch-4 high-line family contains phase dimming
devices, LYT4321-4328, and non-dimming devices, LYT42214228. Both the non-dimmable devices and dimmable devices
use 24.9 kW ±1% REFERENCE pin resistor for best output
current tolerance (over AC input voltage changes).
VOLTAGE MONITOR Pin Resistance Network Selection
For widest AC phase angle dimming range with LYT4321-4328,
use a 4 MW resistor connected to the line voltage peak detector
circuit. Make sure that the resistor’s voltage rating is sufficient
for the peak line voltage. If necessary use multiple series
connected resistors.
Primary Clamp and Output Reflected Voltage VOR
A primary clamp is necessary to limit the peak drain to source
voltage. A Zener clamp requires the fewest components and
board space and gives the highest efficiency. RCD clamps are
also acceptable however the peak drain voltage should be carefully verified during start-up and output short-circuits as the
clamping voltage varies with significantly with the peak drain
current.
For the highest efficiency, the clamping voltage should be
selected to be at least 1.5 times the output reflected voltage,
VOR, as this keeps the leakage spike conduction time short.
When using a Zener clamp in a universal input or high-line only
application, a VOR of less than 135 V is recommended to allow
for the absolute tolerances and temperature variations of the
Zener. This will ensure efficient operation of the clamp circuit
and will also keep the maximum drain voltage below the rated
breakdown voltage of the FET. An RCD (or RCDZ) clamp
provides tighter clamp voltage tolerance than a Zener clamp.
The RCD clamp is more cost-effective than the Zener clamp but
requires more careful design to ensure that the maximum drain
voltage does not exceed the power FET breakdown voltage.
These VOR limits are based on the BVDSS rating of the internal
FET, a VOR of 90 V to 120 V is typical for most designs, giving
the best PFC and regulation performance.
Series Drain Diode
An ultrafast or Schottky diode in series with the drain is
necessary to prevent reverse current flowing through the device.
The voltage rating must exceed the output reflected voltage,
VOR. The current rating should exceed two times the average
primary current and have a peak rating equal to the maximum
drain current of the selected LYTSwitch-4 high-line device.
Line Voltage Peak Detector Circuit
LYTSwitch-4 high-line devices use the peak line voltage to
regulate the power delivery to the output. A capacitor value of
1 mF to 4.7 mF is recommended to minimize line ripple and give
the highest power factor (>0.9), smaller values are acceptable
but result in lower PF and higher line current distortion.
Operation with Phase Controlled Dimmers
Dimmer switches control incandescent lamp brightness by not
conducting (blanking) for a portion of the AC voltage sine wave.
This reduces the RMS voltage applied to the lamp thus reducing
the brightness. This is called natural dimming and the LYTSwitch-4
high-line LYT4321-4328 devices when configured for dimming
utilize natural dimming by reducing the LED current as the RMS
line voltage decreases. By this nature, line regulation performance
is purposely decreased to increase the dimming range and
more closely mimic the operation of an incandescent lamp.
Leading Edge Phase Controlled Dimmers
The requirement to provide flicker-free output dimming with lowcost, TRIAC-based, leading edge phase dimmers introduces a
number of trade-offs in the design.
Due to the much lower power consumed by LED based lighting
the current drawn by the overall lamp is below the holding
current of the TRIAC within the dimmer. This causes undesirable
behaviors such as limited dimming range and/or flickering. The
relatively large impedance the LED lamp presents to the line
allows significant ringing to occur due to the inrush current
charging the input capacitance when the TRIAC turns on. This
too can cause similar undesirable behavior as the ringing may
cause the TRIAC current to fall to zero and turn off.
To overcome these issues two circuits, the active damper and
passive bleeder, are incorporated. The drawback of these
circuits is increased dissipation and therefore reduced efficiency
of the supply so for non-dimming applications these components
can simply be omitted.
Figure 10(a) shows the line voltage and current at the input of a
leading edge TRIAC dimmer with Figure 10(b) showing the
resultant rectified bus voltage. In this example, the TRIAC
conducts at 90 degrees.
Figure 11 shows undesired rectified bus voltage and current
with the TRIAC turning off prematurely and restarting.
If the TRIAC is turning off before the end of the half-cycle
erratically or alternate half AC cycles have different conduction
angles then flicker will be observed in the LED light due to
variations in the output current. This can be solved by including
a bleeder and damper circuit.
Dimmers will behave differently based on manufacturer and
power rating, for example a 300 W dimmer requires less
dampening and requires less power loss in the bleeder than a
600 W or 1000 W dimmer due to different drive circuits and
TRIAC holding current specifications. Line voltage also has a
significant impact as at high-line for a given output power the
9
www.power.com
Rev. C 11/14
0.25
150
0.15
50
0.05
-50 0.5
50
100
150
200
250
300
350
400
-0.05
-150
-0.15
-250
-0.25
-350
-0.35
300
200
0.2
150
0.15
100
0.1
50
0.05
0.35
0.3
250
0.25
200
0.2
150
0.15
100
0.1
50
0.05
50
100
150
200
250
300
350
100
150
200
250
300
350
400
PI-5986-060810
350
0
0
50
Conduction Angle (°)
400
Conduction Angle (°)
Figure 10b. Resultant Waveforms Following Rectification of TRIAC Dimmer Output.
input current and therefore TRIAC current is lower but the peak
inrush current when the input capacitance charges is higher
creating more ringing. Finally multiple lamps in parallel driven from
the same dimmer can introduce more ringing due to the increased
capacitance of parallel units. Therefore, when testing dimmer
operation verify on a number of models, different line voltages
and with both a single driver and multiple drivers in parallel.
Start by adding a bleeder circuit. Add a 0.44 mF capacitor and
510 W 1 W resistor (components in series) across the rectified
bus (C1 and R1, R2, R27, R28 in Figure 8). If the results in
satisfactory operation reduce the capacitor value to the smallest
that result in acceptable performance to reduce losses and
increase efficiency.
If the bleeder circuit does not maintain conduction in the TRIAC,
then add an active damper as shown in Figure 8. This circuit
limits the inrush current that flows to charge C4 and C5 when
the TRIAC turns on by placing the damper resistor (R11, R29) in
series for the first 1 ms of the TRIAC conduction. After approximately 1 ms, Q3 turns on and shorts the damper resistor. This
keeps the power dissipation on the damper resistor low and
allows a larger value to be used during current limiting. Increasing
the delay before Q3 turns on by increasing the value of capacitor
Dimmer Output Voltage (V)
Rectified Input Voltage (V)
Voltage
Current
0
0
0
Figure 11. Example of Phase Angle Dimmer Showing Erratic Firing.
Rectified Input Current (A)
PI-5984-060810
0.3
0.25
Conduction Angle (°)
350
0.35
250
0
Figure 10a. Ideal Input Voltage and Current Waveforms for a Leading Edge
TRIAC Dimmer at 90° Conduction Angle.
300
Voltage
Current
Voltage
Current
250
0.35
0.25
150
0.15
50
0.05
-50 0
50
100
150
200
250
300
350
-0.05
-150
-0.15
-250
-0.25
-350
-0.35
Conduction Angle (°)
Figure 12. Ideal Dimmer Output Voltage and Current Waveforms for a Trailing
Edge Dimmer at 90° Conduction Angle.
C3 will improve dimmer compatibility but cause more power to
be dissipated across the damper resistor. Monitor the AC line
current and voltage at the input of the power supply as you
make the adjustments. Increase the delay until the TRIAC
operates properly but keep the delay as short as possible for
efficiency.
As a general rule the greater the power dissipated in the bleeder
and damper circuits, the more types of dimmers will work with
the driver.
Trailing Edge Phase Controlled Dimmers
Figure 12 shows the line voltage and current at the input of the
power supply with a trailing edge dimmer. In this example, the
dimmer conducts at 90 degrees. Many of these dimmers use
back-to-back connected power FETs rather than a TRIAC to
control the load. This eliminates the holding current issue of
TRIACs and since the conduction begins at the zero crossing, high
current surges and line ringing are minimized. These types of
dimmers do not require damping circuits but do require a
bleeder. However the bleeder ensures that the AC voltage
across the dimmer falls to a low enough level for the dimmer to
correctly detect zero crossing. This is used internally by the
dimmer for timing.
10
Rev. C 11/14
Rectified Input Current (A)
250
PI-5985-060810
350
www.power.com
Dimmer Output Current (A)
Voltage
Current
0.35
Rectified Input Voltage (V)
PI-5983-060810
350
Line Current (Through Dimmer) (A)
Line Voltage (at Dimmer Input) (V)
LYT4221-4228/4321-4328
LYT4221-4228/4321-4328
Audible Noise Considerations for use with
Leading Edge Dimmers
Noise created when dimming is typically created by the input
capacitors, EMI filter inductors and the transformer. The input
capacitors and inductors experience high di/dt and dv/dt every
AC half-cycle as the TRIAC fires and an inrush current flows to
charge the input capacitance. Noise can be minimized by
selecting film vs. ceramic capacitors, minimizing the capacitor
value and selecting inductors that are physically short and wide.
The transformer may also create noise which can be minimized
by avoiding cores with long narrow legs (high mechanical
resonant frequency). For example, RM cores produce less
audible noise than EE cores for the same flux density. Reducing
the core flux density will also reduce the noise. Reducing the
maximum flux density (BM) to 1500 Gauss usually eliminates
any audible noise but must be balanced with the increased core
size needed for a given output power.
Thermal and Lifetime Considerations
Lighting applications present thermal challenges to the driver.
In many cases the LED load dissipation determines the working
ambient temperature experienced by the drive so thermal
evaluation should be performed with the driver inside the final
enclosure. Temperature has a direct impact on driver and LED
Input EMI Filter
LYT4224E
Bullk
Capacitor
lifetime. For every 10 °C rise in temperature, component life is
reduced by a factor of 2. Therefore it is important to properly
heat sink and to verify the operating temperatures of all devices.
Layout Considerations
Primary-Side Connections
Use a single point (Kelvin) connection at the negative terminal of
the input filter capacitor for the SOURCE pin and bias returns.
This improves surge capabilities by returning surge currents
from the bias winding directly to the input filter capacitor. The
BYPASS pin capacitor should be located as close to the BYPASS
pin and connected as close to the SOURCE pin as possible.
The SOURCE pin trace should not be shared with the main
power FET switching currents. All FEEDBACK pin components
that connect to the SOURCE pin should follow the same rules
as the BYPASS pin capacitor. It is critical that the main power
FET switching currents return to the bulk capacitor with the
shortest path as possible. Long high current paths create
excessive conducted and radiated noise.
Secondary-Side Connections
The output rectifier and output filter capacitor should be as
close as possible. The transformer’s output return pin should
have a short trace to the return side of the output filter capacitor.
BYPASS Pin
Capacitor Clamp Transformer Output
Diode
Output
Capacitor
REFERENCE Pin
Resistor
FEEDBACK Pin
Resistor
VOLTAGE MONITOR Pin
Resistor
Output
Capacitors
PI-7096-102313
Figure 13. DER-396 20 W Layout Example, Top Silkscreen / Bottom Layer.
11
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Rev. C 11/14
LYT4221-4228/4321-4328
Quick Design Checklist
Maximum Drain Voltage
Verify that the peak VDS does not exceed the device absolute
maximum rating under all operating conditions including
start-up and fault conditions.
Maximum Drain Current
Measure the peak drain current under all operation conditions
including start-up and fault conditions. Look for signs of
transformer saturation (usually occurs at highest operating
ambient temperatures). Verify that the peak current is less than
the stated Absolute Maximum Rating in the data sheet.
Thermal Check
At maximum output power, both minimum and maximum line
voltage and ambient temperature; verify that temperature
specifications are not exceeded for the LYTSwitch-4 high-line,
transformer, output diodes, output capacitors and drain clamp
components.
12
Rev. C 11/14
www.power.com
LYT4221-4228/4321-4328
Absolute Maximum Ratings(1,4)
DRAIN Pin Peak Current(5): LYT4x21..................................1.37 A
LYT4x22..................................2.08 A
LYT4x23..................................2.72 A
LYT4x24................................. 4.08 A
LYT4x25................................. 5.44 A
LYT4x26................................. 6.88 A
LYT4x27..................................7.33 A
LYT4x28....................................9.0 A
DRAIN Pin Voltage ……………………….................. -0.3 to 725 V
BYPASS Pin Voltage.................................................. -0.3 to 9 V
BYPASS Pin Current ………………………....................... 100 mA
VOLTAGE MONITOR Pin Voltage.............................. -0.3 to 9 V(6)
FEEDBACK Pin Voltage ……...................................... -0.3 to 9 V
REFERENCE Pin Voltage .......................................... -0.3 to 9 V
Lead Temperature(3) .........................................................260 °C
Storage Temperature ………………….................... -65 to 150 °C
Operating Junction Temperature(2)..........................-40 to 150 °C
Notes:
1. All voltages referenced to SOURCE, TA = 65 °C.
2. Normally limited by internal circuitry.
3. 1/16 in. from case for 5 seconds.
4. Absolute Maximum Ratings specified may be applied, one
at a time without causing permanent damage to the
product. Exposure to Absolute Maximum Ratings for
extended periods of time may affect product reliability.
5. Peak DRAIN current is allowed while the DRAIN voltage is
simultaneously less than 400 V. See also Figure 10.
6. During start-up (the period before the BYPASS pin begins
powering the IC) the VOLTAGE MONITOR pin voltage can
safely rise to 15 V without damage.
Thermal Resistance
Thermal Resistance: E Package
(qJA) ....................................................105 °C/W(1)
(qJC)..................................................... 2 °C/W(2)
Parameter
Symbol
Notes:
1. Free standing with no heat sink.
2. Measured at back surface tab.
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
124
132
140
Units
Control Functions
Switching Frequency
Frequency Jitter
Modulation Rate
fOSC
TJ = 65 °C
VBP = 0 V,
TJ = 65 °C
BYPASS Pin
Charge Current
ICH2
Peak-Peak Jitter
5.4
TJ = 65 °C
See Note B
fM
ICH1
Average
VBP = 5 V,
TJ = 65 °C
2.6
kHz
kHz
LYT4x21
-6.04
-3.45
-2.59
LYT4x22
-10.89
-6.22
-4.67
LYT4x23
-16.21
-9.26
-6.95
LYT4x24
-21.88
-12.5
-9.38
LYT4x25
-26.25
-15.0
-11.25
LYT4x26
-15.75
-9.00
-6.75
LYT4x27
-17.50
-10.0
-7.50
LYT4x28
-20.65
-11.8
-8.85
LYT4x21
-1.23
-0.7
-0.49
LYT4x22
-4.38
-2.5
-1.75
LYT4x23
-8.05
-4.6
-3.22
LYT4x24
-11.64
-6.65
-4.66
LYT4x25
-15.10
-8.63
-6.04
LYT4x26
-7.61
-4.35
-3.05
LYT4x27
-9.22
-5.27
-3.69
LYT4x28
-10.15
-5.8
-4.06
mA
13
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Rev. C 11/14
LYT4221-4228/4321-4328
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
Units
Control Functions (cont.)
Charging Current
Temperature Drift
BYPASS Pin Voltage
BYPASS Pin
Voltage Hysteresis
BYPASS Pin
Shunt Voltage
Soft-Start Time
See Note A, B
0.7
VBP
0 °C < TJ < 100 °C
VBP(H)
0 °C < TJ < 100 °C
VBP(SHUNT)
IBP = 4 mA
0 °C < TJ < 100 °C
6.1
6.4
tSOFT
TJ = 65 °C
VBP = 5.9 V
51
72
ICD2
0 °C < TJ < 100 °C
FET Not Switching
0.5
0.8
1.2
ICD1
0 °C < TJ < 100 °C
FET Switching at fOSC
1
2.5
4
105
112
119
Drain Supply Current
5.75
5.95
%/°C
6.15
0.85
V
V
6.7
V
ms
mA
VOLTAGE MONITOR Pin
Threshold
Line Overvoltage
Threshold
IOV
TJ = 65 °C
RR = 24.9 kW
VOLTAGE MONITOR
Pin Voltage
VV
0 °C < TJ < 100 °C
IV < IOV
LYT4x21-4x28
2.75
3.00
3.25
V
IV(SC)
VV = 5 V
TJ = 65 °C
LYT4x27-4x28
150
175
200
mA
VOLTAGE MONITOR Pin
Short-Circuit Current
Remote ON/OFF
Threshold
Hysteresis
5
VV(REM)
TJ = 65 °C
0.5
FEEDBACK Pin Current
at Onset of Maximum
Duty Cycle
IFB(DCMAXR)
0 °C < TJ < 100 °C
FEEDBACK Pin Current
Skip Cycle Threshold
IFB(SKIP)
TJ = 65 °C
210
Maximum Duty Cycle
DCMAX
IFB(DCMAXR) < IFB < IFB(SKIP)
0 °C < TJ < 100 °C
85
VFB
IFB = 150 mA
0 °C < TJ < 100 °C
2.1
IFB(SC)
VFB = 5 V
TJ = 65 °C
320
DC10
IFB = IFB(AR), TJ = 65 °C, See Note B
13
DC40
IFB = 40 mA, TJ = 65 °C
37
DC60
IFB = 60 mA, TJ = 65 °C
60
tAR
TJ = 65 °C
VBP = 5.9 V
mA
V
FEEDBACK Pin
FEEDBACK Pin Voltage
FEEDBACK Pin
Short-Circuit Current
Duty Cycle Reduction
90
mA
mA
99.9
%
2.3
2.56
V
380
480
mA
%
Auto-Restart
Auto-Restart ON-Time
51
72
ms
14
Rev. C 11/14
www.power.com
LYT4221-4228/4321-4328
Symbol
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Auto-Restart
Duty Cycle
DCAR
TJ = 65 °C
See Note B
SOA Minimum Switch
ON-Time
tON(SOA)
TJ = 65 °C
See Note B
IFB(AR)
0 °C < TJ < 100 °C
Parameter
Min
Typ
Max
Units
Auto-Restart (cont.)
FEEDBACK Pin Current
During Auto-Restart
12.5
%
0.875
ms
6.5
10
mA
1.223
1.245
1.273
V
48.69
49.94
51.19
mA
REFERENCE Pin
REFERENCE Pin
Voltage
VR
REFERENCE Pin
Current
IR
RR = 24.9 kW
0 °C < TJ < 100 °C
Current Limit/Circuit Protection
Full Power
Current Limit
(CBP = 4.7 mF)
Reduced Power
Current Limit
(CBP = 47 mF)
di/dt = 138 mA/ms
LYT4x22
0.79
0.92
di/dt = 145 mA/ms
LYT4x23
0.99
1.15
ILIMIT(F)
di/dt = 180 mA/ms
LYT4x24
1.18
1.38
TJ = 65 °C
di/dt = 227 mA/ms
LYT4x25
1.41
1.63
di/dt = 272 mA/ms
LYT4x26
1.89
2.19
di/dt = 375 mA/ms
LYT4x27
2.61
3.03
di/dt = 110 mA/ms
LYT4x21
0.59
0.69
di/dt = 158 mA/ms
LYT4x22
0.65
0.76
di/dt = 155 mA/ms
LYT4x23
0.8
0.93
ILIMIT(R)
di/dt = 188 mA/ms
LYT4x24
0.95
1.11
TJ = 65 °C
di/dt = 240 mA/ms
LYT4x25
1.14
1.33
di/dt = 300 mA/ms
LYT4x26
1.38
1.61
di/dt = 415 mA/ms
LYT4x27
1.88
2.18
di/dt = 770 mA/ms
LYT4x28
3.92
4.56
Minimum
ON-Time Pulse
tLEB + tIL(D)
TJ = 65 °C
270
Leading Edge
Blanking Time
tLEB
TJ = 65 °C
See Note B
110
Current Limit Delay
tIL(D)
TJ = 65 °C
See Note B
Thermal Shutdown
Temperature
See Note B
Thermal Shutdown
Hysteresis
BYPASS Pin Power-Up
Reset Threshold
Voltage
LYT4x21-4x28
147
0 °C < TJ < 100 °C
155
ns
375
ns
ns
164
3.30
°C
°C
56
2.25
A
630
150
See Note B
VBP(RESET)
450
A
4.25
V
15
www.power.com
Rev. C 11/14
LYT4221-4228/4321-4328
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -20 °C to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
TJ = 65 °C
11.5
13.2
TJ = 100 °C
13.5
15.5
TJ = 65 °C
6.9
8.0
TJ = 100 °C
8.4
9.7
TJ = 65 °C
5.3
6.0
TJ = 100 °C
6.3
7.3
TJ = 65 °C
3.4
3.9
TJ = 100 °C
3.9
4.5
TJ = 65 °C
2.5
2.9
TJ = 100 °C
3.0
3.4
TJ = 65 °C
1.9
2.2
TJ = 100 °C
2.3
2.7
TJ = 65 °C
1.8
2.0
TJ = 100 °C
2.1
2.5
TJ = 65 °C
1.3
1.5
TJ = 100 °C
1.6
1.9
Units
Output
LYT4x21
ID = 100 mA
LYT4x22
ID = 100 mA
LYT4x23
ID = 150 mA
ON-State Resistance
RDS(ON)
LYT4x24
ID = 150 mA
LYT4x25
ID = 200 mA
LYT4x26
ID = 250 mA
LYT4x27
ID = 350 mA
LYT4x28
ID = 600 mA
OFF-State Drain
Leakage Current
Breakdown Voltage
W
IDSS
VBP = 6.4 V
VDS = 560 V
TJ = 100 °C
BVDSS
VBP = 6.4 V
TJ = 65 °C
725
V
TJ < 100 °C
36
V
Minimum Drain
Supply Voltage
Rise Time
tR
Fall Time
tF
Measured in a Typical Flyback
See Note B
50
mA
100
ns
50
ns
NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with increasing
temperature and a positive temperature coefficient corresponds to a decrease in magnitude with increasing temperature.
B. Guaranteed by characterization. Not tested in production.
Note: The parameter values and limits specified herein are based on a limited data set. There is a small likelihood that minor
changes may be required based on additional data as they become available.
16
Rev. C 11/14
www.power.com
LYT4221-4228/4321-4328
Power (mW)
Scaling Factors:
LYT4x21 0.18
LYT4x22 0.28
LYT4x23 0.38
LYT4x24 0.56
LYT4x25 0.75
LYT4x26 1.00
LYT4x27 1.16
LYT4x28 1.55
1000
100
10
1
100
200
300
400
500
300
PI-6965-102313
DRAIN Capacitance (pF)
10000
Scaling Factors:
LYT4x21 0.18
LYT4x22 0.28
LYT4x23 0.38
LYT4x24 0.56
LYT4x25 0.75
LYT4x26 1.00
LYT4x27 1.16
LYT4x28 1.55
200
100
0
600
0
3
Scaling Factors:
LYT4x21 0.18
LYT4x22 0.28
LYT4x23 0.38
LYT4x24 0.56
LYT4x25 0.75
LYT4x26 1.00
LYT4x27 1.16
LYT4x28 1.55
2
1
LYT42x8 TCASE = 25 °C
LYT42x8 TCASE = 100 °C
0
0
2
4
6
8 10 12 14 16 18 20
DRAIN Voltage (V)
Figure 16. Drain Current vs. Drain Voltage.
1.2
PI-6010-060410
PI-6967-102313
Figure 15. Power vs. Drain Voltage.
DRAIN Current
(Normalized to Absolute Maximum Rating)
DRAIN Current (A)
4
100 200 300 400 500 600 700
DRAIN Voltage (V)
DRAIN Pin Voltage (V)
Figure 14. Drain Capacitance vs. Drain Pin Voltage.
5
PI-6966-102313
Typical Performance Characteristics
1
0.8
0.6
0.4
0.2
0
0
100 200 300 400 500 600 700 800
DRAIN Voltage (V)
Figure 17. Maximum Allowable Drain Current vs. Drain Voltage.
17
www.power.com
Rev. C 11/14
LYT4221-4228/4321-4328
eSIP-7C (E Package)
C
2
0.403 (10.24)
0.397 (10.08)
A
0.264 (6.70)
Ref.
0.081 (2.06)
0.077 (1.96)
B
Detail A
2
0.290 (7.37)
Ref.
0.519 (13.18)
Ref.
0.325 (8.25)
0.320 (8.13)
Pin #1
I.D.
0.140 (3.56)
0.120 (3.05)
3
0.207 (5.26)
0.187 (4.75)
0.016 (0.41)
Ref.
3
0.047 (1.19)
0.070 (1.78) Ref.
0.050 (1.27)
0.198 (5.04) Ref.
0.016 (0.41) 6×
0.011 (0.28)
0.020 M 0.51 M C
FRONT VIEW
0.118 (3.00)
SIDE VIEW
4
0.033 (0.84) 6×
0.028 (0.71)
0.010 M 0.25 M C A B
0.100 (2.54)
BACK VIEW
0.100 (2.54)
10° Ref.
All Around
0.021 (0.53)
0.019 (0.48)
0.050 (1.27)
0.020 (0.50)
0.060 (1.52)
Ref.
0.050 (1.27)
PIN 1
0.378 (9.60)
Ref.
0.048 (1.22)
0.046 (1.17)
0.019 (0.48) Ref.
0.059 (1.50)
0.155 (3.93)
0.023 (0.58)
END VIEW
PIN 7
0.027 (0.70)
0.059 (1.50)
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions noted are determined at the outermost
extremes of the plastic body exclusive of mold flash,
tie bar burrs, gate burrs, and interlead flash, but including
any mismatch between the top and bottom of the plastic
body. Maximum mold protrusion is 0.007 [0.18] per side.
DETAIL A
0.100 (2.54)
0.100 (2.54)
MOUNTING HOLE PATTERN
(not to scale)
3. Dimensions noted are inclusive of plating thickness.
4. Does not include inter-lead flash or protrusions.
5. Controlling dimensions in inches (mm).
PI-4917-061510
18
Rev. C 11/14
www.power.com
LYT4221-4228/4321-4328
Part Ordering Information
• LYTSwitch Product Family
• 4 Series Number
• PFC/Dimming
2
PFC No Dimming
3
PFC Dimming
• Voltage Range
2
High-Line
• Device Size
• Package Identifier
LYT 4 2 2 3 E
E
eSIP-7C
19
www.power.com
Rev. C 11/14
Revision
Notes
Date
A
Initial Release.
B
LYT4x27E, LYT4x28E – updated / added parameters: ICH1, ICH2, VV, IV(SC), and ILIMIT(F).
03/11/14
11/13
C
Updated ICH1 and ICH2, VBP(SHUNT), IOV, VV, IV(SC), IFB(SKIP), IFB(SC), ILIMIT(R), RDS(ON), Duty Cycle Reduction, Thermal Shutdown Temperature
and Hysteresis parameters per PCN-14441.
11/11/14
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD
PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be
covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power
Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers
a license under certain patent rights as set forth at http://www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)
whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in
significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero,
HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are
trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc.
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