ASM3I623S05BG-08-TR

May 2007 rev 0.3 ASM3P623S05/09A/B Timing-Safe™ Peak EMI reduction IC General Features • • • • Clock distribution with Timing-Safe™ Peak EMI Reduction Input frequency range: 20MHz - 50MHz Zero input - output propagation delay Low-skew outputs • Output-output skew less than 250pS • Device-device skew less than 700pS • • Less than 200pS cycle-to-cycle jitter is compatible with Pentium based systems Available in 16pin, 150mil SOIC, 4.4mm TSSOP (ASM3P623S09A/B), and in 8pin, 150 mil SOIC, 4.4mm TSSOP Packages (ASM3P623S05A/B) • • • 3.3V Operation Advanced CMOS technology The First True Drop-in Solution ® the eight-pin version and accepts one reference input and drives out five low-skew clocks. All parts have on-chip PLLs that lock to an input clock on the CLKIN pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad, internal to the device. Multiple ASM3P623S05/09A/B devices can accept the same input clock and distribute it. In this case, the skew between the outputs of the two devices is guaranteed to be less than 700pS. All outputs have less than 200pS of cycle-to-cycle jitter. The input and output propagation delay is guaranteed to be less than ±350pS, and the output-to-output skew is guaranteed to be less than 250pS. Refer “Spread Spectrum Control and Input-Output Skew Functional Description ASM3P623S05/09A/B is a versatile, 3.3V zero-delay buffer designed to distribute high-speed Timing-Safe™ clocks with Peak EMI Reduction. ASM3P623S09A/B accepts one reference input and drives out nine low-skew clocks. It is available in a 16pin Package. The ASM3P623S05A/B is Table” for deviations and Input-Output Skew for ASM3P623S05A/B and ASM3P623S09A/B devices The ASM3P623S05A/B and ASM3P623S09A/B are available in two different packages, as shown in the ordering information table. Block Diagram CLKIN PLL CLKOUT CLKIN CLK1 CLK2 CLK3 PLL MUX CLKOUT CLKA1 CLKA2 CLKA3 CLKA4 ASM3P623S05A/B CLK4 S2 S1 Select Input Decoding CLKB1 CLKB2 CLKB3 ASM3P623S09A/B CLKB4 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. May 2007 rev 0.3 Spread Spectrum Frequency Generation The clocks in digital systems are typically square waves with a 50% duty cycle and as frequencies increase the edge rates also get faster. Analysis shows that a square wave is composed of fundamental frequency and harmonics. The fundamental frequency and harmonics generate the energy peaks that become the source of EMI. Regulatory agencies test electronic equipment by measuring the amount of peak energy radiated from the equipment. In fact, the peak level allowed decreases as the frequency increases. The standard methods of reducing EMI are to use shielding, filtering, multi-layer ASM3P623S05/09A/B PCBs etc. These methods are expensive. Spread spectrum clocking reduces the peak energy by reducing the Q factor of the clock. This is done by slowly modulating the clock frequency. The ASM3P623S05/09A/B uses the center modulation spread spectrum technique in which the modulated output frequency varies above and below the reference frequency with a specified modulation rate. With center modulation, the average frequency is the same as the unmodulated frequency and there is no performance degradation Timing-Safe™ technology Timing-Safe™ technology is the ability to modulate a clock source with Spread Spectrum technology and maintain synchronization with any associated data path. Pin Configuration ( 8 Pin Devices ) CLKIN 1 8 7 6 5 CLKOUT CLK4 VDD CLK3 CLK1 2 CLK2 3 GND 4 ASM3P623S05A/B Pin Configuration ( 16 Pin Devices ) CLKIN CLKA1 CLKA2 VDD GND CLKB1 CLKB2 S2 1 2 3 4 5 6 7 8 16 15 14 CLKOUT CLKA4 CLKA3 VDD GND CLKB4 CLKB3 S1 ASM3P623S09A/B 13 12 11 10 9 Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 15 May 2007 rev 0.3 Pin Description for ASM3P623S05A/B Pin # 1 2 3 4 5 6 7 8 ASM3P623S05/09A/B Pin Name CLKIN CLK1 CLK2 CLK3 VDD CLK4 1 1,2 1 1 Description Input reference frequency, 5V-tolerant input Buffered clock output Buffered clock output Ground Buffered clock output 3.3V supply Buffered clock output Buffered clock output, internal feedback on this pin GND 1 CLKOUT Notes: 1. Weak pull-down on these outputs. 2. This output is driven and has an internal feedback for the PLL. 3. Buffered clock output is Timing-Safe™ Pin Description for ASM3P623S09A/B Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name CLKIN CLKA11 CLKA2 VDD GND CLKB1 CLKB2 S2 S1 2 2 1 1 1 1 1 Description Input reference frequency, 5V tolerant input Buffered clock output Buffered clock output 3.3V supply Ground Buffered clock output Buffered clock output Select Input, bit 2 Select Input, bit 1 Buffered clock output Buffered clock output Ground 3.3V supply CLKB3 CLKB4 GND VDD CLKA3 CLKA4 1 1 1,3 Buffered clock output Buffered clock output Buffered output, Internal feedback on this pin CLKOUT Notes: 1. Weak pull-down on all outputs. 2. Weak pull-up on these Inputs. 3. This output is driven and has an internal feedback for the PLL. Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 15 May 2007 rev 0.3 Spread Spectrum Control and Input-Output Skew Table (Note: The values given in the table are for an input frequency of 32MHz) ASM3P623S05/09A/B Device ASM3P623S05A ASM3P623S05B ASM3P623S09A ASM3P623S09B Deviation ±0.25 % ±0.5 % ±0.25 % ±0.5 % Input-Output Skew(±TSKEW) 0.125 0.25 0.125 0.25 Note: TSKEW is measured in units of the Clock Period Absolute Maximum Ratings Symbol VDD TSTG Ts TJ TDV Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) Parameter Voltage on any pin with respect to Ground Rating -0.5 to +4.6 -65 to +125 260 150 2 Unit V °C °C °C KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions for ASM3P623S05A/B and ASM3P623S09A/B Devices Parameter VDD TA CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance Input Capacitance Description Min 3.0 -40 Max 3.6 +85 30 7 Unit V °C pF pF Electrical Characteristics for ASM3P623S05A/B and ASM3P623S09A/B Parameter VIL VIH IIL IIH VOL VOH IDD Zo Description Input LOW Voltage Input LOW Current Input HIGH Current Output LOW Voltage Supply Current Output Impedance 2 2 1 1 Test Conditions Min 2.0 Typ Max 0.8 Unit V V µA µA V V mA Ω Input HIGH Voltage VIN = 0V VIN = VDD IOL = 8mA IOH = -8mA Unloaded outputs 2.4 15 23 50 100 0.4 Output HIGH Voltage Note: 1. CLKIN input has a threshold voltage of VDD/2 2. Parameter is guaranteed by design and characterization. Not 100% tested in production Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 15 May 2007 rev 0.3 ASM3P623S05/09A/B Switching Characteristics for ASM3P623S05A/B and ASM3P623S09A/B Parameter 1/t1 t3 t4 t5 t6 t7 tJ tLOCK Description Output Frequency Duty Cycle = (t2 / t1) * 100 Output Rise Time1, 2 Output Fall Time1, 2 Output-to-output skew CLKOUT Rising Edge 2 2 Test Conditions 30pF load Measured at VDD/2 Measured between 0.8V and 2.0V Measured between 2.0V and 0.8V All outputs equally loaded Measured at VDD /2 Measured at VDD/2 on the CLKOUT pins of the device Loaded outputs Stable power supply, valid clock presented on CLKIN pin Min 20 40 Typ 50 Max 50 60 2.5 2.5 250 ±350 700 200 1.0 Unit MHz % nS nS pS pS pS pS mS Delay, CLKIN Rising Edge to 2 Device-to-Device Skew 2 Cycle-to-cycle jitter 2 PLL Lock Time 2 Note: 1. The parameters are specified with loaded outputs. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 15 May 2007 rev 0.3 Switching Waveforms Duty Cycle Timing t t 2 1.4 V 1.4 V 1 ASM3P623S05/09A/B 1.4 V All Outputs Rise/Fall Time OUTPUT 2.0V 0.8V t3 t4 2.0 V 0.8 V 3.3 V 0V Output - Output Skew 1.4 V OUTPUT 1.4 V OUTPUT t 5 Input - Output Propagation Delay V INPUT /2 DD V /2 DD OUTPUT t 6 Device - Device Skew CLKOUT, Device 1 VDD/2 V /2 DD CLKOUT, Device 2 t 7 Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 15 May 2007 rev 0.3 Input-Output Skew ASM3P623S05/09A/B Test Circuit Input Timing-Safe™ Output +3.3V VDD TSKEW - TSKEW+ +3.3V 0.1uF CLKOUT OUTPUTS VDD LOAD One clock cycle N=1 when spread spectrum is ON For example, TSKEW = ± 0.125 for an Input clock 32MHz, translates in to (1/32MHz) * 0.125=3.90nS 0.1uF GND GND TSKEW represents input-output skew A Typical example of Timing-Safe™ waveform Input Input CLKOUT with SSOFF Timing-Safe™ CLKOUT Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 15 May 2007 rev 0.3 Package Information 8-lead (150-mil) SOIC Package ASM3P623S05/09A/B E H D A2 A θ e B A 1 C L D Dimensions Symbol Min A1 A A2 B C D E e H L θ Inches Max 0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0° 1.27 8° 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0° 0.050 8° Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 15 May 2007 rev 0.3 8-lead TSSOP (4.40-MM Body) ASM3P623S05/09A/B H E D A2 A θ e B A1 L C Dimensions Symbol Min A A1 A2 B c D E e H L θ 0.020 0° 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8° 0.50 0° Inches Max 0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30 Millimeters Min Max 1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8° Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 9 of 15 May 2007 rev 0.3 ASM3P623S05/09A/B 16-lead (150 Mil) Molded SOIC Package 8 1 PIN 1 ID E H 9 D 16 Seating Plane A e B h A2 D 0.004 θ L C A1 Dimensions Symbol Min A A1 A2 B C D E e H h L θ 0.228 0.010 0.016 0° 0.053 0.004 0.049 0.013 0.008 0.386 0.150 0.050 BSC 0.244 0.016 0.035 8° 5.80 0.25 0.40 0° Inches Max 0.069 0.010 0.059 0.022 0.012 0.394 0.157 Millimeters Min 1.35 0.10 1.25 0.33 0.19 9.80 3.80 1.27 BSC 6.20 0.41 0.89 8° Max 1.75 0.25 1.50 0.53 0.27 10.01 4.00 Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 10 of 15 May 2007 rev 0.3 16-lead TSSOP (4.40-MM Body) ASM3P623S05/09A/B 8 1 PIN 1 ID E H 9 16 A Seating Plane θ L C e D A2 B A1 D Dimensions Symbol Min A A1 A2 B C D E e H L θ 0.020 0° 0.002 0.031 0.007 0.004 0.193 0.169 0.026 BSC 0.252 BSC 0.030 8° 0.50 0° Inches Max 0.043 0.006 0.041 0.012 0.008 0.201 0.177 0.05 0.80 0.19 0.09 4.90 4.30 Millimeters Min Max 1.20 0.15 1.05 0.30 0.20 5.10 4.50 0.65 BSC 6.40 BSC 0.75 8° Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 11 of 15 May 2007 rev 0.3 Ordering Codes Ordering Code ASM3P623S09AF-16-ST ASM3I623S09AF-16-ST ASM3P623S09AF-16-SR ASM3I623S09AF-16-SR ASM3P623S09AF-16-TT ASM3I623S09AF-16-TT ASM3P623S09AF-16-TR ASM3I623S09AF-16-TR ASM3P623S09BF-16-ST ASM3I623S09BF-16-ST ASM3P623S09BF-16-SR ASM3I623S09BF-16-SR ASM3P623S09BF-16-TT ASM3I623S09BF-16-TT ASM3P623S09BF-16-TR ASM3I623S09BF-16-TR ASM3P623S05AF-08-ST ASM3I623S05AF-08-ST ASM3P623S05AF-08-SR ASM3I623S05AF-08-SR ASM3P623S05AF-08-TT ASM3I623S05AF-08-TT ASM3P623S05AF-08-TR ASM3I623S05AF-08-TR ASM3P623S05BF-08-ST ASM3I623S05BF-08-ST ASM3P623S05BF-08-SR ASM3I623S05BF-08-SR ASM3P623S05BF-08-TT ASM3I623S05BF-08-TT ASM3P623S05BF-08-TR ASM3I623S05BF-08-TR ASM3P623S05/09A/B Marking 3P623S09AF 3I623S09AF 3P623S09AF 3I623S09AF 3P623S09AF 3I623S09AF 3P623S09AF 3I623S09AF 3P623S09BF 3I623S09BF 3P623S09BF 3I623S09BF 3P623S09BF 3I623S09BF 3P623S09BF 3I623S09BF 3P623S05AF 3I623S05AF 3P623S05AF 3I623S05AF 3P623S05AF 3I623S05AF 3P623S05AF 3I623S05AF 3P623S05BF 3I623S05BF 3P623S05BF 3I623S05BF 3P623S05BF 3I623S05BF 3P623S05BF 3I623S05BF Package Type 16-pin 150-mil SOIC-TUBE, Pb Free 16-pin 150-mil SOIC-TUBE, Pb Free 16-pin 150-mil SOIC-TAPE & REEL, Pb Free 16-pin 150-mil SOIC-TAPE & REEL, Pb Free 16-pin 4.4-mm TSSOP - TUBE, Pb Free 16-pin 4.4-mm TSSOP - TUBE, Pb Free 16-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 16-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 16-pin 150-mil SOIC-TUBE, Pb Free 16-pin 150-mil SOIC-TUBE, Pb Free 16-pin 150-mil SOIC-TAPE & REEL, Pb Free 16-pin 150-mil SOIC-TAPE & REEL, Pb Free 16-pin 4.4-mm TSSOP - TUBE, Pb Free 16-pin 4.4-mm TSSOP - TUBE, Pb Free 16-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 16-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free Temperature Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 12 of 15 May 2007 rev 0.3 Ordering Codes (cont’d) Ordering Code ASM3P623S09AG-16-ST ASM3I623S09AG-16-ST ASM3P623S09AG-16-SR ASM3I623S09AG-16-SR ASM3P623S09AG-16-TT ASM3I623S09AG-16-TT ASM3P623S09AG-16-TR ASM3I623S09AG-16-TR ASM3P623S09BG-16-ST ASM3I623S09BG-16-ST ASM3P623S09BG-16-SR ASM3I623S09BG-16-SR ASM3P623S09BG-16-TT ASM3I623S09BG-16-TT ASM3P623S09BG-16-TR ASM3I623S09BG-16-TR ASM3P623S05AG-08-ST ASM3I623S05AG-08-ST ASM3P623S05AG-08-SR ASM3I623S05AG-08-SR ASM3P623S05AG-08-TT ASM3I623S05AG-08-TT ASM3P623S05AG-08-TR ASM3I623S05AG-08-TR ASM3P623S05BG-08-ST ASM3I623S05BG-08-ST ASM3P623S05BG-08-SR ASM3I623S05BG-08-SR ASM3P623S05BG-08-TT ASM3I623S05BG-08-TT ASM3P623S05BG-08-TR ASM3I623S05BG-08-TR ASM3P623S05/09A/B Marking 3P623S09AG 3I623S09AG 3P623S09AG 3I623S09AG 3P623S09AG 3I623S09AG 3P623S09AG 3I623S09AG 3P623S09BG 3I623S09BG 3P623S09BG 3I623S09BG 3P623S09BG 3I623S09BG 3P623S09BG 3I623S09BG 3P623S05AG 3I623S05AG 3P623S05AG 3I623S05AG 3P623S05AG 3I623S05AG 3P623S05AG 3I623S05AG 3P623S05BG 3I623S05BG 3P623S05BG 3I623S05BG 3P623S05BG 3I623S05BG 3P623S05BG 3I623S05BG Package Type 16-pin 150-mil SOIC-TUBE, Green 16-pin 150-mil SOIC-TUBE, Green 16-pin 150-mil SOIC-TAPE & REEL, Green 16-pin 150-mil SOIC-TAPE & REEL, Green 16-pin 4.4-mm TSSOP - TUBE, Green 16-pin 4.4-mm TSSOP - TUBE, Green 16-pin 4.4-mm TSSOP - TAPE & REEL, Green 16-pin 4.4-mm TSSOP - TAPE & REEL, Green 16-pin 150-mil SOIC-TUBE, Green 16-pin 150-mil SOIC-TUBE, Green 16-pin 150-mil SOIC-TAPE & REEL, Green 16-pin 150-mil SOIC-TAPE & REEL, Green 16-pin 4.4-mm TSSOP - TUBE, Green 16-pin 4.4-mm TSSOP - TUBE, Green 16-pin 4.4-mm TSSOP - TAPE & REEL, Green 16-pin 4.4-mm TSSOP - TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 4.4-mm TSSOP - TUBE, Green 8-pin 4.4-mm TSSOP - TUBE, Green 8-pin 4.4-mm TSSOP - TAPE & REEL, Green 8-pin 4.4-mm TSSOP - TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 4.4-mm TSSOP - TUBE, Green 8-pin 4.4-mm TSSOP - TUBE, Green 8-pin 4.4-mm TSSOP - TAPE & REEL, Green 8-pin 4.4-mm TSSOP - TAPE & REEL, Green Temperature Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 13 of 15 May 2007 rev 0.3 Device Ordering Information ASM3P623S05/09A/B ASM3P623S05AF-08-TR Tape & Reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved PulseCore Semiconductor Mixed Signal Product Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 14 of 15 May 2007 rev 0.3 ASM3P623S05/09A/B PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright PulseCore Semiconductor All Rights Reserved Part Number: ASM3P623S05/09A/B Document Version: 0.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 Timing-Safe™ US Patent Pending. © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 15 of 15