PCS3P73U00AG-08-CR

March 2008 rev 0.2 USB 2.0 Peak EMI reduction IC PCS3P73U00A General Features • • 1x Peak EMI Reduction IC Input frequency: 10MHz - 60MHz @ 2.5V 10MHz - 70MHz @ 3.3V Output frequency: 10MHz - 60MHz @ 2.5V 10MHz - 70MHz @ 3.3V Supply Voltage: 2.5V±0.2V 3.3V ±0.3V Analog Spread Selection up to ±0.5% ModRate selection option Commercial temperature range 8pin TSSOP, SOIC and TDFN(2X2) COL Package Conforms to USB2.0 compliance standards The First True Drop-in Solution coupled to XIN / CLKIN) and locks on to it delivering a 1x modulated clock output. PCS3P73U00A has a Frequency Selection (FS) control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the frequency Selection table for details. PCS3P73U00A has an SSEXTR pin to select different deviations depending upon the value of an external resistor connected between SSEXTR and GND. Modulation Rate (MR) control selects two different Modulation Rates. PCS3P73U00A operates from a 3.3V / 2.5V supply and is available in an 8 pin TSSOP, SOIC, and TDFN(2X2) COL packages, over Commercial temperature range. • • • • • • • • • Applications PCS3P73U00A is targeted for USB applications. Refer to SSEXTR Resistance Table for USB2.0 Product Description PCS3P73U00A is a versatile, 3.3V / 2.5V Peak EMI reduction IC. PCS3P73U00A accepts an input clock either from a Crystal or from an external reference (AC or DC compliance for commonly used frequencies. Block Diagram VDD SSEXTR FS XIN / CLKIN XOUT Crystal Oscillator PLL ModOUT MR GND PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. March 2008 rev 0.2 Pin Configuration PCS3P73U00A XIN / CLKIN XOUT 1 2 8 7 VDD SSEXTR MR ModOUT PCS3P73U00A 6 5 FS 3 GND 4 Pin Description Pin # Pin Name Pin Type 1 2 3 4 5 6 7 8 XIN / CLKIN XOUT FS GND ModOUT MR SSEXTR VDD I O I P O I I P Description Crystal connection or external reference clock input. Crystal connection. If using an external reference, this pin should be left open. Frequency Select.Pull LOW to select Low Frequency range. Selects High Frequency range when pulled HIGH. Has an internal pull-up resistor (see Frequency Selection table for details) Ground Buffered Modulated clock output Modulation Rate Select. When LOW selects Low Modulation Rate. Selects High Modulation Rate when pulled HIGH. Has an internal pull-down resistor Analog Spread Selection through external resistor to GND. 3.3V / 2.5V supply Voltage Frequency Selection table VDD(V) 2.5V FS 0 1 0 1 Frequency (MHz) 10-20 20-60 10-27 20-70 3.3V USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 2 of 13 March 2008 rev 0.2 Absolute Maximum Rating Symbol VDD TSTG Ts TJ TDV Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) PCS3P73U00A Parameter Voltage on any pin with respect to Ground Rating -0.5 to +4.6 -65 to +125 260 150 2 Unit V °C °C °C KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter VDD(3.3V) VDD(2.5V) TA CL CIN Supply Voltage Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance Input Capacitance Description Min 3.0 2.3 0 Max 3.6 2.7 +70 10 7 Unit V V °C pF pF Electrical Characteristics for 3.3V Supply voltage Parameter VDD VIL VIH IIL IIH VOL VOH ICC IDD Zo Description Supply Voltage Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Output LOW Voltage Output HIGH Voltage Static Supply Current Dynamic Supply Current Output Impedance VIN = 0V VIN = VDD IOL =8mA Test Conditions Min 3.0 2.0 Typ 3.3 Max 3.6 0.8 -50 50 0.4 Unit V V V µA µA V V µA mA Ω IOH = -8mA XIN / CLKIN pulled to GND Unloaded outputs FS=0; @ 12MHz FS=1; @ 48MHz 2.4 750 8 12 30 USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 3 of 13 March 2008 rev 0.2 Switching Characteristics for 3.3 Supply Voltage Parameter Input Frequency ModOUT Duty Cycle Rise Time Fall Time 1,2 PCS3P73U00A Test Conditions FS=0 FS=1 FS=0 FS=1 Measured at VDD /2 Measured between 20% to 80% Measured between 80% to 20% 1,2 Min 10 20 10 20 45 Typ 12 48 12 48 50 1.1 0.7 ±150 Max 27 70 27 70 55 Unit MHz % nS nS pS 1,2 1,2 Cycle-Cycle Jitter PLL Lock Time 2 Loaded outputs Stable power supply, valid clock presented on XIN / CLKIN pin 3 mS Notes: 1. All parameters are specified with 10pF loaded outputs. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production Electrical Characteristics for 2.5V Supply voltage Parameter VDD VIL VIH IIL IIH VOL VOH ICC IDD Zo Description Supply Voltage Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Output LOW Voltage Output HIGH Voltage Static Supply Current Dynamic Supply Current Output Impedance VIN = 0V VIN = VDD IOL = 8mA Test Conditions Min 2.3 1.7 Typ 2.5 Max 2.7 0.7 -50 50 0.6 Unit V V V µA µA V V µA mA Ω IOH = -8mA XIN / CLKIN pulled to GND Unloaded outputs FS=0; @ 12MHz FS=1; @ 48MHz 1.8 500 5 8 40 Switching Characteristics for 2.5V Supply Voltage Parameter Input Frequency ModOUT Duty Cycle Rise Time 3,4 Test Conditions FS=0 FS=1 FS=0 FS=1 Measured at VDD /2 Measured between 20% to 80% Measured between 80% to 20% 3,4 Min 10 20 10 20 45 Typ 12 48 12 48 50 1.6 0.8 ±200 Max 20 60 20 60 55 Unit MHz % nS nS pS 3,4 Fall Time3,4 Cycle-Cycle Jitter PLL Lock Time 2 Loaded outputs Stable power supply, valid clock presented on XIN / CLKIN pin 3 mS Notes: 3. All parameters are specified with 10pF loaded outputs. 4. Parameter is guaranteed by design and characterization. Not 100% tested in production USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 4 of 13 March 2008 rev 0.2 R PCS3P73U00A Crystal R1 = 510Ω C1 = 27 pF C2 = 27 pF Fig1: Typical Crystal Interface Circuit Note: For AC Coupled Interface refer to Application Brief:CT100801 Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency Frequency tolerance Operating temperature range Storage temperature Load capacitance Shunt capacitance ESR 48MHz ± 50 ppm or better at 25°C -25°C to +85°C -40°C to +85°C 18pF 7pF maximum 25 Ω RCompliance The value of the compliance resistor , RCompliance sets the USB2.0 signaling rate (frequency) deviation to 1000ppm peak-to-peak (+/-500ppm). It causes a -4dB peak power EMI reduction at the 480MHz fundamental USB2.0 frequency. Higher harmonics are reduced more. If the RCompliance is set to a lower value than its compliance limit, it will set the USB2.0 signaling rate (frequency) deviation to above 1000ppm peak-to-peak. For settings above 1000ppm the USB2.0 compliance pass/fail becomes gradually intermittent. USB2.0 functionality is maintained upto 3000ppm peak-to-peak signaling rate (frequency) deviation. The EMI tradeoff in the system is attenuation/compliance. While fully functional (and compliant intermittent) the 2000ppm frequency deviation can provide -7dB of EMI attenuation at the 480MHz fundamental. USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 5 of 13 March 2008 rev 0.2 Deviation Vs Resistance (MR=0) 2000 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 0 5 10 15 20 25 Resistance (KOhms) -7dB 480MHz Fundamental Frequency Attenuation[dB] PCS3P73U00A Deviation Vs Resistance (MR=1) 2000 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 0 10 20 30 40 50 60 70 Resistance (KOhms) -7dB 480MHz Fundamental Frequency Attenuation[dB] Pk-Pk Deviation (PPM) Pk-Pk Deviation (PPM) 12MHz_FS=0 15MHz_FS=0 24MHz_FS=0 24MHz_FS=1 25MHz_FS=0 25MHz_FS=1 30MHz_FS=1 48MHz_FS=1 USB 2.0 Compliance 12MHz_FS=0 15MHz_FS=0 24MHz_FS=0 24MHz_FS=1 25MHz_FS=0 25MHz_FS=1 30MHz_FS=1 48MHz_FS=1 USB Compliance -4dB -4dB -2dB 30 35 40 80 90 -2dB 100 Fig2: Deviation VsResistance for USB 2.0 Compliance (MR=0) Fig3: Deviation VsResistance for USB 2.0 Compliance (MR=1) SSEXTR Resistance Table for USB2.0 compliance (RCompliance) VDD=3.3V; MR=0 Frequency (MHz) 12 15 24 25 30 48 FS (MHz) 0 0 0 1 0 1 1 1 SSEXTR* Resistance (KΩ) 10 8.87 6.81 13.7 6.98 13.7 12.1 10 30 48 VDD=3.3V; MR=1 Frequency (MHz) 12 15 24 25 FS (MHz) 0 0 0 1 0 1 1 1 SSEXTR* Resistance (KΩ) 17.8 13 6.49 39.2 6.49 35.7 29.4 19.1 VDD=2.5V; MR=0 Frequency (MHz) 12 15 24 25 30 48 FS (MHz) 0 0 1 1 1 1 SSEXTR* Resistance (KΩ) 10 8.87 13.7 13.7 12.1 10 VDD=2.5V; MR=1 Frequency (MHz) 12 15 24 25 30 48 FS (MHz) 0 0 1 1 1 1 SSEXTR* Resistance (KΩ) 17.8 13 39.2 35.7 29.4 19.1 *:Standard 1% tolerance Resistors USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 6 of 13 March 2008 rev 0.2 PCS3P73U00A Fig4:Eye Diagram example (480MHz) computed from the USB-IF test pattern during USB2.0 compliance verification of an existing HOST PHY ASIC clocked at 48MHz by PCS3P73U00A. USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 7 of 13 March 2008 rev 0.2 PCS3P73U00A Fig5: EMI Radiated Emission Test Circuit (requires USB PHY ASIC, not shown here) XIN / CLKIN CL Xtal XOUT CL P C S 3 P 7 3 U 0 0 A ModOUT XIN /CLKIN XOUT USB ASIC Fig6: Typical Application Circuit Switching Waveforms Duty Cycle Timing t2 t1 VDD/2 OUTPUT VDD/2 VDD/2 Output Rise/Fall Time 80% 20% 80% 20% VDD OUTPUT t3 t4 0V USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 8 of 13 March 2008 rev 0.2 Package Information 8-lead TSSOP (4.40-MM Body) PCS3P73U00A H E D A2 A θ e B A1 L C Dimensions Symbol Min A A1 A2 B c D E e H L θ 0.002 0.033 0.008 0.004 0.114 0.169 Inches Max 0.043 0.006 0.037 0.012 0.008 0.122 0.177 Millimeters Min Max 1.10 0.05 0.85 0.19 0.09 2.90 4.30 0.15 0.95 0.30 0.20 3.10 4.50 0.026 BSC 0.252 BSC 0.020 0° 0.028 8° 0.65 BSC 6.40 BSC 0.50 0° 0.70 8° USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 9 of 13 March 2008 rev 0.2 8-Pin SOIC PCS3P73U00A E H D A2 A θ e B A 1 C L D Dimensions Symbol Min A1 A A2 B C D E e H L θ Inches Max 0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007 Millimeters Min 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0° 1.27 8° Max 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0° 0.050 8° USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 10 of 13 March 2008 rev 0.2 TDFN COL 2x2 8L package Outline drawing PCS3P73U00A Dimensions Symbol A A3 b D E e L Inches Min Max 0.027 0.008 0.0315 0.012 0.008 BSC Millimeters Min Max 0.70 0.20 0.80 0.203 BSC 0.30 2.00 BSC 2.00 BSC 0.50 BSC 0.50 0.60 0.079 BSC 0.078 BSC 0.020 BSC 0.020 0.024 USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 11 of 13 March 2008 rev 0.2 Ordering Codes Part Number PCS3P73U00AG-08-SR PCS3P73U00AG -08-ST PCS3P73U00AG -08-TR PCS3P73U00AG -08-TT PCS3P73U00AG -08-CR LL = 2 Character LOT # PCS3P73U00A Marking 3P73U00AG 3P73U00AG 3P73U00AG 3P73U00AG AG1LL Package 8- Pin SOIC, Tape & Reel, Green 8- Pin SOIC, Tube, Green 8- Pin TSSOP, Tape & Reel, Green 8- Pin TSSOP, Tube, Green 8- Pin 2-mm TDFN, COL-Tape & Reel, Green Temperature Commercial Commercial Commercial Commercial Commercial Device Ordering Information PCS3P73U00AG-08-ST R = Tape & Reel, T = Tube or Tray O = TSOT23 S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 J=TSOT26 C=TDFN (2X2) COL DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved PulseCore Semiconductor Mixed Signal Product USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 12 of 13 March 2008 rev 0.2 PCS3P73U00A PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Part Number: PCS3P73U00A Document Version: 0.2 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 Many PulseCore Semiconductor products are protected by issued patents or by applications for patent © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. USB 2.0 Peak EMI reduction IC Notice: The information in this document is subject to change without notice. 13 of 13