502MLFT

DATASHEET ICS502 LOCO™ PLL CLOCK MULTIPLIER Description Features The ICS502 LOCOTM is the most cost effective way to generate a high-quality, high-frequency clock output and a reference from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. • • • • • • • • • • • • • • • Stored in the chip’s ROM is the ability to generate six different multiplication factors, allowing one chip to output many common frequencies (see table on page 2). This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined or guaranteed. For applications which require defined input to output skew, use the ICS570B. Packaged as 8-pin SOIC or die Pb (lead) free package IDT’s lowest cost PLL clock Zero ppm multiplication error Easy to cascade with ICS5xx series Input crystal frequency of 5 – 27 MHz Input clock frequency of 2 – 50 MHz Output clock frequencies up to 190 MHz Low jitter – 50 ps one sigma Compatible with all popular CPUs Duty cycle of 45/55 up to 160 MHz Operating voltages of 3.0 to 5.5 V 25 mA drive capability at TTL levels Industrial temperature version available Advanced, low-power CMOS process Block Diagram VDD S1, S0 X1/ICLK Crystal or Clock input X2 PLL Clock Multiplier Circuitry and ROM 2 Crystal OScillator CLK REF GND IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 1 ICS502 REV M 051310 ICS502 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Pin Assignment Clock Decoding Table (MHz) S1 S0 CLK 0 0 x2 X1/ I CLK 1 8 X2 0 1 x5 VDD 2 7 S1 M 0 x3 GND 3 6 S0 M 1 x3.33 1 0 x4 1 1 x2.5 REF 5 4 CLK 8 Pi n (150 mi l ) SOI C Minimum input frequency for all selections is per table on page 3. 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Common Output Frequency Examples (MHz) Output 20 25 30 32 33.33 37.5 40 48 50 54 60 Input 10 10 10 16 10 15 20 16 20 13.5 20 Selection (S1, S0) 0, 0 1, 1 M, 0 0, 0 M, 1 1, 1 0, 0 M, 0 1, 1 1, 0 M, 0 Output 64 66.66 72 75 80 81 90 100 108 120 135 Input 16 20 24 15 20 27 27 20 27 24 27 Selection (S1, S0) 1, 0 M, 1 M, 0 0, 1 1, 0 M, 0 M, 1 0, 1 1, 0 0, 1 0, 1 Pin Descriptions Pin Number Pin Name Pin Type 1 XI/ICLK Input Crystal connection or clock input. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 REF Output Buffered crystal oscillator output clock. 5 CLK Output Clock output per table above. 6 S0 Input Select 0 for output clock. Connect to GND or VDD. 7 S1 Input Select 1 for output clock. Connect to GND or VDD or float. 8 X2 Input Crystal connection. Leave unconnected for clock input. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER Pin Description 2 ICS502 REV M 051310 ICS502 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER External Components Crystal Load Capacitors The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors, if needed, must be connected from each of the pins X1 and X2 to ground. Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS502 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and GND. It must be connected close to the ICS502 to minimize lead inductance. No external power supply filtering is required for the ICS502. Series Termination Resistor The value (in pF) of these crystal caps should equal (CL -12 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 8 pF [(16-12) x 2] = 8. A 33Ω terminating resistor can be used next to the CLK pin. The total on-chip capacitance is approximately 12 pF. A parallel resonant, fundamental mode crystal should be used. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS502. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (industrial) -40 to +85° C Ambient Operating Temperature (commercial) 0 to +70° C Storage Temperature -65 to +150° C Soldering Temperature 260° C Recommended Operation Conditions Parameter Min. Typ. Max. Units 0 – +70 °C Ambient Operating Temperature (industrial) -40 – +85 °C Power Supply Voltage (measured in respect to GND) +3 +5.5 V Ambient Operating Temperature (commercial) IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 3 ICS502 REV M 051310 ICS502 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER DC Electrical Characteristics VDD=5.0 V ±5% , Ambient temperature -40 to +85° C, unless stated otherwise Parameter Operating Voltage Symbol Conditions VDD Min. Typ. 3 Input High Voltage, ICLK only VIH ICLK (pin 1) Input Low Voltage, ICLK only VIL ICLK (pin 1) Input High Voltage VIH OE (pin 7) Input Low Voltage VIL OE (pin 7) Input High Voltage VIH S0, S1 Input Mid Voltage VIM S1 Input Low Voltage VIL S0, S1 Output High Voltage VOH IOH = -25 mA Output Low Voltage VOL IOL = 25 mA Max. Units 5.5 V (VDD/2)+1 V (VDD/2)-1 2 V V 0.8 VDD-0.5 V V VDD/2 V 0.5 2.4 V V 0.4 V IDD Operating Supply Current, 20 MHz crystal No load, 100 MHz 20 mA Short Circuit Current CLK output +70 mA On-Chip Pull-up Resistor Pin 7 270 kΩ Input Capacitance, S1, S0, and OE Pins 4, 6, 7 4 pF IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 4 ICS502 REV M 051310 ICS502 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER AC Electrical Characteristics VDD = 5.0 V ±5%, Ambient Temperature -40 to +85° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, crystal input FIN 5 27 MHz Input Frequency, clock input FIN 2 50 MHz 0 to +70° C 14 160 MHz -40 to +85° C 14 120 MHz +25° C 14 190 MHz +25° C 14 140 MHz Output Frequency, VDD = 4.5 to 5.5V FOUT Output Frequency, VDD = 3.0 to 3.6V Output Frequency, VDD = 4.5 to 5.5V FOUT Output Frequency, VDD = 3.0 to 3.6V Output Clock Rise Time tOR 0.8 to 2.0 V 1 ns Output Clock Fall Time tOF 2.0 to 8.0V 1 ns Output Clock Duty Cycle tOD 1.5V, up to 160 MHz PLL Bandwidth 45 49-51 55 10 % kHz Output Enable Time, OE high to output on 50 ns Output Disable Time, OE low to tri-state 50 ns +70 ps 25 ps Absolute Clock Period Jitter tja One Sigma Clock Period Jitter tjs IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER Deviation from mean 5 ICS502 REV M 051310 ICS502 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Index Area E H Pin 1 h x 45 0 D Symbol Millimeters Min Max Inches Min Max A A1 B C D E e H h L a 1.35 1.75 1.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 Basic 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° 0.0532 0.0688 0.0040 0.0098 0.013 0.020 0.0075 0.0098 .1890 .1968 0.1497 0.1574 0.050 Basic 0.2284 0.2440 0.010 0.020 0.016 0.050 0° 8° A c Q e b Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 502MLF 502MLFT 502MILF 502MILFT 502-DWF 502-DPK 502MLF 502MLF 502MILF 502MILF - Tubes Tape and Reel Tubes Tape and Reel Die on uncut, probed wafers Tested die in waffle pack 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C 0 to +70° C 0 to +70° C Parts that are ordered with an “LF” suffix to the part number are the Pb-free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 6 ICS502 REV M 051310 ICS502 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 408-284-8200 Fax: 408-284-2775 www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. 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