525R-11LFT

DATASHEET 525-01/02 USER CONFIGURABLE CLOCK Description Features The ICS525-01/02 are the most flexible way to generate a high-quality, high-accuracy, high-frequency clock output from an inexpensive crystal or clock input. The user can configure the device to produce nearly any output frequency from any input frequency by grounding or floating the select pins. Neither microcontroller, software, nor device programmer are needed to set the frequency. Using Phase-Locked Loop (PLL) techniques, the device accepts a standard fundamental mode, inexpensive crystal to produce output clocks up to 250MHz. It can also produce a highly accurate output clock from a given input clock, keeping them frequency locked together. • Packaged in 28-pin SSOP (150 mil body) or 28-pin • VFQFPN (4x4mm body) Industrial and commercial versions available in Pb (lead) free package • User determines the output frequency by setting all • • • • • • • • • • • • For similar capability with a serial interface, use the 307. For simple multipliers to produce common frequencies, refer to the 50x family of parts, which are smaller and more cost effective. These products are intended for clock generation. They have low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed. For applications which require defined input to output timing, use the 527-01. internal dividers Eliminates need for custom oscillators No software needed Online calculator determines register settings Pull-ups on all select inputs Input crystal frequency of 5 – 27 MHz Input clock frequency of 2 – 50 MHz Very low jitter Duty cycle of 45/55 up to 200MHz Operating voltage of 3.0V or 5.5V Ideal for oscillator replacement Industrial temperature version available For Zero Delay, refer to the 527 Block Diagram VDD 2 PD X1/ICLK Crystal or clock input Crystal Oscillator Reference Divider X2 VCO Output Divider VCO Divider Optional crystal capacitors 7 R6:R0 © 2021 Renesas Electronics Corporation CLK Phase Comparator, Charge Pump, and Loop Filter 9 V8:V0 1 REF 2 GND 3 S2:S0 525-01/02 AUGUST 23, 2021 525-01/02 USER CONFIGURABLE CLOCK CLOCK MULTIPLIER 27 R3 S0 3 26 R2 S1 4 25 R1 S2 5 24 VDD 6 X1/ICLK REF 2 VDD R6 R0 R4 R1 28 R2 1 R3 R5 R4 Pin Assignments 28 27 26   25 24 23 22 R5 1 21 CLK R0 R6 2 20 GND 23 VDD S0 3 19 PD 7 22 REF X2 8 21 CLK S1 4 18 V8 GND 9 20 GND S2 5 17 V7 V0 10 19 PD VDD 6 16 V6 V1 11 18 V8 V2 12 17 V7 X1/CLKIN 7 15 V5 V3 13 16 V6 V4 14 15 V5 12 13 14 V3 V4 11 V2 GND 10 V1 9 V0 8 X2 EPAD 28-pin VFQFPN 28-pin SSOP Pin Descriptions Pin Number Pin Name Pin Type 1, 2, 24-28 R5, R6, R0-R4 I(PU) Reference divider word input pins determined by user. Forms a binary number from 0 to 127. 3, 4, 5 S0, S1, S2 I(PU) Select pins for output divider determined by user. See table on page 3. 6, 23 VDD Power Connect to VDD. 7 X1/ICLK X1 Crystal connection. Connect to a parallel resonant fundamental crystal or input clock. 8 X2 X2 Crystal connection. Connect to a crystal or leave unconnected for clock. 9, 20 GND Power Connect to ground. 10 - 18 V0 - V8 I(PU) VCO divider word input pins determined by user. Forms a binary number from 0 to 511. 19 PD Input Power-down. Active low. Turns off entire chip when low. Clock outputs tri-stated. 21 CLK Output Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency. 22 REF Output Reference output. Buffered crystal oscillator (or clock ) output. Pin Description KEY: I(PU) = Input with internal pull-up resistor; X1, X2 = crystal connections © 2021 Renesas Electronics Corporation 2 525-01/02 AUGUST 23, 2021 525-01/02 USER CONFIGURABLE CLOCK CLOCK MULTIPLIER 525-01 Output Frequency and Output Divider Table S2 S1 S0 CLK Output Pin 5 Pin 4 Pin 3 Divider Output Frequency Range (MHz) VDD = 5 V VDD = 3.3 V 0 - 70C -40 to +85C 0 - 70C -40 to +85C 3–26 3–23 3–18 3–16 0 0 0 10 0 0 1 2 15–160 15–140 15–100 15–90 0 1 0 8 3.75–40 3.75–36 3.75–25 3.75–22 0 1 1 4 7.5–80 7.5–72 7.5–50 7.5–45 1 0 0 5 6–50 6–45 6–34 6–30 1 0 1 7 4–40 4–36 4–26 4–23 1 1 0 9 3.3–33.3 3.3–30 3.3–20 3.3–18 1 1 1 6 5–53 5–47 5–27 5–24 525-02 Output Frequency and Output Divider Table S2 S1 S0 CLK Output Pin 5 Pin 4 Pin 3 Divider 0 0 0 6 Output Frequency Range (MHz) VDD = 5 V VDD = 3.3 V -40 to +85C -40 to +85C 5–67 5–40 0 0 1 2 15–200 15–120 0 1 0 8 3.75–50 3.75–30 0 1 1 4 7.5–100 7.5–60 1 0 0 5 6–80 6–48 1 0 1 7 4–57 4–34 1 1 0 1 30–250 30–200 1 1 1 3 10–133 10–80 © 2021 Renesas Electronics Corporation 3 525-01/02 AUGUST 23, 2021 525-01/02 USER CONFIGURABLE CLOCK CLOCK MULTIPLIER  VDW + 8   RDW + 2   OD External Components/Crystal Selection CLK Frequency = Input Frequency  2x --------------------------------------------- Decoupling Capacitors Where: The ICS525-01/02 requries two 0.01µF decoupling capacitors to be connected between VDD and GND, one on each side of the chip. The capacitor must be connected close to the device to minimize lead inductance. Reference Divider Word (RDW) = 0 to 127 (0 not permitted for 525-01) VCO Divider Word (VDW) = 0 to 511 (0, 1, 2, 3 not permitted for 525-01) External Resistors Output Divider (OD) = values on pages 3-4 A 33series termination resistor should be used on the CLK and REF pins. Also, the following operating ranges should be observed: Crystal Load Capacitors 1. The output frequency must be in the ranges listed on pages 3-4. The approximate total on-chip capacitance for a crystal is 16 pF, so a parallel resonant, fundamental mode crystal with this value of load (correlation) capacitance should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors may be connected from each of the pins X1 and X2 to Ground as shown in the block diagram. The value (in pF) of these crystal caps should be (CL -16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). 2. The phase detector frequency must be above 200 kHz. InputFrequency 200kHz < ---------------------------------------------- RDW + 2  Since all of the inputs have pull-up resistors, it is only necessary to ground the pins that need to be set to zero. Determining the Output Frequency Which Part to Use? Users have full control in setting the desired output frequency over the range shown in the tables on pages 3-4. To replace a standard oscillator, users should connect the divider select input pins directly to ground (or VDD, although this is not required because of internal pull-ups) during Printed Circuit Board layout. The 525 will automatically produce the correct frequency when all components are soldered. It is also possible to connect the inputs to parallel I/O ports to switch frequencies. By choosing divides carefully, the number of inputs which need to be changed can be minimized. Observe the restrictions on allowed values of VDW and RDW. The 525-01 is the original configurable clock. The 525-02 has a higher maximum output frequency and a slightly different set of output dividers. To determine the best combination of VCO, reference, and output divide, use the Calculator on our web site. Configuration Pin Settings The output of the 525 can be determined by the following simple equation: © 2021 Renesas Electronics Corporation 4 525-01/02 AUGUST 23, 2021 525-01/02 USER CONFIGURABLE CLOCK CLOCK MULTIPLIER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS525-01/02. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature, Commercial 0 to +70C Ambient Operating Temperature, Industrial -40 to +85C Storage Temperature -65C to 150C Junction Temperature 125C Soldering Temperature 260C (max. of 10 seconds) DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V Parameter Symbol Conditions Min. Typ. Max. Units 5.5 V Operating Voltage VDD Operating Supply Current IDD 60 MHz out, no load, 15 MHz crystal, 525-01/02 only 8 mA Operating Supply Current, Power-down IDD Pin 19 = 0, Note 1 4 µA Input High Voltage VIH Input Low Voltage VIL Input High Voltage, X1/ICLK only VIH ICLK (pin7) Input Low Voltage, X1/ICLK only VIL ICLK (pin7) Output High Voltage VOH IOH = -12 mA Output Low Voltage VOL IOL = 12 mA Short Circuit Current 3.0 2 V 0.8 VDD/2+1 V VDD/2 VDD/2 V VDD/2-1 V V VDD-0.4 0.4 V CLK and REF outputs ±55 mA Input Capacitance CIN V, R, S pins and pin 19 4 pF On-chip Pull-up Resistor RPU V, R, S pins and pin 19 270 k © 2021 Renesas Electronics Corporation 5 525-01/02 AUGUST 23, 2021 525-01/02 USER CONFIGURABLE CLOCK CLOCK MULTIPLIER AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V Parameter Input Frequency Symbol FIN Conditions Min. Typ. Max. Units Crystal input 5 27 MHz Clock input 2 50 MHz Output Clock Rise Time 0.8 to 2.0 V 1 ns Output Clock Fall Time 2.0 to 0.8 V 1 ns Output Clock Duty Cycle, OD = 2, 4, 6, 8, or 10 At VDD/2 45 Output Clock Duty Cycle, OD = 3, 5, 7, or 9 At VDD/2 Output Clock Duty Cycle, OD = 1 (-02 only) At VDD/2 49 to 51 55 % 40 60 % 35 65 Power-down Time, PD low to clocks stopped 50 ns Power-up Time, PD high to clocks stable 10 ms Absolute Clock Period Jitter, 525-01, Note 2 tja Deviation from mean One Sigma Clock Period Jitter, 525-01, Note 2 tjs Absolute Clock Period Jitter, 525-02, Note 2 One Sigma Clock Period Jitter, 525-02, Note 2 ±140 ps One Sigma 45 ps tja Deviation from mean ±85 ps tjs One Sigma 30 ps NOTE 1: Phase relationship between input and output can change at power-up. For a fixed phase relationship, see the 527. NOTE 2: For 16 MHz, 100 MHz output. Use the -02 for lowest jitter. © 2021 Renesas Electronics Corporation 6 525-01/02 AUGUST 23, 2021 525-01/02 USER CONFIGURABLE CLOCK CLOCK MULTIPLIER Package Outline Drawings The package outline drawings are located at the end of this document and are accessible from the Renesas website (see Ordering Information for POD links). The package information is the most current data available and is subject to change without revision of this document. Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 525-01RLF 525-01RLFT 525-01RILF 525-01RILFT 525R-02LF 525R-02LFT 525R-02ILF 525R-02ILFT 525NQG-01 525NQG-01T 525NQG-01I 525NQG-01IT 525NQG-02 525NQG-02T 525NQG-02I 525NQG-02IT ICS525-01RLF ICS525-01RLF ICS525-01RILF ICS525-01RILF ICS525R-02LF ICS525R-02LF ICS525R-02ILF ICS525R-02ILF 525NQG-01 525NQG-01 525NQG-01I 525NQG-01I 525NQG-02 525NQG-02 525NQG-02I 525NQG-02I Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin SSOP 28-pin VFQFPN 28-pin VFQFPN 28-pin VFQFPN 28-pin VFQFPN 28-pin VFQFPN 28-pin VFQFPN 28-pin VFQFPN 28-pin VFQFPN 0 to +70C 0 to +70C -40 to +85C -40 to +85C 0 to +70C 0 to +70C -40 to +85C -40 to +85C 0 to +70C 0 to +70C -40 to +85C -40 to +85C 0 to +70C 0 to +70C -40 to +85C -40 to +85C Revision History Rev. March 30, 2015 1. removed -11 and -12 references/parts from datasheet. The devices are obsolete. 2. Added VFQFPN packaging note to Features. 3. Updated POD with latest drawing 4. Updated Ordering Information. Rev. August 23, 2021 1. Rebranded to Renesas. 2. Updated “Which Part to Use?” section to include updated link to calculators page. 3. Updated Package Outline Drawings section and Ordering Information table. © 2021 Renesas Electronics Corporation 7 525-01/02 AUGUST 23, 2021 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.