544M-01LFT

DATASHEET ICS544-01 CLOCK DIVIDER Description Features The ICS544-01 is crystal oscillator module IC with divide by 512 frequency output. It employs a 16.777216 MHz fundamental frequency crystal source oscillator to generate 32.768 kHz output crystal oscillator output. In addition a divide by 256, 64 and 32 options are also provided through select pins. The chip has an OE pin that tri-states the output and stops the oscillator circuits. • • • • • • • • • • • The ICS544-01 is a member of IDT’s ClockBlocksTM family of clock building blocks. See the ICS541 and ICS542 for other clock dividers, and the ICS501, 502, 511, 512, and 525 for clock multipliers. Packaged in 8-pin SOIC Pb-free package IDT’s lowest cost clock divider Easy to use with other generators and buffers Input crystal at 16.777216MHz Output clock duty cycle of 45/55 Output Enable Advanced, low-power CMOS process Operating voltage of 2.25 V to 3.6 V Does not degrade phase noise - no PLL Available in industrial temperature range Block Diagram VDD S1, S0 (1:0) X1 16.777216MHz crystal input Divider and Selection Circuitry CLK1 /32, /64 /256, /512, X2 Optional tuning capacitors GND IDT® CLOCK DIVIDER 1 OE ICS544-01 REV B 051810 ICS544-01 CLOCK DIVIDER CLOCK DIVIDER Pin Assignment Clock Divider Table S1 S0 CLK X1/ICLK 1 8 S1 0 0 Input/32 X2 2 7 VDD 0 1 Input/64 GND 3 6 OE 1 0 Input/256 1 1 Input/512 S0 5 4 CLK 0 = connect directly to ground 1 = connect directly to VDD 8-pin (150 mil) SOIC Pin Descriptions Pin Number Pin Name Pin Type 1 X1/ICLK XI Crystal input. 2 X2 Xo Connect to crystal for crystal input and leave open for clock input. 3 GND Power 4 S0 Input 5 CLK Output 6 OE Input 7 VDD Power 8 S1 Input Pin Description Connect to ground. Select 0 for output clock. Connect to GND or VDD, per divider table above. Internal pull-up resistor. Clock output per table above. Internal Pull down resistor. Output Enable.Tri-states output clock when low. Also shuts down the oscillator circuit. Internal pull-up resistor. OE=1 normal operation. Connect to 2.25 V to 3.6 V. Select 1 for output clock. Connect to GND or VDD, per divider table above. Internal pull-up resistor. External Components Series Termination Resistor Decoupling Capacitor Ω As with any high-performance mixed-signal IC, the ICS544-01 must be isolated from system power supply noise to perform optimally. Ω A decoupling capacitor of 0.01µF must be connected between VDD and the PCB ground plane. Ω On chip capacitors connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value (in pf) of these crystal caps equal (CL-12)*2 in this equation, CL=crystal load capacitance in pf. For example, for a crystal with a 16 pF load cap, each external crystal cap would be 8 pF. [(16-12)x2]=8. IDT® CLOCK DIVIDER 2 ICS544-01 REV B 051810 ICS544-01 CLOCK DIVIDER CLOCK DIVIDER PCB Layout Recommendations 2) To minimize EMI, the 33Ω series termination resistor (if needed) should be placed close to the clock output. For optimum device performance and lowest output phase noise, the following guidelines should be observed. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the ICS544-01. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. 1) The 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS544-01. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial) 0 to +70° C Ambient Operating Temperature (industrial) -40 to +85° C Storage Temperature -65 to +150° C Junction Temperature 125° C Soldering Temperature 260° C Recommended Operation Conditions Parameter Min. Max. Units 0 +70 °C Ambient Operating Temperature (industrial) -40 +85 °C Power Supply Voltage (measured in respect to GND) 2.25 3.6 V Ambient Operating Temperature (commercial) IDT® CLOCK DIVIDER 3 Typ. ICS544-01 REV B 051810 ICS544-01 CLOCK DIVIDER CLOCK DIVIDER DC Electrical Characteristics Unless stated otherwise, VDD = 2.25 V to 3.6 V, CL=15pF ±5%, Ambient Temperature -40° C to +85° C Parameter Symbol Conditions Min. Typ. Units 3.6 V Operating Voltage VDD Input High Voltage VIH S0, S1, OE, ICLK Input Low Voltage VIL S0, S1, OE, ICLK Output High Voltage VOH IOH = -2 mA Output Low Voltage VOL IOL = 2 mA 0.15 0.4 V Operating Supply Current IDD VDD =2.25 V - 2.75 V 0.3 0.6 mA Operating Supply Current IDD VDD= 2.75 V - 3.6 V 0.5 1 mA Standby Current ISB OE=0 10 ua Short Circuit Current IOS Input Capacitance CIN Nominal Output Impedance ZO Internal Pull-up Resistor Rpup 2.25 Max. 0.7VDD V 0.3VDD VDD-0.4 V VDD-0.15 V ±40 mA S0, S1, OE 4 pF at VDD/2 20 Ω OE, S1, S0 420 kΩ AC Electrical Characteristics Unless stated otherwise, VDD = 2.25 V to 3.6 V±5%, CL=15pF ±5%, Ambient Temp -40° C to +85° C Parameter Symbol Input Frequency, clock input Conditions VDD = 3.3 V Min. Typ. Max. 0 16.777216 Units MHz Output Rise Time tOR 0.1VDD to 0.9VDD 0.2 1 μs Output Fall Time tOF 0.9VDD to 0.1VDD 0.2 1 μs 49 to 51 55 % Duty Cycle at VDD/2 45 Output Enable Delay Time tOE OE going high to CLK output valid 2 μs Output Disable Delay Time tOD OE going low to CLK output invalid 2 μs Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case IDT® CLOCK DIVIDER Symbol Conditions Min. Typ. Max. Units θJA Still air 150 ° C/W θJA 1 m/s air flow 140 ° C/W θJA 3 m/s air flow 120 ° C/W 40 ° C/W θJC 4 ICS544-01 REV B 051810 ICS544-01 CLOCK DIVIDER CLOCK DIVIDER Marking Diagram (ICS554M-01LF) 8 Marking Diagram (ICS554MI-01LF) 5 8 554M01LF ###### YYWW 1 5 554MI01L ###### YYWW 4 1 4 Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. “L” or “LF” denotes Pb (lead) free package. 4. “I” denotes industrial temperature range. 5. Bottom Marking: (origin) Origin = country of origin if not USA. IDT® CLOCK DIVIDER 5 ICS544-01 REV B 051810 ICS544-01 CLOCK DIVIDER CLOCK DIVIDER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Inches 8 E Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 D 4.80 5.00 .1890 .1968 E 3.80 4.00 .1497 .1574 H INDEX AREA e 1 2 D 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 α 0° 8° 0° 8° A h x 45 A1 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 544M-01LF 544M-01LFT 544MI-01LF 544MI-01LFT 544M01LF 544M01LF 544MI01L 544MI01L Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT® CLOCK DIVIDER 6 ICS544-01 REV B 051810 ICS544-01 CLOCK DIVIDER CLOCK DIVIDER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 408-284-8200 Fax: 408-284-2775 www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA