8T49N203A-027NLGI8

8T49N105 Code (ddd) Mode -000 LoBW -001 LoBW -002 LoBW -006 LoBW -007 LoBW -999 CONFIG LoBW Input Frequency (MHz) Switchover Type Switchover Mode Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) CLK XTAL_IN Q Q 0 25 40 P/on 125 1 19.44 40 D/off 622.08 0 25 40 D/on 125 1 25 40 0 61.44 40 1 61.44 40 0 125 40 1 125 40 0 76.92307692 40 1 100 40 0 25 40 1 19.44 40 Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin D/off 125 D/on 61.44 D/off 61.44 P/on 100 D/off 100 D/on 76.92307692 D/off 100 P/off 125 D/off 622.08 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 1 ©2017 Integrated Device Technology, Inc. 8T49N183 Output Frequency (MHz) Code (ddd) Crystal Frequency (MHz) PLL Locked Loop Bandwidth (Hz) GPIO Direction Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS outof-phase) Inversion (-) or non-inversion (+) Power-up State GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source Phase Delay (steps) Q0 -001 0 4 Hz 1 4 Hz 40 Q1 512 898 D/+/on PLL0 D/+/on PLL1 None None GPIO0 GPIO1 GPIO2 GPIO3 In In In In GPI GPI GPI GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 2 ©2017 Integrated Device Technology, Inc. 8T49N203 Code (ddd) Mode -000 LoBW -001 LoBW -002 LoBW -003 LoBW -004 LoBW -005 LoBW -006 LoBW -007 LoBW -009 SYNTH / HiBW -010 HiBW -012 SYNTH -013 LoBW -014 LoBW -015 LoBW -016 HiBW -017 LoBW -018 LoBW -019 LoBW -023 SYNTH -024 HiBW -025 LoBW -027 HiBW -028 LoBW -029 LoBW -999 LoBW Input Frequency (MHz) CONFIG CLK0 CLK1 XTAL_IN 0 25 25 40 1 19.44 19.44 40 0 156.25 156.25 40 1 1 1 40 0 30.72 30.72 40 1 30.72 30.72 40 0 600 600 40 1 605 605 40 0 91.7 91.7 40 1 16.7 16.7 40 0 25 25 40 1 25 25 40 0 156.25 156.25 40 1 1 1 40 0 25 25 40 1 25 25 40 0 n/a n/a 40 1 320 320 n/a 0 156.25 156.25 n/a 1 320 320 n/a 0 n/a n/a 25 1 n/a n/a 25 0 156.25 156.25 40 1 125 125 40 0 25 25 40 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 25 156.25 100 125 156.25 161.1328125 31.25 156.25 100 125 156.25 n/a 320 187.512 125 644.53125 698.8123348 10.24 26 26 20 10.24 125 156.25 25 25 156.25 100 125 156.25 161.1328125 31.25 156.25 100 125 156.25 n/a 320 187.512 187.512 644.53125 698.8123348 10.24 26 26 20 10.24 125 156.25 25 40 38.88 38.88 n/a n/a 40 40 38.88 38.88 40 40 40 n/a n/a 40 40 40 25 n/a n/a 40 25 40 40 40 1 19.44 19.44 40 Switchover Type Switchover Mode Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) Q0 Q1 Q0 Q1 P/on P/on 125 125 P/on P/on 622.08 622.08 P/on P/on 156.25 156.25 P/on P/on 156.25 156.25 P/on P/on 122.88 122.88 P/on P/on 122.88 122.88 P/on P/on 1200 1200 P/on P/on 1210 1210 P/on P/on 165 165 P/on P/on 30 30 P/on P/on 155.52 155.52 P/on P/on 155.52 155.52 P/on P/on 156.255 156.255 P/on P/on 156.255 156.255 P/on P/on 25 25 P/on P/on 25 25 D/on D/on 156.25 156.25 D/on D/on 156.25 156.25 D/on D/off 125 125 D/on D/off 125 125 P/on P/on 750 750 P/on P/on 450 450 D/on D/on 156.25 156.25 D/on D/on 125 125 D/on D/off 156.25 156.25 D/on D/on P/on P/on P/on P/on P/on D/on D/on P/on P/on D/on D/on D/on D/on P/on P/on P/on D/on D/on P/on P/on P/on P/on P/off D/off D/on P/on P/on P/on P/on P/on D/on D/on P/on P/on D/on D/on D/on D/on P/on P/on P/off D/on D/on P/on P/on P/on P/on P/off 125 156.25 100 161.1328125 161.1328125 25 25 156.25 100 161.1328125 161.1328125 187.512 187.512 125 156.25 644.53125 698.8123348 10 644.53125 644.53125 40 10 156.25 156.25 125 125 156.25 100 161.1328125 161.1328125 25 25 156.25 100 161.1328125 161.1328125 187.512 187.512 125 156.25 644.53125 698.8123348 10 644.53125 644.53125 40 10 156.25 156.25 125 P/off P/off 622.08 622.08 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 3 ©2017 Integrated Device Technology, Inc. 8T49N205 Code (ddd) Mode -000 LoBW -001 HiBW -003 LoBW -004 LoBW -005 LoBW -006 LoBW -007 LoBW -009 LoBW -010 LoBW -999 LoBW Input Frequency (MHz) CONFIG CLK0 CLK1 XTAL_IN 0 0.008 0.008 40 1 10 10 40 0 100 100 n/a 1 133.3333333 133.3333333 n/a 0 19.44 19.44 25 1 19.44 19.44 40 0 14.318 14.318 40 1 14.318 14.318 40 0 10 10 40 1 10 10 40 0 19.44 19.44 38.88 1 19.44 19.44 38.88 0 19.44 19.44 38.88 1 19.44 19.44 38.88 0 25 25 25 1 0 1 0 25 103.125 10.24 0.008 25 103.125 10.24 0.008 40 25 25 40 1 10 10 40 Switchover Type Switchover Mode Manual Pin Automatic Non-Revertive Manual Pin Automatic Revertive Manual Pin Manual Pin Manual Pin Automatic Revertive Manual Pin Manual Pin Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) Q0 Q1 Q0 Q1 P/on P/on 19.44 19.44 P/on P/on 155.52 155.52 P/on P/on 100 100 P/on P/on 133.3333333 133.3333333 D/on D/on 155.52 155.52 D/on D/on 155.52 155.52 P/on P/on 14.318 14.318 P/on P/on 14.318 14.318 P/on P/on 10 10 P/on P/on 10 10 P/on P/on 25 25 P/on P/on 125 125 P/on P/on 25 25 P/on P/on 156.25 156.25 D/on D/on 25 25 D/on P/on P/on P/off D/on P/on P/on P/off 25 25 10 19.44 25 25 10 19.44 P/off P/off 155.52 155.52 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 4 ©2017 Integrated Device Technology, Inc. 8T49N222 Input Frequency (MHz) Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) Code (ddd) Mode CLK0 CLK1 XTAL_IN Q0 Q1 Q0 Q1 -000 LoBW 25 25 40 Manual Pin P/on P/on 156.25 25 -001 LoBW 74.25 74.25 40 Manual Pin P/on P/on 148.5 74.25 -002 LoBW 19.44 19.44 40 Manual Pin P/on P/on 622.08 155.52 Switchover Type Switchover Mode -003 LoBW 125 125 40 Manual Pin P/on P/on 307.2 122.88 -004 LoBW 38.88 38.88 25 Manual Pin D/on D/on 155.52 155.52 -100 HiBW 25 25 n/a Manual Pin D/on D/on 100 100 -101 HiBW 25 25 n/a Manual Pin D/on D/on 125 125 -108 LoBW 122.88 122.88 25 Manual Pin D/on D/on 122.88 122.88 -109 SYNTH n/a n/a 25 Manual Pin D/on D/on 125 156.25 -110 HiBW 25 25 n/a Manual Pin D/on D/on 156.25 100 -121 SYNTH n/a n/a 40 Manual Pin D/on D/on 156.25 50 -122 LoBW 10 10 40 Manual Pin D/on D/on 1000 100 -123 LoBW 25 25 40 Manual Pin D/on D/on 125 156.25 -124 LoBW 10 10 40 Manual Register D/on D/on 925 92.5 -125 LoBW 10 10 40 Manual Register D/on D/on 1000 100 -126 LoBW 25 25 38.88 Manual Pin 133.3333333 LoBW 10 10 18.432 Manual Register 1000 100 -999 LoBW 25 25 40 Manual Pin D/on D/on P/off 100 -127 D/on D/on P/off 156.25 25 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 5 ©2017 Integrated Device Technology, Inc. 8T49N240 Output Frequency (MHz) Serial Port Protocol Code (ddd) Device Address Boot Method EEPROM Addressing OTP 0b0110100 1-Byte 0b1010000 I2C OTP -990 0b1110100 1-Byte 0b1010000 I2C EEPROM -991 0b1101100 2-Byte 0b1010000 I2C OTP -994 0b1101100 1-Byte 0b1010000 I2C EEPROM 0b1101100 1-Byte 0b1010000 -998 Input Frequency (MHz) Locked Loop Bandwidth (Hz) Output Style (P = LVPECL, D=LVDS, CP = LVCMOS inphase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Frequency Source Phase Delay (steps) Address I2C -984 Crystal Frequency (MHz) GPIO Direction CLK0 49.152 49.152 49.152 49.152 49.152 DIS DIS DIS DIS DIS CLK1 DIS DIS DIS DIS DIS 25Hz 25Hz 25Hz 25Hz 25Hz Q0 Q1 Q2 Q3 N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A N/A P/+/off PLL N/A GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output GPIO0 GPIO1 GPIO2 GPIO3 In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 6 ©2017 Integrated Device Technology, Inc. 8T49N241 Output Frequency (MHz) Serial Port Protocol Code (ddd) Device Address Boot Method EEPROM Addressing EEPROM 0b1101100 1-Byte 0b1010000 I2C OTP -994 0b1101100 1-Byte 0b1010000 I2C EEPROM -997 0b1101100 1-Byte 0b1010000 I2C EEPROM -998 0b1111100 1-Byte 0b1010000 I2C OTP 0b1111100 1-Byte 0b1010000 -999 Input Frequency (MHz) Locked Loop Bandwidth (Hz) Output Style (P = LVPECL, D=LVDS, CP = LVCMOS inphase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Frequency Source Phase Delay (steps) Address I2C -993 Crystal Frequency (MHz) GPIO Direction CLK0 38.88 38.88 38.88 38.88 38.88 DIS DIS DIS DIS DIS CLK1 DIS DIS DIS DIS DIS 25Hz 25Hz 25Hz 25Hz 25Hz Q0 Q1 Q2 Q3 N/A -/+/off PLL N/A N/A -/+/off PLL N/A 155.52 CN/+/on PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A P/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A P/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A P/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output GPIO0 GPIO1 GPIO2 GPIO3 In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI In In In Out GPI GPI GPI LOL In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 7 ©2017 Integrated Device Technology, Inc. 8T49N242 Output Frequency (MHz) Serial Port Protocol Code (ddd) Device Address I2C -006 0b1111100 I2C -993 0b1101100 I2C -997 Boot Method EEPROM Addressing 1-Byte CLK1 38.88 DIS DIS 25Hz 0b1010000 EEPROM 1-Byte 38.88 DIS DIS 25Hz 0b1010000 EEPROM I2C EEPROM 0b1111100 1-Byte 0b1010000 I2C OTP 0b1101100 CLK0 EEPROM 1-Byte 0b1010000 -999 Input Frequency (MHz) Locked Loop Bandwidth (Hz) 1-Byte 0b1010000 Output Style (P = LVPECL, D=LVDS, CP = LVCMOS inphase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Frequency Source Phase Delay (steps) Address 0b1101100 -998 Crystal Frequency (MHz) GPIO Direction 38.88 38.88 38.88 DIS DIS DIS DIS DIS DIS 25Hz 25Hz 25Hz Q0 Q1 Q2 Q3 N/A N/A N/A N/A -/+/off -/+/off -/+/off -/+/off PLL PLL PLL PLL N/A N/A N/A N/A N/A N/A N/A N/A -/+/off -/+/off -/+/off -/+/off PLL PLL PLL PLL N/A N/A N/A N/A 155.52 CN/+/on PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A P/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A P/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A N/A P/+/off PLL N/A N/A -/+/off PLL N/A N/A -/+/off PLL N/A GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output GPIO0 GPIO1 GPIO2 GPIO3 In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI In In In Out GPI GPI GPI LOL In In In In OE0 OE1 CSEL GPI In In In In OE0 OE1 CSEL GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 8 ©2017 Integrated Device Technology, Inc. 8T49N244 Code (ddd) -000 -001 -004 -005 -999 PLL-A Input Frequency (MHz) LoBW CLK0 CLK1 REF_IN Switchover Type Switchover Mode Output Style / Power-up State P = LVPECL, D = LVDS Q0 Q1 Output Frequency (MHz) Q0 Q1 PLL-A LoBW 25 25 40 Manual Pin D/off D/off 622.08 622.08 PLL-B LoBW 19.44 19.44 40 Manual Pin D/off D/off 644.53125 644.53125 PLL-A LoBW 2.048 2.048 40 Manual Pin D/off D/off 125 125 PLL-B LoBW 77.76 77.76 40 Manual Pin D/off D/off 125 125 PLL-A LoBW 120 120 40 Manual Pin D/off D/off 120 120 PLL-B LoBW 40 40 40 Manual Pin D/off D/off 180 180 PLL-A PLL-B PLL-A PLL-B LoBW LoBW LoBW LoBW 40 120 25 19.44 40 120 25 19.44 40 40 40 40 Manual Manual Manual Manual Pin Pin Pin Pin D/off D/off D/off D/off D/off D/off D/off D/off 180 120 622.08 644.53125 180 120 622.08 644.53125 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 9 ©2017 Integrated Device Technology, Inc. 8T49N281 Output Frequency (MHz) Serial Port Protocol Code (ddd) Device Address 0b1101100 -994 I2C EEPROM Addressing Input Frequency (MHz) Locked Loop Bandwidth (Hz) Address CLK0 CLK1 OTP 0b1010000 0b1111100 EEPROM I2C 0b1010000 38.88 DIS DIS 64 Hz 38.88 DIS DIS 64 Hz 1-Byte 0b1111100 -999 I2C OTP 0b1010000 GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source Phase Delay (steps) 1-Byte -998 Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Boot Method Crystal Frequency (MHz) GPIO Direction 38.88 DIS DIS 64 Hz 1-Byte Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A P/+/off PLL0 N/A P/+/off PLL0 N/A P/+/off PLL0 N/A P/+/off PLL0 N/A P/+/off PLL0 N/A P/+/off PLL0 N/A P/+/off PLL0 N/A P/+/off PLL0 None None None None None None None None GPIO0 GPIO1 GPIO2 GPIO3 In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 10 ©2017 Integrated Device Technology, Inc. 8T49N282 Output Frequency (MHz) Code (ddd) Serial Port Protocol Device Address Boot Method EEPROM Addressing -997 EEPROM I2C 0b1010000 PLL0 -998 I2C 0b1010000 0b1111100 I2C OTP 0b1010000 1-Byte CLK0 CLK1 CLK2 CLK3 Q0 0 DIS DIS DIS DIS 64 Hz 1 DIS DIS DIS DIS 4 Hz 0 DIS DIS DIS DIS 64 Hz 1 DIS DIS DIS DIS 64 Hz 0 DIS DIS DIS DIS 64 Hz 1 DIS DIS DIS DIS 64 Hz 38.88 1-Byte -999 Phase Delay (steps) 38.88 EEPROM GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source PLL1 1-Byte 0b1111100 Locked Loop Bandwidth (Hz) PLL Address 0b1101100 Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Input Frequency (MHz) by PLL Crystal Frequency (MHz) GPIO Direction 38.88 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Q1 Q2 Q3 Q4 Q5 Q6 Q7 155.52 N/A N/A N/A N/A N/A N/A N/A P/+/on P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None None N/A P/+/off PLL0 None Page 11 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 Out In In In In In In In LOL0 GPI GPI GPI GPI GPI GPI GPI In In In In In In In In GPI GPI GPI GPI GPI GPI GPI GPI In In In In In In In In GPI GPI GPI GPI GPI GPI GPI GPI ©2017 Integrated Device Technology, Inc. 8T49N283 Serial Port Protocol Code (ddd) Device Address 0b1111100 -998 Boot Method EEPROM Addressing Crystal Frequency (MHz) PLL0 EEPROM Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source Phase Delay (steps) CLK0 CLK1 0 DIS DIS 64Hz 1 DIS DIS 64Hz 0 DIS DIS 64Hz 1 DIS DIS 64Hz 38.88 Defaults 0b1010000 Locked Loop Bandwidth (Hz) GPIO Direction PLL1 1-Byte -999 PLL Address 0b1010000 0b1111100 Input Frequency (MHz) by PLL Output Frequency (MHz) 38.88 - Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off CN/+/off P/+/off P/+/off P/+/off PLL0 PLL1 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off CN/+/off P/+/off P/+/off P/+/off PLL0 PLL1 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None GPIO0 GPIO1 GPIO2 GPIO3 In In In In OE OE OE OE In In In In OE OE OE OE NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 12 ©2017 Integrated Device Technology, Inc. 8T49N285 GPIO Direction Output Frequency (MHz) Serial Port Protocol Code (ddd) Device Address -991 EEPROM Addressing Crystal Frequency (MHz) EEPROM I2C 0b1010000 0b1101100 EEPROM I2C 0b1010000 CLK0 38.88 DIS CLK1 DIS 11.25 Hz 38.88 DIS DIS 11.25 Hz 1-Byte 0b1101100 -994 -996 -998 -999 OTP I2C 0b1010000 1-Byte 0b1111100 EEPROM I2C 0b1010000 2-Byte 0b1111100 EEPROM I2C 0b1010000 1-Byte 0b1111100 Defaults I2C 0b1010000 GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source Phase Delay (steps) Address 0b1101100 Input Frequency (MHz) Locked Loop Bandwidth (Hz) 2-Byte -993 Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Boot Method 38.88 38.88 38.88 38.88 DIS DIS DIS DIS DIS DIS DIS DIS 11.25 Hz 11.25 Hz 11.25 Hz 11.25 Hz 1-Byte Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None None None None None None None None GPIO0 GPIO1 GPIO2 GPIO3 In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 13 ©2017 Integrated Device Technology, Inc. 8T49N286 Output Frequency (MHz) Code (ddd) Serial Port Protocol Device Address EEPROM Addressing Crystal Frequency (MHz) -991 EEPROM I2C 0b1010000 PLL0 -993 I2C 0b1010000 -994 -998 -999 OTP I2C 0b1010000 1-Byte 0b1111100 EEPROM I2C 0b1010000 1-Byte 0b1111100 OTP I2C 0b1010000 1-Byte CLK0 CLK1 CLK2 CLK3 Q0 0 DIS DIS DIS DIS 11.25 Hz 1 DIS DIS DIS DIS 11.2 Hz 0 DIS DIS DIS DIS 11.25 Hz 1 DIS DIS DIS DIS 11.2 Hz 0 DIS DIS DIS DIS 11.25 Hz 1 DIS DIS DIS DIS 11.2 Hz 0 DIS DIS DIS DIS 11.25 Hz 1 DIS DIS DIS DIS 11.2 Hz 0 DIS DIS DIS DIS 11.25 Hz 1 DIS DIS DIS DIS 11.2 Hz 38.88 1-Byte 0b1101100 Phase Delay (steps) 38.88 EEPROM GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source PLL1 2-Byte 0b1101100 Locked Loop Bandwidth (Hz) PLL Address 0b1101100 Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Input Frequency (MHz) by PLL Boot Method GPIO Direction 38.88 38.88 38.88 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Q1 Q2 Q3 Q4 Q5 Q6 Q7 N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None Page 14 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 Out In In In In In In In LOL0 GPI GPI GPI GPI GPI GPI GPI In In In In In In In In GPI GPI GPI GPI GPI GPI GPI GPI In In In In In In In In GPI GPI GPI GPI GPI GPI GPI GPI In In In In In In In In GPI GPI GPI GPI GPI GPI GPI GPI In In In In In In In In GPI GPI GPI GPI GPI GPI GPI GPI ©2017 Integrated Device Technology, Inc. 8T49N287 Serial Port Protocol Code (ddd) Device Address -991 Boot Method EEPROM Addressing Crystal Frequency (MHz) EEPROM I2C 0b1010000 0b1101100 EEPROM I2C 0b1010000 -996 -998 -999 0b1010000 1-Byte 0b1111100 EEPROM I2C 0b1010000 2-Byte 0b1111100 EEPROM I2C 0b1010000 1-Byte 0b1111100 Defaults I2C 0b1010000 CLK0 CLK1 0 DIS DIS 11.25 Hz 1 DIS DIS 11.2 Hz 0 DIS DIS 11.25 Hz 1 DIS DIS 11.2 Hz 0 DIS DIS 11.25 Hz 1 DIS DIS 11.2 Hz 0 DIS DIS 11.25 Hz 1 DIS DIS 11.2 Hz 0 DIS DIS 11.25 Hz 1 DIS DIS 11.2 Hz 0 DIS DIS 11.25 Hz 1 DIS DIS 11.2 Hz 38.88 OTP I2C Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State GPIO Function GPIO = General Purpose I/O OE = Output Enable input CSEL = Clock Select input LOSn, LOLn, HOLDn = Alarm output Frequency Source Phase Delay (steps) 38.88 1-Byte -994 PLL0 Address 0b1101100 0b1101100 PLL Locked Loop Bandwidth (Hz) GPIO Direction PLL1 2-Byte -993 Input Frequency (MHz) by PLL Output Frequency (MHz) 38.88 38.88 38.88 38.88 1-Byte Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A N/A N/A N/A N/A N/A N/A N/A P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off P/+/off PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 PLL0 None None None None None None None None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None N/A P/+/off PLL0 None None None None None None None None GPIO0 GPIO1 GPIO2 GPIO3 In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI In In In In GPI GPI GPI GPI NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 15 ©2017 Integrated Device Technology, Inc. 8T49N1012 Output Frequency (MHz) Serial Port Protocol Code (ddd) Device Address EEPROM Addressing Crystal Frequency (10M~40MHz) CLK_SEL PreScale FB Divider VCO Frequency (M) 0b1101100 EEPROM I2C 0b1010000 40 Crystal *2 43.5 3480 2-Byte -992 0b1101100 EEPROM I2C 0b1010000 40 Crystal *2 50 4000 1-Byte -993 0b1101100 EEPROM I2C 0b1010000 40 Crystal *2 43.5 3480 1-Byte 0b1101100 -994 I2C OTP 0b1010000 40 Crystal *2 43.5 3480 1-Byte 0b1101100 -998 I2C EEPROM 0b1010000 Frequency Source Total Divide Ratio Address -991 Output Style (P = LVPECL, D=LVDS, CP = LVCMOS in-phase, CN = LVCMOS out-of-phase) Inversion (-) or non-inversion (+) Power-up State Boot Method 40 Crystal *2 43.5 3480 1-Byte NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 REF N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1 125 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A CN/+/On P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL 32 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off P/+/Off CP/+/Off DIVA DIVB DIVC DIVD DIVE DIVF DIVG DIVH DIVI DIVI DIVJ DIVJ XTAL N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 1 Page 16 ©2017 Integrated Device Technology, Inc. 8T49N366 Code (ddd) -000 -999 Input Frequency (MHz) Switchover Type Switchover Mode Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) PLL Mode CLK0 CLK1 REF_IN Q0 Q1 Q0 Q1 PLL-A LoBW 25 25 40 Manual Pin D/off D/off 622.08 622.08 PLL-B LoBW 19.44 19.44 40 Manual Pin D/off D/off 644.53125 644.53125 PLL-C LoBW 19.44 19.44 40 Manual Pin D/off D/off 156.25 156.25 PLL-A LoBW 25 25 40 Manual Pin D/off D/off 622.08 622.08 PLL-B LoBW 19.44 19.44 40 Manual Pin D/off D/off 644.53125 644.53125 PLL-C LoBW 19.44 19.44 40 Manual Pin D/off D/off 156.25 156.25 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 17 ©2017 Integrated Device Technology, Inc. 8T49N445 Code (ddd) -000 -999 Switchover Type Switchover Mode Output Style / Power-up State P = LVPECL, D = LVDS Q Q 40 Manual Pin D/off 622.08 19.44 40 Manual Pin D/off 531.25 40 40 Manual Pin D/off 167.331645 Pin D/off 164.3554688 Pin D/off 622.08 D/off 531.25 Pin D/off 167.331645 Pin D/off 622.08 Input Frequency (MHz) PLL Mode CLK REF_IN PLL-A LoBW 38.88 PLL-B LoBW PLL-C LoBW PLL-D LoBW 25 40 Manual PLL-A LoBW 38.88 40 Manual PLL-B LoBW 19.44 40 Manual Pin PLL-C LoBW 40 40 Manual PLL-D LoBW 38.88 40 Manual Output Frequency (MHz) NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 18 ©2017 Integrated Device Technology, Inc. 8T49N488 Code (ddd) -000 -999 Input Frequency (MHz) Switchover Type Switchover Mode Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) PLL Mode CLK0 CLK1 REF_IN Q0 Q1 Q0 Q1 PLL-A LoBW 25 25 40 Manual Pin D/off D/off 622.08 622.08 PLL-B LoBW 19.44 19.44 40 Manual Pin D/off D/off 644.53125 644.53125 PLL-C LoBW 19.44 19.44 40 Manual Pin D/off D/off 156.25 156.25 PLL-D LoBW 25 25 40 Manual Pin D/off D/off 161.1328125 161.1328125 PLL-A LoBW 25 25 40 Manual Pin D/off D/off 622.08 622.08 PLL-B LoBW 19.44 19.44 40 Manual Pin D/off D/off 644.53125 644.53125 PLL-C LoBW 19.44 19.44 40 Manual Pin D/off D/off 156.25 156.25 PLL-D LoBW 25 25 40 Manual Pin D/off D/off 161.1328125 161.1328125 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 19 ©2017 Integrated Device Technology, Inc. 840N202 Code (ddd) Mode -000 LoBW -001 LoBW -999 LoBW CONFIG Input Frequency (MHz) CLK0 CLK1 XTAL_IN 0 25 25 40 1 25 25 40 0 19.44 19.44 27 1 19.44 19.44 27 0 25 25 40 1 25 25 40 Switchover Type Switchover Mode Manual Pin Manual Pin Manual Pin Output Power-up State Q0 Q1 Output Frequency (MHz) Q0 Q1 on on 125 125 on on 156.25 156.25 on on 125 125 on on 25 25 off off 125 125 off off 156.25 156.25 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 20 ©2017 Integrated Device Technology, Inc. 849N202 Code (ddd) Mode -000 LoBW -001 HiBW -006 LoBW -008 SYNTH -009 LoBW -010 LoBW -011 LoBW -012 LoBW -013 SYNTH -014 LoBW -015 LoBW -016 SYNTH -017 HiBW -018 LoBW -019 SYNTH -020 LoBW -021 LoBW -022 LoBW -024 LoBW -025 LoBW -999 LoBW Input Frequency (MHz) CONFIG CLK0 CLK1 XTAL_IN 0 25 25 40 1 25 25 40 0 133.333 133.333 n/a 1 133.333 133.333 n/a 0 156.25 156.25 25 1 155.52 155.52 25 0 n/a n/a 25 1 n/a n/a 25 0 77.76 77.76 38.88 1 77.76 77.76 38.88 0 156.25 156.25 25 1 156.25 156.25 25 0 155.52 155.52 26 1 155.52 155.52 26 0 40.08 40.08 25 1 40.08 40.08 25 0 n/a n/a 25 1 n/a n/a 25 0 0.25 0.25 40 1 0.25 0.25 40 0 0.008 0.008 40 1 0.008 0.008 19.44 0 n/a n/a 25 1 n/a n/a 25 0 156.25 156.25 n/a 1 156.25 156.25 n/a 0 100 100 27 1 100 100 27 0 n/a n/a 25 1 0 1 0 1 0 1 0 1 0 1 0 1 n/a 25 74.25 644.53125 8.0565 698.8 8.735 644.53125 644.53125 644.53125 n/a 25 25 n/a 25 74.25 644.53125 8.0565 698.8 8.735 644.53125 644.53125 644.53125 644.53125 25 25 25 40 40 25 25 25 25 40 40 25 25 40 40 Switchover Type Switchover Mode Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) Q0 Q1 Q0 Q1 P/on P/on 25 25 P/on P/on 156.25 156.25 P/on P/on 400 400 P/on P/on 533.333 533.333 P/on P/on 156.25 156.25 P/on P/on 155.52 155.52 P/on P/on 100 100 P/on P/on 125 125 P/on P/off 155.52 155.52 P/on P/off 155.52 155.52 P/on P/on 644.53125 644.53125 P/on P/on 322.265625 322.265625 P/on P/off 100 100 P/on P/off 155.52 155.52 D/on D/on 320.64 320.64 D/on D/on 240.48 240.48 D/on D/on 40.08 40.08 D/on D/on 40.08 40.08 P/on P/on 12 12 P/on P/on 12 12 D/on D/on 155.52 155.52 D/on D/on 155.52 155.52 D/on D/on 133.33 133.33 D/on D/on 125 125 D/on D/on 644.53125 644.53125 D/on D/on 322.265625 322.265625 D/on D/on 100 100 P/on P/on 50 50 D/on D/on 156.25 156.25 D/on D/on D/on P/on P/on P/on P/on D/on D/on D/on D/on P/off P/off D/on D/on D/on P/on P/on P/on P/on D/on D/on D/on D/on P/off P/off 100 156.25 148.5 161.13 161.13 174.7 174.7 161.1328125 161.1328125 161.1328125 161.1328125 25 156.25 100 156.25 148.5 161.13 161.13 174.7 174.7 161.1328125 161.1328125 161.1328125 161.1328125 25 156.25 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 21 ©2017 Integrated Device Technology, Inc. 849N212 Code (ddd) Mode -000 LoBW -001 LoBW -004 LoBW -005 LoBW -006 LoBW -007 LoBW -008 LoBW -009 LoBW -010 LoBW -999 LoBW Input Frequency (MHz) CONFIG CLK0 CLK1 XTAL_IN 0 25 25 40 1 25 25 40 0 2.048 2.048 25 1 25 25 25 0 2.048 2.048 25 1 156.25 156.25 25 0 0.03125 0.03125 27 1 0.03125 0.03125 27 0 0.0675 0.0675 27 1 0.0675 0.0675 27 0 0.135 0.135 27 1 0.135 0.135 27 0 10 10 25 1 10.24 10.24 25 0 25 25 25 1 2.048 2.048 25 0 2.048 2.048 25 1 156.25 156.25 25 0 25 25 40 1 25 25 40 Switchover Type Switchover Mode Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Manual Pin Output Style / Power-up State P = LVPECL, D = LVDS Output Frequency (MHz) Q0 Q1 Q0 Q1 P/on D/on 25 25 P/on D/on 156.25 156.25 P/on D/on 25 25 P/on D/on 2.048 2.048 P/on D/on 125 125 P/on D/on 125 125 D/on D/off 74.25 74.25 D/on D/off 74.25 74.25 D/on D/off 74.25 74.25 D/on D/off 74.25 74.25 D/on D/off 172 172 P/on D/off 172 172 P/on D/on 100 100 P/on D/on 10 10 P/on D/on 125 125 P/on D/on 125 125 P/on D/on 125 125 P/on D/on 125 125 P/off D/off 25 25 P/off D/off 156.25 156.25 NOTE: Please contact IDT (see last page) if a different configuration is desired. 1/16/2017 Product Ordering Guide Page 22 ©2017 Integrated Device Technology, Inc. Default Configurations for Universal Frequency Translator Family of Devices Corporate Headquarters 6024 Silver Creek Valley Road San Jose, CA 95138 USA www.IDT.com Sales 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com/go/sales Tech Support www.IDT.com/go/support DISCLAIMER Integrated Device Technology, Inc. (IDT) reserves the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. Integrated Device Technology, Inc.. All rights reserved. ©2017 Integrated Device Technology, Inc. January 16, 2017