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BB502CBS-TL-E

BB502CBS-TL-E

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    BB502CBS-TL-E - Built in Biasing Circuit MOS FET IC UHF RF Amplifier - Renesas Technology Corp

  • 数据手册
  • 价格&库存
BB502CBS-TL-E 数据手册
BB502C Built in Biasing Circuit MOS FET IC UHF RF Amplifier REJ03G0832-0600 (Previous ADE-208-810C) Rev.6.00 Apr 27, 2006 Features • • • • Built in Biasing Circuit; To reduce using parts cost & PC board space. Low noise; NF = 1.6 dB typ. at f = 900 MHz High gain; PG = 22 dB typ. at f = 900 MHz Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; CMPAK-4(SOT-343mod) Outline RENESAS Package code: PTSP0004ZA-A (Package name: CMPAK-4) 2 3 1 4 1. Source 2. Gate1 3. Gate2 4. Drain Notes: 1. Marking is “BS–”. 2. BB502C is individual type number of RENESAS BBFET. Rev.6.00 Apr 27, 2006 page 1 of 10 BB502C Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 6 +6 −0 +6 −0 20 100 150 –55 to +150 Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Gate1 to source cutoff current Gate2 to source cutoff current Gate1 to source cutoff voltage Gate2 to source cutoff voltage Drain current Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS IG1SS IG2SS VG1S(off) VG2S(off) ID(op) |yfs| Ciss Coss Crss PG NF Min 6 +6 +6 — — 0.5 0.5 8 20 1.4 0.7 — 17 — Typ — — — — — 0.7 0.7 11 25 1.7 1.1 0.02 22 1.6 Max — — — +100 +100 1.0 1.0 14 30 2.0 1.5 0.05 — 2.2 Unit V V V nA nA V V mA mS pF pF pF dB dB Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 IG2 = +10 µA, VG1S = VDS = 0 VG1S = +5 V, VG2S = VDS = 0 VG2S = +5 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 4 V ID = 100 µA VDS = 5 V, VG1S = 5 V ID = 100 µA VDS = 5 V, VG1 = 5 V VG2S = 4 V, RG = 180 kΩ VDS = 5 V, VG1 = 5 V, VG2S =4 V RG = 180 kΩ, f = 1 kHz VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 180 kΩ f = 1 MHz VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 180 kΩ f = 900 MHz Rev.6.00 Apr 27, 2006 page 2 of 10 BB502C Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 Gate 2 Gate 1 RG VG1 Drain A ID Source Application Circuit VAGC = 4 to 0.3 V BBFET VDS = 5 V RFC Output Input RG VGG = 5 V Rev.6.00 Apr 27, 2006 page 3 of 10 BB502C 900MHz Power Gain, Noise Figure Test Circuit VG1 VG2 C4 C5 VD C6 R1 R2 C3 G2 R3 D L3 RFC Output (50Ω) L4 Input (50Ω) L1 L2 G1 S C1 C2 C1, C2 : C3 : C4 to C6 : R1 : R2 : R3 : Variable Capacitor (10pF MAX) Disk Capacitor (1000pF) Air Capacitor (1000pF) 180 kΩ 47 kΩ 4.7 kΩ L1: 10 10 L2: 26 3 3 (φ1mm Copper wire) Unit: mm 8 21 L4: 29 10 7 7 10 L3: 18 RFC: φ1mm Copper wire with enamel 4turns inside dia 6mm Rev.6.00 Apr 27, 2006 page 4 of 10 BB502C Maximum Channel Power Dissipation Curve Channel Power Dissipation Pch (mW) 200 20 R G= 15 12 0 0 kΩ kΩ Typical Output Characteristics VG2S = 4 V VG1 = VDS 150 Drain Current ID (mA) 16 12 100 8 50 kΩ 0 18 k Ω 0 22 Ω k 70 2 4 330 kΩ 0 50 100 150 200 0 1 2 3 4 5 Ambient Temperature Ta (°C) Drain to Source Voltage VDS (V) Drain Current vs. Gate1 Voltage 20 VDS = 5 V RG = 120 kΩ 4V Drain Current vs. Gate1 Voltage 20 VDS = 5 V RG = 180 kΩ Drain Current ID (mA) 16 12 3V 2V Drain Current ID (mA) 16 12 3V 8 4V 2V 8 4 VG2S = 1 V 4 VG2S = 1 V 0 1 2 3 4 5 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance |yfs| (mS) 30 VDS = 5 V RG = 120 kΩ 24 f = 1 kHz 18 2V 4V 3V Drain Current vs. Gate1 Voltage 20 VDS = 5 V RG = 270 kΩ 16 Drain Current ID (mA) 12 8 3V 4V 2V 12 4 6 VG2S = 1 V VG2S = 1 V 0 1 2 3 4 5 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Rev.6.00 Apr 27, 2006 page 5 of 10 BB502C Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance |yfs| (mS) 30 VDS = 5 V RG = 180 kΩ f = 1 kHz 2V 4V 3V Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance |yfs| (mS) 30 VDS = 5 V RG = 270 kΩ f = 1 kHz 3V 24 24 4V 18 18 12 12 6 VG2S = 1 V 6 VG2S = 1 V 0 1 2 3 4 5 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Power Gain vs. Gate Resistance 30 4 Noise Figure vs. Gate Resistance Noise Figure NF (dB) Power Gain PG (dB) 25 20 15 10 5 0 100 VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 3 VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 2 1 200 500 1000 0 100 200 500 1000 Gate Resistance RG (kΩ) Gate Resistance RG (kΩ) Power Gain vs. Drain Current 30 25 4 Noise Figure vs. Drain Current Power Gain PG (dB) Noise Figure NF (dB) 3 20 15 10 5 0 0 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 5 10 15 20 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 2 1 0 0 5 10 15 20 Drain Current ID (mA) Drain Current ID (mA) Rev.6.00 Apr 27, 2006 page 6 of 10 BB502C Power Gain vs. Gate2 to Source Voltage 25 Drain Current vs. Gate Resistance 20 Power Gain PG (dB) Drain Current ID (mA) 15 VDS = VG1 = 5 V VG2S = 4 V 20 15 10 10 VDS = 5 V RG = 180 kΩ f = 900 MHz 2 3 4 5 5 0 100 200 500 1000 0 1 Gate Resistance RG (kΩ) Noise Figure vs. Gate2 to Source Voltage 5 4 Gate2 to Source Voltage VG2S (V) Input Capacitance vs. Gate2 to Source Voltage 4 Input Capacitance Ciss (pF) Noise Figure NF (dB) VDS = 5 V RG = 180 kΩ f = 900 MHz 3 3 2 2 1 VDS = 5 V RG = 180 kΩ f = 1 MHz 0 1 2 3 4 1 1 2 3 4 0 Gate2 to Source Voltage VG2S (V) Gain Reduction vs. Gate2 to Source Voltage 0 Gate2 to Source Voltage VG2S (V) Gain Reduction GR (dB) 10 20 30 VDS = VG1 = 5 V VG2S = 4 V RG = 180 kΩ 40 50 4 3 2 1 0 Gate2 to Source Voltage VG2S (V) Rev.6.00 Apr 27, 2006 page 7 of 10 BB502C S11 Parameter vs. Frequency .8 .6 .4 3 .2 4 5 10 0 .2 .4 .6 .8 1 1.5 2 3 45 10 –10 –.2 –5 –4 –3 –.4 –.6 –.8 –1.5 –2 –120° –60° –90° –1 180° 0° 150° 30 ° 1 1.5 2 S21 Parameter vs. Frequency 90° 120° Scale: 1 / div. 60 ° –150° –30° Test Condition; VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) S12 Parameter vs. Frequency 90° 120° S22 Parameter vs. Frequency .8 .6 .4 1 1.5 2 30 ° .2 3 4 5 10 Scale: 0.002 / div. 60 ° 150° 180° 0° 0 .2 .4 .6 .8 1 1.5 2 3 45 10 –10 –.2 –150° –30° –.4 –120° –60° –90° –.6 –.8 –1.5 –2 –1 –5 –4 –3 Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Test Condition: VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 180 kΩ , Zo = 50Ω 50 to 1000 MHz (50 MHz step) Rev.6.00 Apr 27, 2006 page 8 of 10 BB502C S Parameter (VDS = VG1 = 5V, VG2S = 4V, RG = 180kΩ, Zo = 50Ω) f(MHz) 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 MAG. 0.994 0.994 0.991 0.985 0.985 0.975 0.969 0.962 0.954 0.945 0.935 0.925 0.918 0.909 0.898 0.887 0.874 0.862 0.855 0.845 S11 ANG. –2.8 –5.7 –9.2 –12.5 –15.5 –18.7 –22.0 –24.9 –27.7 –30.8 –33.8 –36.6 –39.5 –42.5 –45.0 –47.8 –50.6 –53.0 –55.5 –58.1 MAG. 2.52 2.51 2.50 2.47 2.46 2.43 2.40 2.38 2.35 2.31 2.28 2.25 2.21 2.18 2.14 2.09 2.07 2.03 1.99 1.95 S21 ANG. 176.2 172.4 168.1 164.1 160.0 156.4 152.3 148.6 144.6 141.0 136.7 133.4 130.3 126.1 122.9 119.5 116.0 112.7 109.4 108.1 MAG. 0.00072 0.00161 0.00230 0.00297 0.00374 0.00436 0.00507 0.00557 0.00625 0.00663 0.00721 0.00747 0.00761 0.00807 0.00828 0.00801 0.00815 0.00832 0.00738 0.00802 S12 ANG. 88.6 80.9 86.6 78.0 78.9 80.6 70.9 77.3 72.4 70.0 70.5 68.4 65.6 65.6 67.6 65.1 63.6 65.1 61.8 65.8 MAG. 0.995 0.998 0.997 0.996 0.994 0.992 0.990 0.989 0.987 0.984 0.981 0.978 0.975 0.972 0.969 0.965 0.961 0.958 0.954 0.951 S22 ANG. –2.2 –4.0 –6.2 –8.2 –10.2 –12.2 –14.2 –16.3 –18.5 –20.4 –22.4 –24.3 –26.4 –28.3 –30.2 –32.2 –34.2 –36.1 –37.9 –39.8 Rev.6.00 Apr 27, 2006 page 9 of 10 BB502C Package Dimensions Package Name CMPAK-4 JEITA Package Code SC-82A RENESAS Code PTSP0004ZA-A Previous Code CMPAK-4(T) / CMPAK-4(T)V MASS[Typ.] 0.006g D e2 b1 B B e A Q c E HE LP L Reference Symbol Dimension in Millimeters A xM A SA b L1 A3 e2 e A2 A l1 yS b b2 c c1 c A-A Section A1 S b1 b3 c1 l1 b5 e1 b4 B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 l1 Q Min 0.8 0 0.8 0.25 0.35 0.1 1.8 1.15 1.8 0.3 0.1 0.2 Nom 0.9 0.25 0.32 0.42 0.3 0.4 0.13 0.11 2.0 1.25 0.65 0.6 2.1 Max 1.1 0.1 1.0 0.4 0.5 0.15 2.2 1.35 2.4 0.7 0.5 0.6 0.05 0.05 0.45 0.55 0.9 1.5 0.2 Ordering Information Part Name BB502CBS-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.6.00 Apr 27, 2006 page 10 of 10 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500, Fax: (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: (1628) 585-100, Fax: (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: (21) 5877-1818, Fax: (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: 2265-6688, Fax: 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: (2) 796-3115, Fax: (2) 796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: 7955-9390, Fax: 7955-9510 © 2006. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .6.0
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