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GWS9294

GWS9294

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    VDFN4

  • 描述:

    MOSFET 2 N-CH 20V 10.1A 4QFN

  • 数据手册
  • 价格&库存
GWS9294 数据手册
DATASHEET Dual 20V N-Channel Power MOSFET GWS9294 Features The GWS9294 is a dual 20V, 12mΩ, N-channel power MOSFET used for Li-ion battery protection. It is offered in a 2mmx2mm MLPD with a very low thickness profile, 1mm maximum thickness. The device has extremely high power density, reducing the board size of the Li-ion battery power system. Designed for handheld devices with a high level of ESD protection. • Monolithic dual MOSFET • Low rDS(ON) in a small footprint • Ultra low gate charge and figure of merit • MLPD 2mmx2mm package • Low thermal resistance Applications • Li-ion battery protection PRODUCT SUMMARY V(BR)DSS ID = 250µA 20V Minimum • Portable devices, cell phones, PDA rDS(ON) VGS = 4.5V 12mΩ Typical • Rated for short-circuit and overcurrent protection • Integrated gate diodes provide ESD protection of 2.5kV HBM FET1 FET2 Gate1 3 Gate2 G2 4 Source1 Source2 G1 2 S1 FIGURE 1. EQUIVALENT CIRCUIT December 22, 2015 FN8786.1 S2 1 1 FIGURE 2. MLPD BOTTOM SIDE CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. GWS9294 Ordering Information PART NUMBER GWS9294 94 Pin Configuration GWS9294 (4 LD QFN) BOTTOM VIEW Submit Document Feedback TEMP RANGE (°C) PART MARKING -55 to +150 PACKAGE (RoHS Compliant) 4 Ld QFN Pin Descriptions PIN # PIN NAME DESCRIPTION 1 S1 Source of FET1 G2 S2 2 G1 Gate of FET1 3 4 3 G2 Gate of FET2 4 S2 Source of FET2 2 1 G1 S1 2 FN8786.1 December 22, 2015 GWS9294 Absolute Maximum Ratings (Note 1) Drain-to-Source Voltage (VDS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V Gate-to-Source Voltage (VGS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12V Drain Current (ID) (Note 2) TA = +25°C . . . . . . . . . . . . . . . . . . . . . . .10.1A (10s), 6.5A (Steady State) TA = +70°C . . . . . . . . . . . . . . . . . . . . . . . .8.1A (10s), 5.2A (Steady State) Drain Current (RthjFoot) TF = +25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15A (Steady State) Pulsed Drain Current (IDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60A ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5kV Thermal Information Thermal Resistance (Typical) JA (°C/W) JF (°C/W) t ≤10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Steady State . . . . . . . . . . . . . . . . . . . . . . . . . 85 16 Maximum Power Dissipation (PD) (Note 2) TA = +25°C . . . . . . . . . . . . . . . . . . . . . . 3.6W (10s) 1.47W (Steady State) TA = +70°C . . . . . . . . . . . . . . . . . . . . .2.29W (10s) 0.94W (Steady State) Junction and Storage Temperature Range (TJ, Tstg). . . . .-55°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. TJ = +25°C unless otherwise noted. 2. Surface mounted on FR4 board. Electrical Characteristics SYMBOL TJ = +25°C unless otherwise noted PARAMETER TEST CONDITIONS MIN (Note 3) TYP (Note 4) MAX (Note 3) UNIT STATIC V(BR)SSS Drain-to-Source Breakdown Voltage VGS = 0V, ID = 250µA ISSS Zero Gate Voltage Drain Current VGS = 0V, VDS = 20V 1 µA IGSS Gate Body Leakage VDS = 0V VGS = ±8V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1mA 0.5 0.6 1.5 V rDS(ON) Drain-to-Source On-State Resistance (Note 5) (per MOSFET) VGS = 4.5V, ID = 6.5A 6 12 13 mΩ VGS = 4.0V, ID = 6.5A 7 13 14 mΩ VGS = 3.1V, ID = 6.0A 8 14 18 mΩ VGS = 2.5V, ID = 5.5A 9 16 20 mΩ VGS = 4.5V, ID = 6.5A 12 24 26 mΩ VGS = 4.0V, ID = 6.5A 13 25 28 mΩ VGS = 3.1V, ID = 6.0A 16 28 35 mΩ VGS = 2.5V, ID = 5.5A 17 32 40 mΩ Source-to-Drain Diode Voltage VGS = 0, IS = 6.5A 0.5 0.8 1 V Qg Total Gate Charge VDS = 10V, ID = 5.0A, VGS = 4.0V 11 nC Ciss Input Capacitance VDS = 10V, VGS = 0V, f = 1MHz 900 pF Coss Output Capacitance 300 pF Crss Reverse Transfer Capacitance 150 pF rSS(ON) VSD Source-to-Source On-State Resistance (Note 5) (both MOSFETs in series) 20 V DYNAMIC NOTES: 3. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 4. Typical values are for TA = +25°C. 5. Good Kelvin measurement required. Submit Document Feedback 3 FN8786.1 December 22, 2015 GWS9294 Test Circuit Examples for Measuring FET1 Key Parameters S2 S2 A G2 G2 G1 G1 +V A ±V S1 S1 FIGURE 3. ISSS TEST CIRCUIT FIGURE 4. IGSS TEST CIRCUIT S2 S2 A G2 G2 V V G1 G1 +V ±V S1 S1 FIGURE 6. rSS(ON) TEST CIRCUIT FIGURE 5. VGS(th) TEST CIRCUIT S2 4.5V G2 V V G1 S1 FIGURE 7. VFS-S TEST CIRCUIT Submit Document Feedback 4 FN8786.1 December 22, 2015 GWS9294 Typical Performance Curves 10 60 50 40 9 VGS = 4.0V IS - SOURCE CURRENT (A) IS - SOURCE CURRENT (A) VGS = 4.5V VGS = 3.1V 30 VGS = 2.5V 20 10 8 7 6 5 TJ = +125°C 4 TJ = -25°C TJ = +75°C 3 TJ = +25°C 2 1 0 0 1 1 2 2 3 VSS - SOURCE-TO-SOURCE VOLTAGE (V) 0 3 0 1 VGS - GATE-TO-SOURCE (V) FIGURE 9. TRANSFER CHARACTERISTICS 50 VGS = 2.5V 45 VGS = 3.1V 40 VGS = 4.0V 35 30 25 20 VGS = 4.5V 15 10 0 1 10 100 rSS(ON) - ON-STATE RESISTANCE (mΩ) rSS(ON) - ON-STATE RESISTANCE (mΩ) FIGURE 8. OUTPUT CHARACTERISTICS 160 140 120 100 80 IS = 6.5A 60 40 20 0 0 5 50 35 VGS = 2.5V VGS = 3.1V VGS = 4.0V 30 25 VGS = 4.5V 20 15 10 -50 -25 0 25 50 75 100 125 TJ - JUNCTION TEMPERATURE (oC) FIGURE 12. SOURCE-TO-SOURCE ON-STATE RESISTANCE vs JUNCTION TEMPERATURE Submit Document Feedback 5 15 150 FIGURE 11. SOURCE-TO-SOURCE ON-STATE RESISTANCE vs GATE-TO-SOURCE VOLTAGE VGS(th) - GATE THRESHOLD VOLTAGE (V) rSS(ON) - ON-STATE RESISTANCE (mΩ) FIGURE 10. SOURCE-TO-SOURCE ON-STATE RESISTANCE vs SOURCE CURRENT 40 10 VGS - GATE-TO-SOURCE VOLTAGE (V) IS - SOURCE CURRENT (A) 45 2 1.2 IS = 1mA 1.0 0.8 0.6 0.4 0.2 -50 -25 0 25 50 75 100 125 150 TJ - JUNCTION TEMPERATURE (oC) FIGURE 13. GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE FN8786.1 December 22, 2015 GWS9294 (Continued) 4.0 100 VSS = 10V IS = 5A VGS = 0 to 4.0V 3.5 3.0 IF - DIODE CURRENT (A) VGS - GATE-TO-SOURCE VOLTAGE (V) Typical Performance Curves 2.5 2.0 1.5 1.0 0.5 0.0 0 TJ = +75°C TJ = +25°C 0.0 IS - SOURCE CURRENT (A) 100 Ciss Coss 1000 Crss 100 10 5 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSS - SOURCE TO SOURCE VOLTAGE (V) 2.0 FIGURE 15. SOURCE-TO-SOURCE DIODE FORWARD VOLTAGE 10000 0 TJ = -25°C 1 5 10 QG - TOTAL GATE CHARGE (nC) FIGURE 14. GATE CHARGE C - CAPACITANCE (pF) TJ = +125°C 10 10 15 rSS(ON) LIMITED VGS = 4.5V 10 1ms 1 0.1 10ms TA = +25oC, SINGLE PULSE 100ms DC 0.01 20 0.1 1 10 100 VSS - SOURCE-TO-SOURCE VOLTAGE (V) VSS - SOURCE-TO-SOURCE VOLTAGE (V) FIGURE 16. CAPACITANCE FIGURE 17. MAXIMUM RATED FORWARD BIASED SAFE OPERATING AREA 1.00 r(t) - TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.50 0.20 0.10 0.10 0.05 0.02 SINGLE PULSE 0.01 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 t - TIME (s) FIGURE 18. TRANSIENT THERMAL RESPONSE, JUNCTION-TO-AMBIENT Submit Document Feedback 6 FN8786.1 December 22, 2015 GWS9294 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE December 22, 2015 FN8786.1 Added “Note 1. TJ = +25°C unless otherwise noted.” to Abs Max on page 3. October 30, 2015 FN8786.0 Initial release. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 7 FN8786.1 December 22, 2015 GWS9294 Package Outline and Dimensions Pin 1 2 3 4 Symbol Min A 0.70 A1 b Nom Node Source 1 Gate 1 Gate 2 Source 2 Max 1.00 0.02 0.275 0.05 0.400 D 2.00 BSC E 2.00 BSC e 0.65 BSC L 0.55 0.60 0.65 h 0.10 0.15 0.20 All dimensions in mm Submit Document Feedback 8 FN8786.1 December 22, 2015 GWS9294 Mounting Pad Layout and Dimensions c a d b Symbol Min Nom Max a 0.788 0.838 0.888 b 0.358 0.381 0.404 c d 0.65 BSC 2.22 2.365 2.50 All dimensions in mm Submit Document Feedback 9 FN8786.1 December 22, 2015
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