HM62W8511HCJP-10

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Please contact Renesas Technology Corporation for further details on these materials or the products contained therein. HM62W8511HC Series 4M High Speed SRAM (512-kword × 8-bit) ADE-203-1201C (Z) Rev. 2.0 Nov. 9, 2001 Description The HM62W8511HC is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. The HM62W8511HC is packaged in 400-mil 36-pin SOJ for high density surface mounting. Features • Single supply : 3.3 V ± 0.3 V • Access time : 10/12 ns (max) • Completely static memory  No clock or timing strobe required • Equal access and cycle times • Directly TTL compatible  All inputs and outputs • Operating current : 115/100 mA (max) • TTL standby current : 40 mA (max) • CMOS standby current : 5 mA (max) : 1 mA (max) (L-version) • Data retention current : 0.6 mA (max) (L-version) • Data retention voltage : 2 V (min) (L-version) • Center VCC and VSS type pin out HM62W8511HC Series Ordering Information Type No. HM62W8511HCJP-10 HM62W8511HCJP-12 HM62W8511HCLJP-10 HM62W8511HCLJP-12 Access time 10 ns 12 ns 10 ns 12 ns Device marking HM62W8511CJP10 HM62W8511CJP12 HM62W8511CLJP10 HM62W8511CLJP12 Package 400-mil 36-pin plastic SOJ (CP-36D) Rev. 2, Nov. 2001, page 2 of 14 HM62W8511HC Series Pin Arrangement 36-pin SOJ A0 A1 A2 A3 A4 I/O1 I/O2 VCC VSS I/O3 I/O4 A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 (Top View) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 I/O8 I/O7 VSS VCC I/O6 I/O5 A14 A13 A12 A11 A10 NC NC A18 A17 A16 A15 Pin Description Pin name A0 to A18 I/O1 to I/O8 CS OE WE VCC VSS NC Function Address input Data input/output Chip select Output enable Write enable Power supply Ground No connection Rev. 2, Nov. 2001, page 3 of 14 HM62W8511HC Series Block Diagram (LSB) A14 A13 A12 A5 A6 A7 A11 A10 A3 A1 (MSB) I/O1 . . . I/O8 A8 A9 A18 A16 A17 A0 A2 A4 A15 (LSB) (MSB) VCC Row decoder 1024-row × 32-column × 16-block × 8-bit (4,194,304 bits) VSS CS Column I/O Input data control Column decoder CS CS Rev. 2, Nov. 2001, page 4 of 14 HM62W8511HC Series Operation Table CS CS H L L L L Note: OE OE × H L H L WE WE × H H L L Mode Standby Output disable Read Write Write VCC current ISB, ISB1 ICC ICC ICC ICC I/O High-Z High-Z Dout Din Din Ref. cycle — — Read cycle (1) to (3) Write cycle (1) Write cycle (2) H: VIH, L: VIL, ×: VIH or VIL Absolute Maximum Ratings Parameter Supply voltage relative to VSS Voltage on any pin relative to VSS Power dissipation Operating temperature Storage temperature Storage temperature under bias Symbol VCC VT PT Topr Tstg Tbias Value –0.5 to +4.6 –0.5* to VCC+0.5* 1.0 0 to +70 –55 to +125 –10 to +85 1 2 Unit V V W °C °C °C Notes: 1. VT (min) = –2.0 V for pulse width (under shoot) ≤ 6 ns. 2. VT (max) = VCC+2.0 V for pulse width (over shoot) ≤ 6 ns. Recommended DC Operating Conditions (Ta = 0 to +70°C) Parameter Supply voltage Input voltage Notes: 1. 2. 3. 4. Symbol VCC* VSS* VIH VIL 3 4 Min 3.0 0 2.0 –0.5* 1 Typ 3.3 0 — — Max 3.6 0 VCC + 0.5* 0.8 2 Unit V V V V VIL (min) = –2.0 V for pulse width (under shoot) ≤ 6 ns. VIH (max) = VCC+2.0 V for pulse width (over shoot) ≤ 6 ns. The supply voltage with all VCC pins must be on the same level. The supply voltage with all VSS pins must be on the same level. Rev. 2, Nov. 2001, page 5 of 14 HM62W8511HC Series DC Characteristics (Ta = 0 to +70°C, VCC = 3.3 V ± 0.3 V, VSS = 0V) Parameter Input leakage current Output leakage current Symbol Min IILII IILOI — — — Typ* Max — — — 2 2 115 1 Unit µA µA mA Test conditions Vin = VSS to VCC Vin = VSS to VCC Min cycle CS = VIL, lout = 0 mA Other inputs = VIH/VIL Min cycle CS = VIH, Other inputs = VIH/VIL f = 0 MHz VCC ≥ CS ≥ VCC - 0.2 V, (1) 0 V ≤ Vin ≤ 0.2 V or (2) VCC ≥ Vin ≥ VCC - 0.2 V IOL = 8 mA IOH = –4 mA Operation power supply current 10ns cycle ICC 12 ns cycle ICC Standby power supply current ISB — — — — 100 40 mA mA ISB1 — 2.5 5 mA —* Output voltage VOL VOH — 2 0.5 — — 1.0* 0.4 — 2 mA V V 2.4 Notes: 1. Typical values are at VCC = 3.3 V, Ta = +25°C and not guaranteed. 2. This characteristics is guaranteed only for L-version. Capacitance (Ta = +25°C, f = 1.0 MHz) Parameter Input capacitance* Note: 1 1 Symbol Cin CI/O Min — — Typ — — Max 6 8 Unit pF pF Test conditions Vin = 0 V VI/O = 0 V Input/output capacitance* 1. This parameter is sampled and not 100% tested. Rev. 2, Nov. 2001, page 6 of 14 HM62W8511HC Series AC Characteristics (Ta = 0 to +70°C, VCC = 3.3 V ± 0.3 V, unless otherwise noted.) Test Conditions • Input pulse levels: 3.0 V/0.0 V • Input rise and fall time: 3 ns • Input and output timing reference levels: 1.5 V • Output load: See figures (Including scope and jig) 1.5 V 3.3 V Dout Zo=50 Ω RL=50 Ω Dout 30 pF 353 Ω 319Ω 5 pF Output load (A) Output load (B) (for tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, and tOW) Read Cycle HM62W8511HC -10 Parameter Read cycle time Address access time Chip select access time Output enable to output valid Output hold from address change Chip select to output in low-Z Output enable to output in low-Z Chip deselect to output in high-Z Output disable to output in high-Z Symbol tRC tAA tACS tOE tOH tCLZ tOLZ tCHZ tOHZ Min 10 — — — 3 3 0 — — Max — 10 10 5 — — — 5 5 -12 Min 12 — — — 3 3 0 — — Max — 12 12 6 — — — 6 6 Unit ns ns ns ns ns ns ns ns ns 1 1 1 1 Notes Rev. 2, Nov. 2001, page 7 of 14 HM62W8511HC Series Write Cycle HM62W8511HC -10 Parameter Write cycle time Address valid to end of write Chip select to end of write Write pulse width Address setup time Write recovery time Data to write time overlap Data hold from write time Write disable to output in low-Z Output disable to output in high-Z Write enable to output in high-Z Symbol tWC tAW tCW tWP tAS tWR tDW tDH tOW tOHZ tWHZ Min 10 7 7 7 0 0 5 0 3 — — Max — — — — — — — — — 5 5 -12 Min 12 8 8 8 0 0 6 0 3 — — Max — — — — — — — — — 6 6 Unit ns ns ns ns ns ns ns ns ns ns ns 1 1 1 9 8 6 7 Notes Notes: 1. Transition is measured ±200 mV from steady voltage with output load (B). This parameter is sampled and not 100% tested. 2. Address should be valid prior to or coincident with CS transition low. 3. WE and/or CS must be high during address transition time. 4. If CS and OE are low during this period, I/O pins are in the output state. Then, the data input signals of opposite phase to the outputs must not be applied to them. 5. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition, output remains a high impedance state. 6. tAS is measured from the latest address transition to the later of CS or WE going low. 7. tWR is measured from the earlier of CS or WE going high to the first address transition. 8. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going low and WE going low. A write ends at the earliest transition among CS going high and WE going high. tWP is measured from the beginning of write to the end of write. 9. tCW is measured from the later of CS going low to the end of write. Rev. 2, Nov. 2001, page 8 of 14 HM62W8511HC Series Timing Waveforms Read Timing Waveform (1) (WE = VIH) tRC Address Valid address tAA tOH tCHZ CS OE tACS tOE tOHZ tOLZ tCLZ Dout High impedance Valid data Read Timing Waveform (2) (WE = VIH, CS = VIL, OE = VIL) tRC Address tOH Dout Valid address tAA tOH Valid data Rev. 2, Nov. 2001, page 9 of 14 HM62W8511HC Series Read Timing Waveform (3) (WE = VIH, CS = VIL, OE = VIL)* tRC 2 +5 tACS tCLZ Dout High impedance Valid data High impedance tCHZ Write Timing Waveform (1) (WE Controlled) tWC Address Valid address tAW tWR tCW *3 tAS *3 tOHZ Dout High impedance*5 tDW Din *4 tDH *4 tWP Valid data Rev. 2, Nov. 2001, page 10 of 14 HM62W8511HC Series Write Timing Waveform (2) (CS Controlled) tWC Address Valid address tCW *3 tAW tWP *3 tAS tWHZ Dout tOW High impedance*5 tDW Din *4 tDH *4 tWR Valid data Rev. 2, Nov. 2001, page 11 of 14 HM62W8511HC Series Low VCC Data Retention Characteristics (Ta = 0 to +70°C) This characteristics is guaranteed only for L-version. Parameter VCC for data retention Symbol VDR Min 2.0 Typ* — 1 Max — Unit V Test conditions VCC ≥ CS ≥ VCC – 0.2 V (1) 0 V ≤ Vin ≤ 0.2 V or (2) VCC ≥ Vin ≥ VCC – 0.2 V VCC = 3 V, VCC ≥ CS ≥ VCC – 0.2 V (1) 0 V ≤ Vin ≤ 0.2 V or (2) VCC ≥ Vin ≥ VCC – 0.2 V See retention waveform Data retention current ICCDR — 300 600 µA Chip deselect to data retention time Operation recovery time Note: tCDR tR 0 5 — — — — ns ms 1. Typical values are at VCC = 3.0 V, Ta = +25°C, and not guaranteed. Low VCC Data Retention Timing Waveform t CDR V CC 3.0 V Data retention mode tR V DR 2.0 V 0V VCC ≥ ≥ VCC – 0.2 V Rev. 2, Nov. 2001, page 12 of 14 HM62W8511HC Series Package Dimensions HM62W8511HCJP/HCLJP Series (CP-36D) As of January, 2001 23.25 23.62 Max 36 19 Unit: mm 1 3.50 ± 0.26 0.74 18 10.16 ± 0.13 11.18 ± 0.13 1.30 Max 0.80 +0.25 –0.17 *0.43 ± 0.10 0.41 ± 0.08 1.27 9.40 ± 0.25 Hitachi Code JEDEC EIAJ Mass (reference value) CP-36D Conforms Conforms 1.4 g 0.10 *Dimension including the plating thickness Base material dimension Rev. 2, Nov. 2001, page 13 of 14 2.85 ± 0.12 HM62W8511HC Series Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Sales Offices Hitachi, Ltd. Semiconductor & Integrated Circuits Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: (03) 3270-2111 Fax: (03) 3270-5109 URL http://www.hitachisemiconductor.com/ For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive San Jose,CA 95134 Tel: (408) 433-1990 Fax: (408) 433-0223 Hitachi Europe Ltd. Electronic Components Group Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: (1628) 585000 Fax: (1628) 585200 Hitachi Europe GmbH Electronic Components Group Dornacher Straße 3 D-85622 Feldkirchen Postfach 201, D-85619 Feldkirchen Germany Tel: (89) 9 9180-0 Fax: (89) 9 29 30 00 Hitachi Asia Ltd. Hitachi Tower 16 Collyer Quay #20-00 Singapore 049318 Tel : -538-6533/538-8577 Fax : -538-6933/538-3877 URL : http://semiconductor.hitachi.com.sg Hitachi Asia Ltd. (Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : -(2)-2718-3666 Fax : -(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : -(2)-735-9218 Fax : -(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan. Colophon 5.0 Rev. 2, Nov. 2001, page 14 of 14