ICS271PGT

DATASHEET TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER Description Features The ICS271 field programmable VCXO clock synthesizer generates up to six high-quality, high-frequency clock outputs including multiple reference clocks from a low-frequency crystal input. It is designed to replace crystals and crystal oscillators in most electronic systems. • • • • • • • Using IDT’s VersaClockTM software to configure PLLs and outputs, the ICS271 contains a One-Time Programmable (OTP) ROM for field programmability. Programming features include VCXO, eight selectable configuration registers and up to two sets of three low-skew outputs. Each of the two output groups are powered by a separate VDDO voltage. VDDO may vary from 1.8 V to VDD. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace VCXOs, multiple crystals and oscillators, saving board space and cost. • • • • • ICS271 Packaged as 20-pin TSSOP Eight addressable registers Replaces multiple crystals and oscillators Output frequencies up to 200 MHz at 3.3 V Input crystal frequency of 5 to 27 MHz Up to six reference outputs Separate 1.8 to 3.3 V VDDO output level controls for each bank of 3 outputs Up to two sets of three low-skew outputs Operating voltages of 3.3 V Controllable output drive levels Advanced, low-power CMOS process Available in Pb (lead) free packaging NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 The ICS271 is also available in factory programmed custom versions for high-volume applications. Block Diagram VDD S2:S0 3 OTP ROM with PLL Values 3 VDDO1 PLL1 CLK1 CLK2 Divide Logic and Output Enable Control PLL2 VIN CLK3 CLK4 PLL3 X1 Crystal X2 External capacitors are required. CLK5 Voltage Controlled Crystal Oscillator CLK6 GND 2 VDDO2 PDTS IDT™ / ICS™ TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER 1 ICS271 REV D 081809 ICS271 TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER EPROM VCXO AND SYNTHESIZER Pin Assignment VIN 1 20 S2 S0 2 19 VDD S1 VDD 3 18 PDTS 4 17 GND VDDO1 5 16 CLK6 CLK1 6 15 CLK5 CLK2 7 14 CLK4 CLK3 GND 8 13 9 12 VDDO2 VDD 10 11 X2 X1 20 pin (173 mil) TSSOP Pin Descriptions Pin Number Pin Name Pin Type 1 VIN Input 2 S0 Input 3 S1 Input Pin Description Voltage input to VCXO. Zero to 3.3 V signal which controls the VCXO frequency Select pin 0. Internal pull-up resistor. 4 VDD Power Select pin 1. Internal pull-up resistor. Connect to +3.3 V. 5 VDDO1 Power Power supply for outputs CLK1-CLK3. Must not exceed VDD. 6 CLK1 Output Output clock 1. Weak internal pull-down when tri-state. 7 CLK2 Output Output clock 2. Weak internal pull-down when tri-state. 8 CLK3 Output Output clock 3. Weak internal pull-down when tri-state. 9 GND Power Connect to ground. 10 X1 XI Crystal input. Connect this pin to a crystal. 11 X2 XO 12 VDD Power Crystal Output. Connect this pin to a crystal. Connect to +3.3 V. 13 VDDO2 Power Power supply for outputs CLK4-CLK6. Must not exceed VDD. 14 CLK4 Output Output clock 4. Weak internal pull-down when tri-state. 15 CLK5 Output Output clock 5. Weak internal pull-down when tri-state. 16 CLK6 Output Output clock 6. Weak internal pull-down when tri-state. 17 GND Power Connect to ground. 18 PDTS Input 19 VDD Power Power-down tri-state. Powers down entire chip and tri-states clock outputs when low. Internal pull-up resistor. Connect to +3.3 V. 20 S2 Input Select pin 2. Internal pull-up resistor. IDT™ / ICS™ TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER 2 ICS271 REV D 081809 ICS271 TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER External Components The ICS271 requires a minimum number of external components for proper operation. Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. Decoupling Capacitors As with any high-performance mixed-signal IC, the ICS271 must be isolated from system power supply noise to perform optimally. Decoupling capacitors of 0.01µF must be connected between each VDD, VDDO, and the PCB ground plane. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias on the decoupling circuit. Quartz Crystal The ICS271 VCXO function consists of the external crystal and the integrated VCXO oscillator circuit. To assure the best system performance (frequency pull range) and reliability, a crystal device with the recommended parameters (shown below) must be used, and the layout guidelines discussed in the following section shown must be followed. The frequency of oscillation of a quartz crystal is determined by its “cut” and by the load capacitors connected to it. The ICS271 incorporates on-chip variable load capacitors that “pull” (change) the frequency of the crystal. The crystal specified for use with the ICS271 is designed to have zero frequency error when the total of on-chip + stray capacitance is 14 pF. Recommended Crystal Parameters: Initial Accuracy at 25° C Temperature Stability Aging Load Capacitance Shunt Capacitance, C0 C0/C1 Ratio Equivalent Series Resistance ±20 ppm ±30 ppm ±20 ppm 14 pf 7 pF Max 250 Max 35Ω Max EPROM VCXO AND SYNTHESIZER The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the ICS271. There should be no via’s between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal. See application note MAN05. Crystal Tuning Load Capacitors The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used (manufacture and frequency) and by PCB layout. The typical required capacitor value is 1 to 4 pF. To determine the need for and value of the crystal adjustment capacitors, you will need a PC board of your final layout, a frequency counter capable of about 1 ppm resolution and accuracy, two power supplies, and some samples of the crystals which you plan to use in production, along with measured initial accuracy for each crystal at the specified crystal load capacitance, CL. To determine the value of the crystal capacitors: 1. Connect VDD of the ICS271 to 3.3 V. Connect pin 1 of the ICS271 to the second power supply. Adjust the voltage on pin 1 to 0V. Measure and record the frequency of the CLK output. 2. Adjust the voltage on pin 1 to 3.3 V. Measure and record the frequency of the same output. To calculate the centering error: 6 ( f3.0V – ft arg et ) + ( f0V – ft arg et ) Error = 10 x ----------------------------------------------------------------------- – errorxtal ft arg et Where: ftarget = nominal crystal frequency IDT™ / ICS™ TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER 3 ICS271 REV D 081809 ICS271 TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER EPROM VCXO AND SYNTHESIZER errorxtal =actual initial accuracy (in ppm) of the crystal being measured For VDDO