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ICS507M-01

ICS507M-01

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SOIC16_150MIL

  • 描述:

    IC CLOCK SYNTHESIZER PECL 16SOIC

  • 数据手册
  • 价格&库存
ICS507M-01 数据手册
DATASHEET ICS507-01 PECL CLOCK SYNTHESIZER Description Features The ICS507-01 is an inexpensive, simple way to generate a low jitter 155.52 MHz (or other high speed) differential PECL clock output from a low frequency crystal input. Using Phase-Locked-Loop (PLL) techniques, the devices use a standard fundamental mode crystal to produce output clocks up to 200 MHz. • • • • • • Stored in each chip’s ROM is the ability to generate a selection of different multiples of the input reference frequency, including an exact 155.52 MHz clock from common crystals. For lowest jitter and phase noise on a 155.52 MHz clock, a 19.44 MHz crystal and the x8 selection can be used. Packaged in 16 pin SOIC Available in Pb (lead) free package Input crystal frequency of 5 - 27 MHz Input clock frequency of 5 - 52 MHz Enable usage of common low-cost crystal Differential PECL output clock frequencies up to 200 MHz • Duty cycle of 49/51 • Operation voltage of 3.3 V or 5.0 V (±5%) • Ideal for SONET applications and oscillator manufacturers This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed. • Available in die form • Industrial temperature versions available • ICS507-02 is no longer available Block Diagram VDD 1.1 kohm RES 270 ohm S0:1 2 X1/ICLK Crystal or clock input X2 PECL Clock Buffer/ Crystal Oscillator 62 ohm Clock Synthesis and Control Circuitry VDD 62 ohm PECL 270 ohm GND Output Enable (both outputs) Output resistors shown are for unterminated lines. Refer to MAN09 for additional information. IDT™ / ICS™ PECL CLOCK SYNTHESIZER 1 ICS507-01 REV I 041905 ICS507-01 PECL CLOCK SYNTHESIZER PECL MULTIPLIER Pin Assignment Clock Multiplier Select Table X1/ICLK 1 16 X2 VDD 2 15 NC VDD 3 14 S0 S1 4 13 GND 5 GND S1 S0 Multiplier 0 0 9.72X* 0 M 10X OE 0 1 12X 12 NC M 0 6.25X 6 11 NC M M 8X NC 7 10 RES M 1 5X PECL 8 9 PECL 1 0 2X 1 M 3X 16 Pin (150 mil) SOIC 1 1 4X 0 = connect pin directly to ground 1 = connect pin directly to VDD M = leave unconnected (floating) * At 3.3V, use this selection to get 155.52 MHz from a 16 MHz input. For lowest phase noise generation of 155.52 MHz, use a 19.44 MHz crystal and the 8X selection. Pin Descriptions Number Name Type Description 1 XI/ICLK Input Crystal Connection. Connect to a fundamental parallel mode crystal, or clock. 2 VDD Power Connect to +3.3 V or 5 V, and to VDD on pin 3. 3 VDD Power Connect to VDD on pin 2. Decouple with pin 5. 4 S1 Input Multiplier select pin 1. Determines output frequency per table above. 5 GND Power Connect to ground. 6 GND Power Connect to ground. 7 NC — 8 PECL Output PECL output. Connect to resistor load as shown on page 1. 9 PECL Output Complimentary PECL output. Connect to resistor load as shown on page 1. 10 RES Input 11 NC — No connect. Do not connect this pin to anything. 12 NC — No connect. Do not connect this pin to anything. 13 OE Input Output Enable. Tri-states both outputs when low. Internal pull-up. 14 S0 Input Multiplier select pin 0. Determines output frequency per table above. 15 NC — 16 X2 Output IDT™ / ICS™ PECL CLOCK SYNTHESIZER No connect. Do not connect this pin to anything. Bias resistor input. Connect a resistor between this pin and VDD. No connect. Do not connect this pin to anything. Crystal Connection. Connect to crystal, or leave unconnected for clock input. 2 ICS507-01 REV I 041905 ICS507-01 PECL CLOCK SYNTHESIZER PECL MULTIPLIER External Component Selection High Frequency Differential PECl Oscillators The ICS507-01 plus a low frequency, fundamental mode crystal can build a high frequency differential output oscillator. For example, a 10 MHz crystal connected to the ICS507-01 with the 12X output selected (S1=0, S0=1) produces a 120 MHz PECL output clock. The ICS507-01 requires a minimum number of external components for proper operation. Decoupling Capacitors Decoupling capacitors of 0.01µF should be connected between VDD and GND on pins 2 and 5, as close to the ICS507-01 as possible. Other VDD and GND connections should be connected to those pins, or to the VDD and GND planes on the board. A resistor must be connected between the RES (pin 10) and VDD. Hi Frequency TCXO Extending the previous application, an inexpensive, low frequency TCXO can be built and the output frequency can be multiplied using the ICS507-01. Since the output of the chip is phase-locked to the input, the ICS507-01 has no temperature dependence, and the temperature coefficient of the combined system is the same as that of the low frequency TCXO. Another four resistors are needed for the PECL outputs as shown on the block diagram on page 1. Suggested values of these resistors are shown in the Block Diagram, but they can be varied to change the differential pair output swing, and the DC level; refer to MAN09. Hi Frequency VCXO The bandwidth of the PLL is guaranteed to be greater than 10 kHz. This means that the PLL will track any modulation on the input with a frequency of less than 10 kHz. By using this property, a low frequency VCXO can be built, and the output can then be multiplied with the ICS507-01 to give a high frequency output, thereby producing a high frequency VCXO. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS507-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial) 0 to +70° C Ambient Operating Temperature (industrial) -40 to +85° C Storage Temperature -65 to +150° C Soldering Temperature 260° C IDT™ / ICS™ PECL CLOCK SYNTHESIZER 3 ICS507-01 REV I 041905 ICS507-01 PECL CLOCK SYNTHESIZER PECL MULTIPLIER Recommended Operation Conditions Parameter Min. Typ. Max. Units 0 – +70 °C -40 – +85 °C +3.45 V Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Power Supply Voltage (measured in respect to GND) +3.15 DC Electrical Characteristics VDD=5 V, unless stated otherwise Parameter Symbol Conditions Min. Typ. 3.0 Max. Units 5.5 V Operating Voltage VDD Input High Voltage VIH ICLK only Input Low Voltage VIL ICLK only Input High Voltage VIH S0, S1 Input Low Voltage VIL S0, S1 Output High Voltage VOH Note 2 Output Low Voltage VOL Note 2 Operating Supply Current IDD No load, 155.52 MHz, Note 3 63 mA Internal Crystal Capacitance, X1 and X2 Pins 1, 8 26 pF Input Capacitance S0, S1 5 pF VDD/2+1 VDD/2 VDD/2 V VDD/2-1 VDD-0.5 V V 0.5 VDD-1.2 V V VDD-2.0 V Notes: 1. All typical values are at 5.0 V and 25°C unless otherwise noted. 2. VOH and VOL can be set by the external resistor values on the PECL outputs. 3. IDD includes the current through the external resistors, which can be modified. 4. The phase relationship between input and output can change at power up. For a fixed phase relationship, see one of the ICS zero delay buffers. 5. Except S1=0, S0=0 setting (This setting specific to 16 MHz in, 155.52 MHz out). IDT™ / ICS™ PECL CLOCK SYNTHESIZER 4 ICS507-01 REV I 041905 ICS507-01 PECL CLOCK SYNTHESIZER PECL MULTIPLIER AC Electrical Characteristics VDD = 3.3 V, 5 V unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Crystal Frequency 5 27 MHz Input Clock Frequency 5 52 MHz VDD = 5 V 10 200 MHz VDD = 3.3 V 10 156 MHz VDD = 3.3 V or 5 V 10 125 MHz 48 52 % Output Frequency, ICS507-01 fout Output Frequency, ICS507-01I fout Output Clock Duty Cycle tD PLL Bandwidth Absolute Clock Period Jitter 10 Deviation from Mean One Sigma Clock Period Jitter IDT™ / ICS™ PECL CLOCK SYNTHESIZER 5 kHz ±75 ps 20 ps ICS507-01 REV I 041905 ICS507-01 PECL CLOCK SYNTHESIZER PECL MULTIPLIER Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Inches 16 Symbol E A A1 B C D E e H h L α H INDEX AREA 1 2 D A Min Max 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Min Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part/Order Number Marking Packaging Package Temperature Min. Qty. 507M-01 507M-01T 507M-01I 507M-01IT 507M-01LF 507M-01LFT 507M-01ILF 507M-01ILFT 507M-01DSW ICS507M-01 ICS507M-01 ICS507M-01I ICS507M-01I ICS507M-01LF ICS507M-01LF ICS507M01ILF ICS507M01ILF — 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C 0 to +70° C — 2500 pieces — 2500 pieces — 2500 pieces — 2500 pieces 1 wafer 507M-01DPK 507M-01DWF — — Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Probed wafers, cut, on sticky tape Tested die in waffle pack Die on uncut, probed wafers 0 to +70° C 0 to +70° C 1000 pieces 1 wafer While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. IDT™ / ICS™ PECL CLOCK SYNTHESIZER 6 ICS507-01 REV I 041905 ICS507-01 PECL CLOCK SYNTHESIZER PECL MULTIPLIER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Asia Pacific and Japan Europe Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) Integrated Device Technology Singapore (1997) Pte. Ltd. Reg. No. 199707558G 435 Orchard Road #20-03 Wisma Atria Singapore 238877 +65 6 887 5505 IDT Europe, Limited Prime House Barnett Wood Lane Leatherhead, Surrey United Kingdom KT22 7DE +44 1372 363 339 © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.
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