ICS525R-02IT

ICS525-01/02 OSCaRTM User Configurable Clock Description Features The ICS525-01/02 are the most flexible way to generate a high-quality, high-accuracy, high-frequency clock output from an inexpensive crystal or clock input. The name OSCaR stands for OSCillator Replacement, as they are designed to replace crystal oscillators in almost any electronic system. The user can configure the device to produce nearly any output frequency from any input frequency by grounding or floating the select pins. Neither microcontroller, software, nor device programmer are needed to set the frequency. Using Phase-Locked Loop (PLL) techniques, the device accepts a standard fundamental mode, inexpensive crystal to produce output clocks up to 250 MHz. It can also produce a highly accurate output clock from a given input clock, keeping them frequency locked together. • Packaged as 28-pin SSOP (150 mil body) • Industrial and commercial versions available in Pb For similar capability with a serial interface, use the ICS307. For simple multipliers to produce common frequencies, refer to the LOCOTM family of parts, which are smaller and more cost effective. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed. For applications which require defined input to output timing, use the ICS527-01. (lead) free package • ICS525-01 with output frequencies up to 160 MHz • ICS525-02 with output frequencies up to 250 MHz • User determines the output frequency by setting all internal dividers • Eliminates need for custom oscillators • No software needed • Online ICS525 calculator at • • • • • • • • • www.icst.com/products/ics525inputForm.html Pull-ups on all select inputs Input crystal frequency of 5 - 27 MHz Input clock frequency of 2 - 50 MHz Very low jitter Duty cycle of 45/55 up to 200 MHz Operating voltage of 3.0 V or 5.5 V Ideal for oscillator replacement Industrial temperature version available For Zero Delay, refer to the ICS527 NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Block Diagram VDD 2 PD X1/ICLK Crystal or clock input Crystal Oscillator X2 VCO Output Divider VCO Divider Optional crystal capacitors 7 R6:R0 MDS 525-01/02 R CLK Phase Comparator, Charge Pump, and Loop Filter Reference Divider 9 V8:V0 REF 2 GND 1 Integrated Device Technology, Inc. 3 S2:S0 Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock Pin Assignment R5 1 28 R4 R5 1 28 R4 R6 2 27 R3 R6 2 27 R3 S0 3 26 R2 S0 3 26 R2 S1 4 25 R1 S1 4 25 R1 S2 5 24 R0 S2 5 24 R0 VDD 6 23 VDD VDD 6 23 VDD X1/ICLK 7 22 REF X1/ICLK 7 22 REF X2 8 21 CLK X2 8 21 CLK GND 9 20 GND GND 9 20 GND V0 10 19 PD V0 10 19 PDTS V1 11 18 V8 V1 11 18 V8 V2 12 17 V7 V2 12 17 V7 V3 13 16 V6 V3 13 16 V6 V4 14 15 V5 V4 14 15 V5 ICS525-01 ICS525-02 ICS525-01 Pin Descriptions Pin Number Pin Name Pin Type 1, 2, 24-28 R5, R6, R0-R4 I(PU) Reference divider word input pins determined by user. Forms a binary number from 0 to 127. 3, 4, 5 S0, S1, S2 I(PU) Select pins for output divider determined by user. See table on page 3 6, 23 VDD Power Connect to VDD. 7 X1/ICLK X1 Crystal connection. Connect to a parallel resonant fundamental crystal or input clock. 8 X2 X2 Crystal connection. Connect to a crystal or leave unconnected for clock. 9, 20 GND Power Connect to ground. 10 - 18 V0 - V8 I(PU) VCO divider word input pins determined by user. Forms a binary number from 0 to 511. 19 PD Input Power-down. Active low. Turns off entire chip when low. Clock outputs stop low. 21 CLK Output Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency. 22 REF Output Reference output. Buffered crystal oscillator (or clock ) output. Pin Description ICS525-02 Pin Descriptions Pin Number Pin Name Pin Type 1, 2, 24-28 R5, R6, R0-R4 I(PU) Reference divider word input pins determined by user. Forms a binary number from 0 to 127. 3, 4, 5 S0, S1, S2 I(PU) Select pins for output divider determined by user. See table on page 3 6, 23 VDD Power Connect to VDD. 7 X1/ICLK X1 MDS 525-01/02 R Pin Description Crystal connection. Connect to a parallel resonant fundamental crystal or input clock. 2 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock Pin Number Pin Name Pin Type 8 X2 X2 9, 20 GND Power Connect to ground. 10 - 18 V0 - V8 I(PU) VCO divider word input pins determined by user. Forms a binary number from 0 to 511. 19 PD I(PU) Power-down. Active low. Turns off entire chip when low. Clock outputs stop low. 21 CLK Output Output clock determined by status of R0-R6, V-V8, S0-S2, and input frequency. 22 REF Output Reference output. Buffered crystal oscillator (or clock ) output. Pin Description Crystal connection. Connect to a crystal or leave unconnected for clock. KEY: I(PU) = Input with internal pull-up resistor; X1, X2 = crystal connections ICS525-01 Maximum Output Frequency and Output Divider Table Max Output Frequency (MHz) S2 S1 S0 CLK Output Pin 5 Pin 4 Pin 3 Divider VDD = 5 V VDD = 3.3 V 0 - 70 ° C -40 to +85 ° C 0 - 70 ° C -40 to +85 °C 0 0 0 10 26 23 18 16 0 0 1 2 160 140 100 90 0 1 0 8 40 36 25 22 0 1 1 4 80 72 50 45 1 0 0 5 50 45 34 30 1 0 1 7 40 36 26 23 1 1 0 9 33.3 30 20 18 1 1 1 6 53 47 27 24 ICS525-02 Maximum Output Frequency and Output Divider Table Max Output Frequency (MHz) S2 S1 S0 CLK Output Pin 5 Pin 4 Pin 3 Divider VDD = 5 V VDD = 3.3 V -40 to +85 ° C -40 to +85 ° C 0 0 0 6 67 40 0 0 1 2 200 120 0 1 0 8 50 30 0 1 1 4 100 60 1 0 0 5 80 48 1 0 1 7 57 34 1 1 0 1 250 200 1 1 1 3 133 80 The ICS525-02 is only offered in industrial temperature range. MDS 525-01/02 R 3 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock External Components/Crystal Selection ICS525-01 Settings The output of the ICS525-01 can be determined by the following simple equation: Decoupling Capacitors The ICS525-01/02 requries two 0.01µF decoupling capacitors to be connected between VDD and GND, one on each side of the chip. The capacitor must be connected close to the device to minimize lead inductance. No external power supply filtering is required for this device. External Resistors A 33Ω series terminating resistor can be used next to the CLK and REF pins. Crystal Load Capacitors The approximate total on-chip capacitance for a crystal is 16 pF, so a parallel resonant, fundamental mode crystal with this value of load (correlation) capacitance should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors may be connected from each of the pins X1 and X2 to Ground as shown in the block diagram. The value (in pF) of these crystal caps should be (CL -16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). Determining the Output Frequency Users have full control in setting the desired output frequency over the range shown in the table on page 2. To replace a standard oscillator, users should connect the divider select input pins directly to ground (or VDD, although this is not required because of internal pull-ups) during Printed Circuit Board layout. The ICS525-01/02 will automatically produce the correct clock when all components are soldered. It is also possible to connect the inputs to parallel I/O ports to switch frequencies. By choosing divides carefully, the number of inputs which need to be changed can be minimized. Observe the restrictions on allowed values of VDW and RDW. ( VDW + 8 ) ( RDW + 2 ) • OD CLK Frequency = Input Frequency × 2x --------------------------------------------- Where: Reference Divider Word (RDW) = 1 to 127 (0 not permitted) VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 not permitted) Output Divider (OD) = values on page 3 Also, the following operating ranges should be observed: VDW + 8 ) - < 200M ( 3.3 V )or 320 M ( 5 v ) 30M < Input Frequency x2x (-----------------------------( RDW + 2 ) InputFrequency 200kHz < ----------------------------------------------( RDW + 2 ) See table on page 3 for full details of maximum output. ICS525-02 Settings The output of the ICS525-02 can be determined by the following simple equation: ( VDW + 8 ) ( RDW + 2 ) • OD CLK Frequency = Input Frequency × 2x --------------------------------------------- Where: Reference Divider Word (RDW) = 0 to 127 VCO Divider Word (VDW) = 0 to 511 Output Divider (OD) = values on page 3 Also, the following operating ranges should be observed: ( VDW + 8 )- < 240 M ( 3.3 V )or 400 M ( 5 v ) 30M < Input Frequency x2x -----------------------------( RDW + 2 ) InputFrequency 200kHz < ----------------------------------------------( RDW + 2 ) See table on page 3 for full details of maximum output. MDS 525-01/02 R 4 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock The dividers are expressed as integers. For example, if a 66.66 MHz output on CLK1 is desired from a 14.31818 MHz input, the VCO divider word (VDW) should be 276, with an output divide (OD) of 2. In this example, R6:R0 is 0111011, V8:V0 is 100010100 and S2:S0 is 001. Since all of these inputs have pull-up resistors, it is only necessary to ground the zero pins, namely V7, V6, V5, V3, V1, V0, R6, R2, S2, and S1. To determine the best combination of VCO, reference, and output divide, use the ICS525 Calculator on our web site: www.icst.com/products/ics525inputForm.html. The online form is easy to use and quickly shows you up to three options for these settings. Alternately, you may send an e-mail to ics-mk@icst.com. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS525-01/02. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature, Commercial 0 to +70° C Ambient Operating Temperature, Industrial -40 to +85° C Storage Temperature -65° C to 150° C Junction Temperature 125° C Soldering Temperature 260° C (max. of 10 seconds) MDS 525-01/02 R 5 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V Parameter Symbol Conditions Min. Typ. 3.0 Max. Units 5.5 V Operating Voltage VDD Operating Supply Current, 15 MHz crystal IDD 60 MHz out, no load 8 mA Operating Supply Current, Power-down IDD Pin 19 = 0 7 mA Input High Voltage VIH Input Low Voltage VIL Input High Voltage, X1/ICLK only VIH ICLK (pin7) Input Low Voltage, X1/ICLK only VIL ICLK (pin7) Output High Voltage VOH IOH = -12 mA Output Low Voltage VOL IOL = 12 mA 2 V 0.8 Short Circuit Current VDD/2+1 VDD/2 VDD/2 V V VDD/2-1 V V VDD-0.4 0.4 V CLK and REF outputs ±55 mA Input Capacitance CIN V, R, S pins and pin 19 4 pF On-chip Pull-up Resistor RPU V, R, S pins and pin 19 270 kΩ AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V Parameter Input Frequency Symbol Conditions FIN Min. Typ. Max. Units Crystal input 5 27 MHz Clock input 2 50 MHz 0 to +70° C 1.2 160 MHz -40 to +85° C 1.4 140 MHz 0 to +70° C 1.2 100 MHz -40 to +85° C 1.4 90 MHz Output Frequency, VDD=4.5 to 5 V (ICS525-01, Note 1) FOUT Output Frequency, VDD=3.0 to 3.6 V (ICS525-01, Note 1) FOUT Output Frequency, VDD=4.5 to 5 V (ICS525-02, Note 1) FOUT -40 to +85° C 1.5 250 MHz Output Frequency, VDD=3.0 to 3.6 V (ICS525-02, Note 1) FOUT -40 to +85° C 1 200 MHz Output Clock Rise Time 0.8 to 2.0 V 1 ns Output Clock Fall Time 2.0 to 0.8 V 1 ns MDS 525-01/02 R 6 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock Parameter Symbol Conditions Min. Typ. Max. Units 49 to 51 55 % % Output Clock Duty Cycle, OD = 2, 4, 6, 8, or 10 at VDD/2 45 Output Clock Duty Cycle, OD = 3, 5, 7, or 9 at VDD/2 40 60 Output Clock Duty Cycle, OD = 1 (-02 only) at VDD/2 35 65 Power-down Time, PD low to clocks stopped 50 ns Power-up Time, PD high to clocks stable 10 ms Absolute Clock Period Jitter, ICS525-01, Note 2 tja Deviation from mean One Sigma Clock Period Jitter, ICS525-01, Note 2 tjs Absolute Clock Period Jitter, ICS525-02, Note 2 One Sigma Clock Period Jitter, ICS525-02, Note 2 ±140 ps One Sigma 45 ps tja Deviation from mean ±85 ps tjs One Sigma 30 ps NOTE 1: Phase relationship between input and output can change at power-up. For a fixed phase relationship, see the ICS527. NOTE 2: For 16 MHz, 100 MHz output. Use the -02 for lowest jitter. MDS 525-01/02 R 7 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock Package Outline and Package Dimensions (28-pin SSOP, 150 mil Body) Package dimensions are kept current with JEDEC Publication No. 95, MO-153 Millimeters Inches* 28 Symbol E1 A A1 A2 b C D E E1 e L α aaa E INDEX AREA 1 2 D Min Max 1.35 1.75 0.10 0.25 -1.50 0.20 0.30 0.18 0.25 9.80 10.00 5.80 6.20 3.80 4.00 0.635 Basic 0.40 1.27 0° 8° -0.10 Min Max .053 .069 .0040 .010 -.059 .008 .012 .007 .010 .386 .394 .228 .244 .150 .157 0.025 Basic .016 .050 0° 8° -0.004 *For reference only. Controlling dimensions in mm. A 2 A A 1 c -Ce SEATING PLANE b L aaa C MDS 525-01/02 R 8 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com ICS525-01/02 OSCaRTM User Configurable Clock Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 525-01R* ICS525-01R Tubes 28-pin SSOP 0 to +70° C 525-01RT* ICS525-01R Tape and Reel 28-pin SSOP 0 to +70° C 525-01RLF ICS525-01RLF Tubes 28-pin SSOP 0 to +70° C 525-01RLFT ICS525-01RLF Tape and Reel 28-pin SSOP 0 to +70° C 525-01RI* ICS525-01RI Tubes 28-pin SSOP -40 to +85° C 525-01RIT* ICS525-01RI Tape and Reel 28-pin SSOP -40 to +85° C 525-01RILF ICS525-01RILF Tubes 28-pin SSOP -40 to +85° C 525-01RILFT ICS525-01RILF Tape and Reel 28-pin SSOP -40 to +85° C 525R-02* ICS525R-02 Tubes 28-pin SSOP 0 to +70° C 525R-02T* ICS525R-02 Tape and Reel 28-pin SSOP 0 to +70° C 525R-02LF ICS525R-02LF Tubes 28-pin SSOP 0 to +70° C 525R-02LFT ICS525R-02LF Tape and Reel 28-pin SSOP 0 to +70° C 525R-02I* ICS525R-02I Tubes 28-pin SSOP -40 to +85° C 525R-02IT* ICS525R-02I Tape and Reel 28-pin SSOP -40 to +85° C 525R-02ILF ICS525R-02IL Tubes 28-pin SSOP -40 to +85° C 525R-02ILFT ICS525R-02IL Tape and Reel 28-pin SSOP -40 to +85° C *NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments MDS 525-01/02 R 9 Integrated Device Technology, Inc. Revision 021710 ● www.idt.com