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ICS650R-12

ICS650R-12

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SSOP-20

  • 描述:

    IC MPEG CLK SYNTHESIZER 20-SSOP

  • 数据手册
  • 价格&库存
ICS650R-12 数据手册
DATASHEET ICS650-12 MPEG CLOCK SYNTHESIZER Description Features The ICS650-12 is a low cost, low-jitter, high-performance clock synthesizer designed to produce fixed clock outputs of 13.5 MHz and 27.0 MHz, and four selectable clock outputs: two Processor Clocks (PCLK1) and PCLK2), an Audio Clock, and a Communications Clock (CCLK). Using analog Phase-Locked Loop (PLL) techniques, the device uses a 27.0 MHz clock or fundamental crystal to produce clocks ideal for Digital Video/MPEG-based applications. • Packaged in 20-pin tiny SSOP (QSOP) • Available in RoHS 5 (green) or RoHS 6 (green and lead free) compliant package • Input frequency of 27.0 MHz • Zero ppm synthesis error in output clocks • Provides fixed 13.5 MHz and 27.0 MHz. Also provides • • • two selectable processor clocks, one audio clock, and one communications clock. Ideal for digital video MPEG-based applications 3.3 V or 5.0 V operating voltage Entire chip powers down (when CS1=CS0=0) NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Block Diagram PCLK1 PS2:0 AS2:0 PCLK2 Clock Synthesis and Control Circuitry CS1:0 ACLK CCLK 13.5 MHz 27.0 MHz crystal or clock IDT™ / ICS™ MPEG CLOCK SYNTHESIZER /2 Input Buffer/ Crystal Oscillator 27.0 MHz 1 ICS650-12 REV D 102709 ICS650-12 MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER Pin Assignment ACLK Select Table (in MHz) PS2 1 20 PS1 X2 2 19 PS0 X1 3 18 CCLK VDD 4 17 PCLK2 CS1 5 16 VDD GND 6 15 AS1 ACLK 7 14 GND PCLK1 8 13 CS0 9 AS2 10 AS2 PS0 ACLK 0 0 12.288 0 0 1 11.2896 0 1 0 8.192 0 1 1 24.576 1 0 0 8.192 13.5M 1 0 1 16.9344 12 27M 1 1 0 18.432 11 AS0 1 1 1 11.2896 CCLK Select Table (in MHz) PCLK1 and PCLK2 Select Table (in MHz) PS1 AS0 0 20-pin SSOP (QSOP) PS2 AS1 PCLK1 PCLK2 CS1 CS0 CCLK 0 0 All off* 0 1 20.00 0 0 0 108.00 54.00 1 0 66.6666 0 0 1 55.00 27.5 1 1 24.576 0 1 0 66.67 33.33 0 1 1 80.00 40.00 1 0 0 54.00 27.00 1 0 1 81.00 40.5 1 1 0 50.00 25.00 1 1 1 60.00 30.00 IDT™ / ICS™ MPEG CLOCK SYNTHESIZER *Note: Entire chip powers-down (outputs stop low) when CS1=CS0=0. 2 ICS650-12 REV D 102709 ICS650-12 MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER Pin Descriptions Pin Pin Pin Number Name Type Pin Description 1 PS2 Input Processor Clock Select pin 2. See table on page 2. 2 X2 XO Crystal connection. Connect to a 27.0 MHz crystal or leave unconnected for a clock input. 3 X1 XI Crystal connection. Connect to a 27.0 MHz fundamental mode crystal or clock input. 4, 16 VDD Power Connect to +3.3 V or +5 V. 5 CS1 Input Communications Clock Select Pin 1. See table on page 2. 6, 14 GND Power Connect to ground. 7 ACLK Output Audio Clock Output. See table on page 2. 8 PCLK1 Output Processor Clock Output 1. See table on page 2. 9 CS0 Input Communications Clock Select 0. See table on page 2. 10 AS2 Input Audio Clock Select Pin 2. See table on page 2. Audio Clock Select Pin 0. See table on page 2. 11 AS0 Input 12 27M Output 13 13.5M Output 15 AS1 Input Audio Clock Select Pin 1. See table on page 2. 17 PCLK2 Output Processor Clock Output 2. See table on page 2. 18 CCLK Output 19 PS0 Input Processor Clock Select Pin 0. See table on page 2. 20 PS1 Input Processor Clock Select Pin 1. See table on page 2. 27 MHz buffered clock output. 13.5 MHz clock output. Communications Clock Output. See table on page 2. Key: Input = input with internal pull-up; XI and XO = crystal connections; Power = power supply connection; Output = output IDT™ / ICS™ MPEG CLOCK SYNTHESIZER 3 ICS650-12 REV D 102709 ICS650-12 MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS650-12. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Conditions Supply Voltage, VDD Referenced to GND All Inputs and Outputs Referenced to GND Rating 7V -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70° C Storage Temperature -65 to +150° C Soldering Temperature Max. of 10 seconds 260° C DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature 0 to +70° C Parameter Symbol Conditions Min. Operating Voltage VDD 3.0 Input High Voltage VIH 2 Input Low Voltage VIL Typ. Output High Voltage VOH VDD = 3.3 V, IOH = -8 mA VOL VDD = 3.3 V, IOL = 8 mA Output High Voltage VOH,VDD = 3.3 or 5 V IOH = -8 mA Units 5.5 V VDD/2 VDD/2 Output Low Voltage Max. V 0.8 V 0.8 V 2.4 V VDD-0.4 V Operating Supply Current IDD@5 V No Load 39 mA Operating Supply Current IDD@5 V No Load 22 mA ±50 mA 7 pF Short Circuit Current IOS, VDD = 3.3 V Each output Input Capacitance IDT™ / ICS™ MPEG CLOCK SYNTHESIZER Except X1 4 ICS650-12 REV D 102709 ICS650-12 MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature 0 to +70° C Parameter Symbol Conditions Min. Input Crystal or Clock Frequency Typ. Max. Units 27 Output Clocks Accuracy (synthesis error) All clocks 0 MHz 1 ppm Output Clock Rise Time tOR 0.8 to 2.0 V 1.5 ns Output Clock Fall Time tOF 2.0 to 0.8 V 1.5 ns 60 % Output Clock Duty Cycle At VDD/2 One Sigma Jitter, ACLK VDD = 3.3 V 100 ps VDD = 5.0 V 40 ps VDD = 3.3 V, except CCLK = 20 MHz ±300 ps VDD = 5.0 V, except CCLK = 20 MHz ±200 ps Absolute Clock Period Jitter 40 50 External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 µF should be connected between VDD and GND on pins 4 and 6, 16 and 14, and a 33Ω terminating resistor may be used on each clock output if the trace is longer than 1 inch. IDT™ / ICS™ MPEG CLOCK SYNTHESIZER 5 ICS650-12 REV D 102709 ICS650-12 MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER Package Outline and Package Dimensions (20-pin SSOP) Package dimensions are kept current with JEDEC Publication No. 95 20 Millimeters Symbol E1 A A1 b c D E E1 e L α E INDEX AREA 1 2 D Min Inches Max 1.35 1.75 0.10 0.25 0.20 0.30 0.18 0.25 8.55 8.75 5.80 6.20 3.80 4.00 0.635 Basic 0.40 1.27 0° 8° Min Max 0.053 0.069 0.004 0.010 0.008 0.012 0.007 0.010 0.337 0.344 0.228 0.244 0.150 0.157 0.025 Basic 0.016 0.050 0° 8° A A1 c - Ce b SEATING PLANE .10 (.004) L C Ordering Information Part / Order Number Marking Shipping Packaging Package 650R-12* 650R-12T* 650R-12LF 650R-12LFT ICS650R-12 ICS650R-12 650R-12LF 650R-12LF Tubes Tape and Reel Tubes Tape and Reel 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP Temperature 0 to +70° 0 to +70° 0 to +70° 0 to +70° C C C C *NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT™ / ICS™ MPEG CLOCK SYNTHESIZER 6 ICS650-12 REV D 102709 ICS650-12 MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 408-284-8200 Fax: 408-284-2775 www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA
ICS650R-12 价格&库存

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