DATASHEET
ISL28288, ISL28488
Dual and Quad Micropower Single Supply Rail-to-Rail Input and Output (RRIO)
Op Amp
FN6339
Rev 4.00
July 26, 2011
The ISL28288 and ISL28488 are dual and quad channel
micropower operational amplifiers optimized for single supply
operation over the 2.4V to 5.5V range. They can be operated
from one lithium cell or two Ni-Cd batteries. For equivalent
performance in a single channel op amp, reference EL8188.
Features
These devices feature an Input Range Enhancement Circuit
(IREC) which enables them to maintain CMRR performance for
input voltages 10% above the positive supply rail and to
100mV below the negative supply. The output operation is
rail-to-rail.
• 250kHz typical gain-bandwidth product
The ISL28288 and ISL28488 draw minimal supply current
while meeting excellent DC-accuracy, AC-performance, noise
and output drive specifications. The ISL28288 (10 Ld MSOP
only) contains a power-down enable pin that reduces the
power supply current to typically less than 4µA in the disabled
state.
• Input is capable of swinging above V+ and below V- (ground
sensing)
• Rail-to-rail input and output (RRIO)
Related Literature
Applications
AN1344: ISL2828xEVAL1Z Evaluation Board User’s Guide
• Battery- or solar-powered systems
• Low power 60µA typical supply current per amplifier
• 1.5mV max offset voltage
• 30pA max input bias current
• 105dB typical PSRR
• 100dB typical CMRR
• Single supply operation down to 2.4V
• Enable Pin - ISL28288 10 Ld MSOP package option only
• Pb-free (RoHS compliant)
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre-amps
• pH probe amplifiers
V+
VIN
0.082µF
C3
R3
12.4k
R4
2.21k
+ U1A
1/2
ISL28x88
V+
VOUT
R1
10k
U1B+
1/2
ISL28x88
-
CF1
4.7µF
C1
0.1µF
GAIN=425
R2
158
RF1
680k
VREF
BANDPASS AMPLIFIER (0.05Hz TO 159Hz)
FIGURE 1. TYPICAL APPLICATION CIRCUIT
FN6339 Rev 4.00
July 26, 2011
Page 1 of 20
ISL28288, ISL28488
Pin Configurations
ISL28488
(14 LD TSSOP)
TOP VIEW
ISL28288
(8 LD SOIC)
TOP VIEW
OUT_A 1
IN-_A 2
8 V+
- +
IN+_A 3
+ -
V- 4
14 OUT_D
OUT_A 1
7 OUT_B
IN-_A 2
6 IN-_B
IN+_A 3
- +
13 IN-_D
+ -
12 IN+_D
11 V-
V+ 4
5 IN+_B
IN+_B 5
- +
+ -
IN-_B 6
10 IN+_C
9 IN-_C
8 OUT_C
OUT_B 7
ISL28488
(16 LD QSOP)
TOP VIEW
ISL28288
(10 LD MSOP)
TOP VIEW
+
EN_B 4
+
-
IN+_B 5
9 OUT_A
IN-_A 2
8 V+
IN+_A 3
16 OUT_D
15 IN-_D
7 OUT_B
+
V- 3
OUT_A 1
14 IN+_D
V+ 4
6 IN-_B
13 V-
IN+_B 5
OUT_B 7
NC 8
+
-
IN-_B 6
12 IN+_C
+
-
EN_A 2
10 IN-_A
+
IN+_A 1
11 IN-_C
10 OUT_C
9 NC
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PACKAGE
(Pb-Free)
PART MARKING
PKG. DWG. #
ISL28288FUZ
8288Z
10 Ld MSOP
M10.118A
ISL28288FBZ
28288 FBZ
8 Ld SOIC
M8.15E
ISL28488FAZ (Note 4)
28488 FAZ
16 Ld QSOP
MDP0040
ISL28488FVZ
28488 FVZ
14 Ld TSSOP
M14.173
ISL28288EVAL1Z
Evaluation Board - 10 Ld MSOP
ISL28488EVAL1Z
Evaluation Board - 16 Ld QSOP
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28288, ISL28488. For more information on MSL please see techbrief
TB363
4. Not Recommended for New Designs.
FN6339 Rev 4.00
July 26, 2011
Page 2 of 20
ISL28288, ISL28488
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V- - 0.5V to V+ + 0.5V
ESD Tolerance
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200V
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
8 Ld SOIC Package (Note5) . . . . . . . . . . . .
125
N/A
10 Ld MSOP Package (Notes 5, 6) . . . . . . .
160
60
14 Ld TSSOP Package (Note 5) . . . . . . . . .
115
N/A
16 Ld QSOP Package (Note 5) . . . . . . . . . .
100
N/A
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-40°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+125°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (±1.2V) to 5.5V (±2.75V)
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
6. For JC, the “case temp” location is taken at the package top center.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 7)
TYP
MAX
(Note 7)
UNIT
DC SPECIFICATIONS
VOS
Input Offset Voltage
V OS
----------------Time
Long Term Input Offset Voltage Stability
V OS
------------T
-1.5
-2
ISL28288
Input Offset Voltage vs Temperature
±0.05
1.5
2
mV
1.2
µV/Mo
0.9
µV/°C
IOS
Input Offset Current
IB
Input Bias Current
CMIR
Common-Mode Voltage Range
Guaranteed by CMRR
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
80
75
100
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5.5V
85
80
105
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100k
103
102
109
dB
VO = 0.5V to 4.5V, RL = 1k
95
dB
RL = 100k
3
6
30
mV
130
175
225
mV
VOL
Output Voltage Swing, Low
VOUT - V-
-30
-80
±5
30
80
pA
-40°C to +85°C
-30
-80
±10
30
80
pA
-40°C to +85°C
5
V
RL = 1k
FN6339 Rev 4.00
July 26, 2011
Page 3 of 20
ISL28288, ISL28488
Electrical Specifications
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
VOH
DESCRIPTION
Output Voltage Swing, High
V+ - VOUT
CONDITIONS
MIN
(Note 7)
RL = 100k
Quiescent Supply Current, Enabled
MAX
(Note 7)
UNIT
4
10
30
mV
120
200
250
mV
ISL28288 Per channel, all channels
enabled.
60
78
87.5
µA
ISL28488 Per channel.
60
79
87.5
µA
4
7
9
µA
RL = 1k
IS,ON
TYP
IS,OFF
Quiescent Supply Current, Disabled
(ISL28288 MSOP)
All channels disabled.
IO+
Short Circuit Sourcing Capability
RL = 10
IO-
Short Circuit Sinking Capability
RL = 10
VSUPPLY
Supply Operating Range
V+ to V-
VENH
EN Pin High Level
(ISL28288 10 ld. MSOP)
VENL
EN Pin Low Level
(ISL28288 10 ld. MSOP)
IENH
EN Pin Input High Current
(ISL28288 10 ld. MSOP)
VEN = V+
IENL
EN Pin Input Low Current
(ISL28288 10 ld. MSOP)
VEN = V-
24
20
31
-26
2.4
mA
-24
-20
mA
5.5
V
2
V
0.8
V
0.8
1
1.5
µA
0
+0.1
µA
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
AV = 100, RF = 100kRG = 1k
RL = 10kto VCM
250
kHz
en
Input Noise Voltage Peak-to-Peak
f = 0.1Hz to 10Hz
3
µVP-P
Input Noise Voltage Density
fO = 1kHz
48
nV/Hz
in
Input Noise Current Density
fO = 1kHz
9
fA/Hz
CMRR @ 60Hz
Input Common Mode Rejection Ratio
VCM = 1VP-P, RL = 10kto VCM
-70
dB
PSRR+ @
120Hz
Power Supply Rejection Ratio (V+)
V+, V- = ±1.2V and ±2.5V,
VSOURCE = 1VP-P, RL = 10kto VCM
-80
dB
PSRR- @
120Hz
Power Supply Rejection Ratio (V-)
V+, V- = ±1.2V and ±2.5V
VSOURCE = 1VP-P, RL = 10kto VCM
-60
dB
±0.15
V/µs
TRANSIENT RESPONSE
SR
Slew Rate
tEN
Enable to Output Turn-on Delay Time, 10% VEN = 5V to 0V, AV = -1,
EN to 10% Vout
RG = RF = RL = 1kto VCM
(ISL28288 10 ld. MSOP)
2
µs
Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = -1,
EN to 10% Vout
RG = RF = RL = 1k to VCM
(ISL28288 10 ld. MSOP)
0.1
µs
NOTE:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
FN6339 Rev 4.00
July 26, 2011
Page 4 of 20
ISL28288, ISL28488
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
+1
45
V+, V- = ±2.5V
RL = 10k
30
GAIN (dB)
GAIN (dB)
35
V+, V- = ±1.2V
RL = 10k
-2
-3
40
V+, V- = ±1.2V
RL = 1k
V+, V-= ±2.5V
RL = 1k
-1
-4
10k
100k
FREQUENCY (Hz)
1M
AV = 100
15 RL = 10k
CL = 3pF
10 R = 100k
F
RG = 1k
5
0
100
5M
80
40
80
40
0
-40
0
100
1k
10k
100k
10k
100k
1M
1M
-120
10M
200
150
PHASE
60
100
50
40
0
20
-80
-40
GAIN
-50
0
-100
-20
10
100
10k
1k
100k
-150
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 4. AVOL vs FREQUENCY @ 100k LOAD
FIGURE 5. AVOL vs FREQUENCY @ 1k LOAD
100
10
90
0
PSRR+
80
-10
70
-20
60
-30
CMRR (dB)
PSRR (dB)
GAIN (dB)
100
PHASE (°)
GAIN (dB)
80
10
1k
FIGURE 3. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
120
1
V+, V- = ±1.0V
FREQUENCY (Hz)
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
-80
V+, V- = ±1.2V
20
-5 VOUT = 50mVP-P
AV = 1
-6 C = 3pF
L
RF = 0, RG = INF
-7
8
1k
V+, V- = ±2.5V
25
50
40
30
VS = ±2.5V
20 AV = 1
10 CL = 27.9pF
R = 10k
0 V L = 1V
CM
P-P
-10
10
100
-40
-50
-60
-70
-80
PSRR-
-90
1k
10k
FREQUENCY (Hz)
100k
FIGURE 6. PSRR vs FREQUENCY
FN6339 Rev 4.00
July 26, 2011
V+, V- = ±2.5VDC
VSOURCE = 1VP-P
RL = 10k
1M
-100
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 7. CMRR vs FREQUENCY
Page 5 of 20
PHASE (°)
0
ISL28288, ISL28488
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
70
60
140
RF = 100kΩ, RG = 100
ACL = 1000
RF = 100kΩ, RG = 1k
120
CROSSTALK (dB)
GAIN (dB)
50
ACL = 100
40
30
VS = ±2.5V
CL = 26.9pF
RL = 10k
VOUT = 10mVP-P
ACL = 10
20
RF = 100kΩ, RG = 10k
10
ACL = 1
0
110
100
RL_TRANSMIT = ∞
90
RL_RECEIVE = 10k
80
70
RL_TRANSMIT = 10k
60
RL_RECEIVE = 10k
50
40
RF = 0, RG = ∞
-10
10
VS = ±2.5V
CL = 29.6pF
VCM = 1VP-P
130
100
1k
10k
100k
1M
30
10M
10
100
FREQUENCY (Hz)
FIGURE 8. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
10000
INPUT NOISE VOLTAGE (nV/√Hz)
INPUT NOISE CURRENT (fA/√Hz)
100
10
1
0.1
1
10
100
1k
FREQUENCY (Hz)
10k
1M
VS = ±2.5V
1000
100
10
0.1
100k
FIGURE 10. CURRENT NOISE vs FREQUENCY
1
10
100
1k
FREQUENCY (Hz)
10k
100k
FIGURE 11. VOLTAGE NOISE vs FREQUENCY
5
2.56
VS = ±2.5V
4
AV = 10k
3
2.54
SMALL SIGNAL (V)
INPUT NOISE VOLTAGE (µV)
100k
FIGURE 9. CROSSTALK vs FREQUENCY
1000
VS = ±2.5V
1k
10k
FREQUENCY (Hz)
2
1
0
-1
-2
-3
2.52
V+ = 5V
AV = 1
RL = 1k
VOUT = 0.1VP-P
2.50
2.48
2.46
-4
-5
0
1
2
3
4
5
6
7
8
9
10
TIME (s)
FIGURE 12. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
FN6339 Rev 4.00
July 26, 2011
2.44
0
20
40
60
80
100 120 140 160 180 200
TIME (µs)
FIGURE 13. SMALL SIGNAL TRANSIENT RESPONSE
Page 6 of 20
ISL28288, ISL28488
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
5.0
4.5
3.5
1V/DIV
4.0
LARGE SIGNAL (V)
AV = -1
VIN = 200mVP-P
V+ = 5V
V- = 0V
EN
INPUT
V+ = 5V
AV = -2
RL = 1k
VOUT = 4VP-P
3.0
2.5
2.0
0
1.5
0.5
0
0
20
40
60
0
80 100 120 140 160 180 200
TIME (µs)
10µs/DIV
FIGURE 15. ENABLE TO OUTPUT DELAY TIME
1000
100
800
80
600
60
400
40
200
20
IBIAS (pA)
VOS (µV)
FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
0
-200
-400
-600
-800
-1000
-1
V+ = 5V
RL = OPEN
RF = 100k, RG = 100
AV = +1000
0
1
-60
-80
2
3
VCM (V)
4
5
-100
-1
6
4.8
N = 1000
0
1
2
3
VCM (V)
CURRENT (µA)
270
MEDIAN
230
MIN
210
MAX
4.2
MEDIAN
4.0
3.8
MIN
3.4
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 18. ISL28488 SUPPLY CURRENT FOR ALL CHANNELS vs
TEMPERATURE V+, V- = ±2.5V ENABLED, RL = INF
FN6339 Rev 4.00
July 26, 2011
6
3.6
190
-20
5
n = 12
4.4
290
250
4
4.6
MAX
310
170
-40
V+ = 5V
RL = OPEN
RF= 100k, RG = 100
AV = +1000
FIGURE 17. INPUT BIAS CURRENT vs COMMON-MODE INPUT
VOLTAGE
350
330
0
-20
-40
FIGURE 16. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT
VOLTAGE
CURRENT (µA)
VOUT
0.1V/DIV
1.0
3.2
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 19. ISL28288 SUPPLY CURRENT vs TEMPERATURE
V+, V- = ±2.5V DISABLED, RL = INF
Page 7 of 20
ISL28288, ISL28488
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
2.0
2.0
N = 1000
MAX
1.5
VOS (mV)
VOS (mV)
MAX
1.0
1.0
0.5
MEDIAN
0
-0.5
-1.0
0.5
MEDIAN
0
-0.5
-1.0
MIN
-1.5
MIN
-1.5
-2.0
-2.0
-2.5
N = 1000
1.5
-40
-20
0
20
40
60
80
100
-2.5
-40
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 20. VOS vs TEMPERATURE, VIN = 0V, V+, V- = ±2.5V
FIGURE 21. VOS vs TEMPERATURE VIN = 0V, V+, V- = ±1.2V
200
500
n = 1000
n = 1000
0
0
IBIAS- (pA)
IBIAS+ (pA)
-200
-500
MAX
-1000
-1500
MEDIAN
-20
0
20
40
60
80
100
-800
MEDIAN
-1200
MIN
-40
MAX
-600
-1000
-2000
-2500
-400
-1400
120
MIN
-40
-20
0
TEMPERATURE (°C)
FIGURE 22. IBIAS+ vs TEMPERATURE V+, V- = ±2.5V
500
200
n = 1000
60
80
100
120
n = 1000
0
-200
-500
IBIAS- (pA)
IBIAS+ (pA)
40
FIGURE 23. IBIAS- vs TEMPERATURE V+, V- = ±2.5V
0
MAX
-1000
-1500
MEDIAN
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 24. IBIAS+ vs TEMPERATURE V+, V- = ±1.2V
FN6339 Rev 4.00
July 26, 2011
-600
MEDIAN
MIN
-1000
MIN
-40
MAX
-400
-800
-2000
-2500
20
TEMPERATURE (°C)
120
-1200
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 25. IBIAS- vs TEMPERATURE V+, V- = ±-1.2V
Page 8 of 20
ISL28288, ISL28488
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
200
650
n = 1000
600
0
550
IOS (pA)
-400
AVOL (V/mV)
-200
MAX
-600
-800
MEDIAN
-1000
500
450
400
MEDIAN
350
300
250
-1200
-1400
-40
MAX
n = 1000
200
MIN
-20
0
20
40
60
80
100
150
-40
120
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 26. IOS vs TEMPERATURE V+, V- = ±2.5V
FIGURE 27. AVOL vs TEMPERATURE V+, V- = ±2.5V, RL = 100k
90
135
n = 1000
80
MAX
n = 1000
125
70
CMRR (dB)
AVOL (V/mV)
MAX
MEDIAN
60
50
30
-40
-20
0
20
105
MEDIAN
95
MIN
MIN
40
115
85
40
60
80
100
75
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 28. AVOL vs TEMPERATURE, V+, V- = ±2.5V, RL = 1k
120
4.91
n = 1000
MAX
130
4.90
n = 1000
4.89
120
110
VOUT (V)
PSRR (dB)
100
FIGURE 29. CMRR vs TEMPERATURE VCM = +2.5V TO -2.5V,
V+, V- = ±2.5V
140
MEDIAN
100
MAX
4.88
MEDIAN
4.87
4.86
MIN
90
80
-40
20
40
60
80
TEMPERATURE (°C)
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 30. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V
FN6339 Rev 4.00
July 26, 2011
MIN
4.85
4.84
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 31. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V, RL= 1k
Page 9 of 20
ISL28288, ISL28488
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)
4.9982
170
n = 12
n = 1000
160
4.9980
MAX
VOUT (V)
4.9978
150
VOUT (mV)
4.9984
4.9976
4.9974
4.9972
MEDIAN
4.9970
130
MIN
120
MEDIAN
MIN
4.9968
110
4.9966
4.9964
-40
MAX
140
-20
0
20
40
60
80
100
100
120
-40
-20
0
TEMPERATURE (°C)
+OUTPUT SHORT CIRCUIT CURRENT
(mA)
n = 12
4.2
VOUT (mV)
4.1
4.0
MAX
3.9
3.8
3.7
MIN
3.6
MEDIAN
3.5
3.4
-40
-20
0
20
40
60
80
100
120
39
60
80
100
120
n = 1000
37
MAX
35
33
MEDIAN
31
29
27
25
-40
MIN
-20
0
TEMPERATURE (°C)
FIGURE 34. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V,
RL= 100k
-OUTPUT SHORT CIRCUIT CURRENT
(mA)
40
FIGURE 33. VOUT LOW vs TEMPERATURE, V+, V- = ±2.5V, RL= 1k
FIGURE 32. VOUT HIGH vs TEMPERATURE, V+, V- = ±2.5V,
RL= 100k
4.3
20
TEMPERATURE (°C)
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 35. +OUTPUT SHORT CIRCUIT CURRENT vs
TEMPERATURE VIN = +2.5V, RL = 10, V+, V- = ±2.5V
-21
n = 1000
-23
MAX
-25
-27
MIN
-29
MEDIAN
-31
-33
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 36. -OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE V IN = -2.5V, RL = 10, V+, V- = ±2.5V
FN6339 Rev 4.00
July 26, 2011
Page 10 of 20
ISL28288, ISL28488
Pin Descriptions
ISL28288
(8 LD SOIC)
ISL28288
(10 LD MSOP)
ISL28488
(14 LD TSSOP)
ISL28488
(16 LD QSOP)
PIN NAME
EQUIVALENT
CIRCUIT
3
1
3
3
IN+_A
Circuit 1
Amplifier A non-inverting input
-
2
-
-
EN_A
Circuit 2
Amplifier A enable pin internal pull-down; Logic “1”
selects the disabled state; Logic “0” selects the
enabled state.
4
3
11
13
V-
Circuit 4
Negative power supply
-
4
-
-
EN_B
Circuit 2
Amplifier B enable pin with internal pull-down; Logic
“1” selects the disabled state; Logic “0” selects the
enabled state.
5
5
5
5
IN+_B
Circuit 1
Amplifier B non-inverting input
6
6
6
6
IN-_B
Circuit 1
Amplifier B inverting input
7
7
7
7
OUT_B
Circuit 3
Amplifier B output
8
8
4
4
V+
Circuit 4
Positive power supply
1
9
1
1
OUT_A
Circuit 3
Amplifier A output
2
10
2
2
IN-_A
Circuit 1
Amplifier A inverting input
-
-
8
10
OUT_C
Circuit 3
Amplifier C output
-
-
9
11
IN-_C
Circuit 1
Amplifier C inverting input
-
-
10
12
IN+_C
Circuit 1
Amplifier C non-inverting input
-
-
12
14
IN+_D
Circuit 1
Amplifier D non-inverting input
-
-
13
15
IN-_D
Circuit 1
Amplifier D inverting input
-
-
14
16
OUT_D
Circuit 3
Amplifier D output
-
-
-
8, 9
NC
-
IN+
No internal connection
V+
V+
IN-
DESCRIPTION
V+
V+
CAPACITIVELY
OUT
EN
COUPLED
V-
CIRCUIT 1
V-
VCIRCUIT 2
Applications Information
Introduction
VCIRCUIT 3
CIRCUIT 4
in input offset voltage and an undesired change in magnitude
and polarity of input offset current.
The ISL28288 and ISL28488 are dual and quad CMOS rail-to-rail
input, output (RRIO) micropower operational amplifiers. These
devices are designed to operate from a single supply (2.4V to
5.5V) or dual supplies (±1.2V to ±2.75V) while drawing only 60µA
of supply current per amplifier. This combination of low power
and precision performance makes these devices suitable for
solar and battery power applications.
These amplifiers achieve rail-to-rail input operation without
sacrificing important precision specifications and degrading
distortion performance. The devices’ input offset voltage exhibits
a smooth behavior throughout the entire common-mode input
range. The input bias current vs the common-mode voltage range
gives us an undistorted behavior from typically 100mV below the
negative rail and 10% higher than the V+ rail (0.5V higher than V+
when V+ equals 5.5V).
Rail-to-Rail Input
Input Protection
Many rail-to-rail input stages use two differential input pairs, a
long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties
have to be paid for this circuit topology. As the input signal moves
from one supply rail to another, the operational amplifier
switches from one input pair to the other causing drastic changes
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. There is an additional
pair of back-to-back diodes across the input terminals. For
applications where the input differential voltage is expected to
FN6339 Rev 4.00
July 26, 2011
Page 11 of 20
ISL28288, ISL28488
exceed 0.5V, external series resistors must be used to ensure the
input currents never exceed 5mA (as shown in Figure 37).
Current Limiting
V+
VIN
RIN
VOUT
+
moisture and provide a humidity barrier, reducing parasitic
resistance on the board.
RL
V-
FIGURE 37. INPUT ESD DIODE CURRENT LIMITING - UNITY GAIN
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to achieve the
rail-to-rail output swing. The NMOS sinks current to swing the output
in the negative direction. The PMOS sources current to swing the
output in the positive direction. With a 100k load they will swing to
within 4mV of the positive supply rail and within 3mV of the negative
supply rail.
Enable/Disable Feature
The ISL28288 (only MSOP package option), offers an EN pin that
disables the device when pulled up to at least 2.0V. In the
disabled state (output in a high impedance state), the part
consumes typically 4µA. By disabling the part, multiple
ISL28288 parts can be connected together as a MUX. In this
configuration, the outputs are tied together in parallel and a
channel can be selected by the EN pin. The loading effects of the
feedback resistors of the disabled amplifier must be considered
when multiple amplifier outputs are connected together. The EN
pin also has an internal pull-down. If left open, the EN pin will pull
to the negative rail and the device will be enabled by default.
Using Only One Channel
If the application only requires one channel, the user must
configure the unused channel to prevent it from oscillating. The
unused channel will oscillate if the input and output pins are
floating. This will result in higher than expected supply currents
and possible noise injection into the channel being used. The
proper way to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 38).
ISL28288
+
FIGURE 38. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
The ISL28288 has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute Maximum
Rating for output current or power dissipation, potentially
resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related in Equation 1:
(EQ. 1)
T JMAX = T MAX + JA xPD MAXTOTAL
where:
• PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
• PDMAX for each amplifier is calculated in Equation 2:
V OUTMAX
PDMAX = 2*V S I SMAX + V S - V OUTMAX -----------------------R
L
(EQ. 2)
where:
• TMAX = Maximum ambient temperature
• JA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage (Magnitude of V+ and V-)
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the application
• RL = Load resistance
Application Circuits
THERMOCOUPLE AMPLIFIER
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and ability to
measure a wide range of temperatures. The ISL28x88 (see
Figure 39) is used to convert the differential thermocouple
voltage into single-ended signal with 10X gain. The amplifier’s
rail-to-rail input characteristic allows the thermocouple to be
biased at ground and the amplifier to run from a single 5V
supply.
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage, care should be taken in the
circuit board layout. The PC board surface must remain clean
and free of moisture to avoid leakage currents between adjacent
traces. Surface coating of the circuit board will reduce surface
FN6339 Rev 4.00
July 26, 2011
Page 12 of 20
ISL28288, ISL28488
K TYPE
THERMOCOUPLE
inverting input. Resistor divider pair, R3-R4 define the maximum
input DC level that is cancelled, and is given by Equation 4:
R4
R3
10k
10k
R2
100k
V+
+
ISL28x88
V-
410µV/°C
+
5V
R1
In the passband range, U1B’s gain is +1 and the total signal gain
is defined by the divider ratios according to Equation 5:
(EQ. 5)
At frequencies greater than the LPF corner, the R1-C1 and R3-C3
networks roll off U1A's gain to unity. Setting both R-C time
constants to the same value simplifies to Equation 6:
100k
FIGURE 39. THERMOCOUPLE AMPLIFIER
1
f-LPF -3dB = ----------------------------------------2 Pi R 1 C 1
ECG AMPLIFIER
ECG amplifiers must extract millivolt low frequency AC signals
from the skin of the patient while rejecting AC common mode
interference and static DC potentials created at the electrode-toskin interface. In Figure 40, the ISL28288 (U1) forms one of the
multiple high gain AC band-pass amplifiers using active
feedback. Amplifier U1B and RC RF1, CF1 form a high gain LP
filtered amplifier with the corner frequency given by Equation 3:
1
f-HPF -3dB = -------------------------------------------------2 Pi RF1 CF1
(EQ. 4)
V OUT R 1 + R 2 R 3 + R 4
V OUT U1 GAIN = ------------- = -------------------- --------------------
V IN
R2 R4
COLD JUNCTION
COMPENSATION
R4
V IN DC = V + --------------------
R 3 + R 4
(EQ. 3)
Inserting the low pass amplifier, U1B, in U1A’s feedback loop
results in an overall high-pass frequency response. Voltage
divider pairs R1-R2 and R3-R4 set the overall amplifier passband gain. The DC input offset is cancelled by U1B at U1A’s
(EQ. 6)
Right leg drive and reference amplifiers U2A and U2B form a DC
feedback loop that applies a correction voltage at the Right Leg
electrode to cancel out DC and low frequency body interference.
The voltage at the VCM sense electrode is maintained at the
reference voltage set by RF1-RF2.
With the values shown in Figure 40, the ECG circuit performance
parameters are:
1. Supply Voltage Range = +2.4V to +5.5V
2. Total Supply Current Draw @ +5V = 500µA (typ)
3. Common-Mode Reference Voltage (VCM) = V+/2
4. Max DC Input Offset Voltage = VCM ±0.18V to ±0.41V
5. Passband Gain = 425V/V
6. Lower -3dB Frequency = 0.05Hz
7. Upper -3dB Frequency = 159Hz
FN6339 Rev 4.00
July 26, 2011
Page 13 of 20
ISL28288, ISL28488
PATIENT
LEAD
CONNECTOR
VIN+
V+
V+
R
10k
0.082µF
+ U1A
1/2
ISL28288
-
DC
OFFSET
R4
2.21k
VCM REFERENCE
TO OTHER
CHANNELS
VCM
SENSE
CF1
4.7µF
C1
0.1µF
VOUT+
C
0.01µF
VOUTV+
U1B+
1/2
ISL28288
-
R3
12.4k
PATIENT
ELECTRODE
PADS
R1
10k
V+
C3
R
1k
VOUT(U1)
R2
158
+2.4 TO 5.5V
SUPPLY
RFA
10k
4.7µF
RF1
680k
RFB
10k
SUPPLY
COMMON
V+
R
10k
V+
VCM
V+
RL
DRIVE
0.47
µF
CA
R
10k
1nF
PROTECTION
CIRCUIT
R
500k
CB
V+
+
U2A 1/2
ISL28288
-
1nF
U2B 1/2
ISL28288
+
VREF
(V+/2)
INPUT
R
5k
FIGURE 40. ECG AMPLIFIER
© Copyright Intersil Americas LLC 2006-2011. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6339 Rev 4.00
July 26, 2011
Page 14 of 20
ISL28288, ISL28488
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
CHANGE
7/12/11 FN6339.4 page 1 Features changed: "Low power 120uA…" to "Low power 60uA…"
page 4 Electrical Spec table IS,ON changed conditions and values from:
ISL28288, All channels enabled TYP 120, MAX 156, 175
ISL28488, All channels enabled TYP 240, MAX 315, 350
TO:
ISL28288, Per channel, all channels enabled TYP 60, MAX 78, 87.5
ISL28488, Per channel TYP 60, MAX 79, 87.5
page 4 Electrical Spec table IS,OFF updated description by adding MSOP to ISL28288
page 11 First paragraph second sentence of the Applications Information Introduction section changed
"…while drawing only 120uA of supply current." To "…while drawing only 60uA of supply current per amplifier."
6/16/11
Features on page 1 changed gain bw from 300 to 250kHz
Added Related Literature
Added Typ App Circuit
Updated PKG DWG Number to Ordering Information on page 2 for:
ISL28288FBZ from MDP0027 TO M8.15E, matching Intrepid
ISL28288FUZ from MDP0043 TO M10.118A
Added Note "Not Recommended for New Designs" for ISL28488FAZ (At Prenotification)
Removed "Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs" from Abs Max on page 3
Added "Supply Voltage under Operating Conditions. . . . . . . . . . . . . . . . . . 2.4V (±1.2V) to 5.5V (±2.75V)"
AVol room temp on page 3 min changed from 200V/mV to 103dB; over temp min changed from 190V/mV to 102dB; typ
changed from 300V/mV to 109dB. For Rl = 1kohm, changed typ from 60V/mV to 95dB
Vout split into 2 parameters; Vol and Voh beginning onpage 3. For Output Voltage Swing, High, removed min specs, changed typs
from 4.996V & 4.880V to 4 & 120mV; added max specs
Added Tjc Note on page 3
Changed GBW typ from 300kHz to 250kHz page 4
Removed min/max limits for SR page 4. Changed typ from +/-0.14V/us to +/-0.15V/us
Changed Note in Electrical Spec Table page 4 from: Parts are 100% tested at +25°C. Temperature limits established by
characterization and are not production tested.
To: Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design
Revised FIGURE 6. PSRR vs FREQUENCY on page 5
Added Figures 8-11 frequency curves beginning on page 6
Updated Proper Layout Maximizes Performance sectionpage 12 by removing last part of paragraph and Figure
Replaced MDP0027 POD with updated M8.15E to meet new standard
Replaced M14.173 POD with updated version - Updated drawing to remove table and added land pattern
Replaced MDP0043 POD with M10.118A to meet new standard
5-22-08
FN6339.3 Removed "coming soon" in ordering information, updated pb-free lead finish note to latest revision.
3-17-08
FN6339.2 1. Added 8ld. SO, 14 ld TSSOP package, pinout, and pin description.
2. Changed Io+, Io- specs
3. Updated Abs MAX supply voltage, Theta JAs, added CDM ESD spec
4. Changed spec. table noise current TYP from 0.1pA to 9fA
5. Updated noise plots (Fig.7, 8, 9)
6. Updated transient response plots (Fig 10, 11)
7. Added ECG circuit to applications section
6-28-07
FN6339.1 Applied all Intersil Standards. Added New Part to datasheet. Changed Caution Statement per Legal's suggested verbiage.
Ordering Information updated - added tape and reel note. Added note 1 to spec table for min and max. Updated POD's.
6/25/07 Following edits completed: 1) Datasheet description
3rd paragraph, last sentence. Changed "less than 10µA max" to "typically 4µA"
2) Datasheet description 3rd paragraph, last sentence. Change "the reduces the power" to "that reduces the power". 3) features
change "60µA to 120µA typ supply current" remove per amplifier. 4) change to "30pA max". 5) change to 105 typical PSRR. 6)
add 100 typical CMRR. 7) Page 2, Iio ± 80pA max limit for hot/cold temp
9-20-06
FN6339.0 Initial Release
FN6339 Rev 4.00
July 26, 2011
Page 15 of 20
ISL28288, ISL28488
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page
on intersil.com: ISL28288, ISL28488
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/search.php
FN6339 Rev 4.00
July 26, 2011
Page 16 of 20
ISL28288, ISL28488
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
E
INCHES
PIN #1
I.D. MARK
E1
1
(N/2)
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
SYMBOL
QSOP16
QSOP24
QSOP28
TOLERANCE
NOTES
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
Rev. F 2/07
NOTES:
L1
A
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
FN6339 Rev 4.00
July 26, 2011
Page 17 of 20
ISL28288, ISL28488
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(1.27)
(0.60)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
FN6339 Rev 4.00
July 26, 2011
Page 18 of 20
ISL28288, ISL28488
Package Outline Drawing
M14.173
14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 3, 10/09
A
1
3
5.00 ±0.10
SEE
DETAIL "X"
8
14
6.40
PIN #1
I.D. MARK
4.40 ±0.10
2
3
1
0.20 C B A
7
B
0.65
0.09-0.20
TOP VIEW
END VIEW
1.00 REF
0.05
H
C
0.90 +0.15/-0.10
1.20 MAX
SEATING
PLANE
0.25 +0.05/-0.06
0.10 C
0.10
GAUGE
PLANE
0.25
5
0°-8°
0.05 MIN
0.15 MAX
CBA
SIDE VIEW
0.60 ±0.15
DETAIL "X"
(1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
(5.65)
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.80mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead is 0.07mm.
(0.65 TYP)
(0.35 TYP)
TYPICAL RECOMMENDED LAND PATTERN
FN6339 Rev 4.00
July 26, 2011
6. Dimension in ( ) are for reference only.
7. Conforms to JEDEC MO-153, variation AB-1.
Page 19 of 20
ISL28288, ISL28488
Package Outline Drawing
M10.118A (JEDEC MO-187-BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
3.0 ± 0.1
A
0.25
10
DETAIL "X"
CAB
0.18 ± 0.05
SIDE VIEW 2
4.9 ± 0.15
3.0 ± 0.1
1.10 Max
B
PIN# 1 ID
1
2
0.95 BSC
0.5 BSC
TOP VIEW
Gauge
Plane
0.86 ± 0.09
H
0.25
C
3°±3°
SEATING PLANE
0.10 ± 0.05
0.23 +0.07/ -0.08
0.08 C A B
0.55 ± 0.15
0.10 C
DETAIL "X"
SIDE VIEW 1
5.80
4.40
3.00
NOTES:
0.50
0.30
1.
Dimensions are in millimeters.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Plastic or metal protrusions of 0.15mm max per side are not
included.
Plastic interlead protrusions of 0.25mm max per side are not
included.
4.
1.40
5.
Dimensions “D” and “E1” are measured at Datum Plane “H”.
TYPICAL RECOMMENDED LAND PATTERN
6.
This replaces existing drawing # MDP0043 MSOP10L.
FN6339 Rev 4.00
July 26, 2011
Page 20 of 20
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