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ISL3259EIBZ

ISL3259EIBZ

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SOIC8_150MIL

  • 描述:

    IC TRANSCEIVER HALF 1/1 8SOIC

  • 数据手册
  • 价格&库存
ISL3259EIBZ 数据手册
DATASHEET ISL3259E FN6587 Rev.2.00 Aug 31, 2017 ±15kV ESD Protected, 100Mbps, 5V, PROFIBUS, Full Fail-Safe, RS-485/RS-422 Transceiver The ISL3259E is a ±15kV IEC61000 ESD Protected, 5V powered, single transceiver that meets both the RS-485 and RS-422 standards for balanced communication. It also features the larger output voltage and higher data rate (up to 100Mbps) required by high speed PROFIBUS applications. The low bus currents (+220µA/-150µA) present a 1/5 unit load to the RS-485 bus. This allows up to 160 transceivers on the network without violating the RS-485 specification’s load limit, and without using repeaters. This transceiver requires a 5V supply, and delivers at least a 2.1V differential output voltage. This translates into better noise immunity (data integrity), longer reach, or the ability to drive up to six 120Ω terminations in “star” or other non-standard bus topologies. SCSI applications benefit from the ISL3259E’s low receiver and transmitter part-to-part skews. The ISL3259E is perfect for high speed parallel applications requiring simultaneous capture of large numbers of bits. The low bit-to-bit skew eases the timing constraints on the data latching signal. Features • IEC61000 ESD protection on RS-485 I/O pins . . . . . . ±15kV - Class 3 HBM ESD level on all other pins . . . . . . . . . . . >9kV • Large differential VOUT . . . . . . . . . . . . . . . . . . . 2.8V into 54Ω Better noise immunity, or drive up to 6 terminations • Very high data rate. . . . . . . . . . . . . . . . . . . . . . up to 100Mbps • 11/13ns (maximum) Tx/Rx propagation delays; 1.5ns (maximum) skew • 1/5 unit load allows up to 160 devices on the bus • Full fail-safe (open, shorted, terminated/undriven) receiver • High Rx IOL to drive opto-couplers for isolated applications • Hot plug - Tx and Rx outputs remain three-state during power-up • Low quiescent supply current. . . . . . . . . . . . . . . . . . . . . . 4mA • Low current shutdown mode . . . . . . . . . . . . . . . . . . . . . . . 1µA • -7V to +12V common mode input voltage range Receiver (Rx) inputs feature a “Full Fail-Safe” design, which ensures a logic high Rx output if Rx inputs are floating, shorted, or terminated but undriven. Rx outputs feature high drive levels (typically >30mA @ VOL = 1V) to ease the design of optically isolated interfaces. • Three-State Rx and Tx outputs Hot plug circuitry ensures that the Tx and Rx outputs remain in a high impedance state while the power supply stabilizes. • Pb-free (RoHS compliant) Driver (Tx) outputs are short-circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. • Operates from a single +5V supply • Current limiting and thermal shutdown for driver overload protection Applications • PROFIBUS® DP and FMS networks • SCSI “fast 40” drivers and receivers • Motor controller/position encoder systems Related Literature • Factory automation • For a full list of related documents, refer to our website • Field bus networks - ISL3259E product page • Security networks • Building environmental control systems • Industrial/process control networks FN6587 Rev.2.00 Aug 31, 2017 Page 1 of 17 ISL3259E Ordering Information PART NUMBER (Note 3) TEMP. RANGE (°C) PART MARKING PACKAGE (Pb-Free) PKG. DWG. # ISL3259EIBZ (Note 1) 3259 EIBZ -40 to +85 8 Ld SOIC M8.15 ISL3259EIUZ (Note 1) 3259Z -40 to +85 8 Ld MSOP M8.118 ISL3259EIRZ (Note 2) 3259 -40 to +85 10 Ld 3x3 DFN L10.3x3C NOTES: 1. Add “-T” suffix for 2.5k unit tape and reel options. Refer to TB347 for details on reel specifications. 2. Add “-T” suffix for 6k unit tape and reel options. Refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pin Configuration ISL3259E (10 LD DFN) TOP VIEW ISL3259E (8 LD MSOP, SOIC) TOP VIEW RO 1 8 VCC RE 2 7 B/Z DE 3 6 A/Y 5 GND DI 4 R D Truth Table RO 1 10 VCC RE 2 9 NC DE 3 8 B/Z DI 4 7 A/Y NC 5 6 GND Truth Table TRANSMITTING RECEIVING INPUTS OUTPUTS INPUTS OUTPUT RE DE DI B/Z A/Y RE DE A-B RO X 1 1 0 1 0 0 VAB ≥-0.05V 1 X 1 0 1 0 0 0 -0.05V >VAB >-0.2V Undetermined 0 0 X High-Z High-Z 0 0 VAB ≤ -0.2V 0 1 0 X High-Z* High-Z* 0 0 Inputs Open/Shorted 1 1 1 X High-Z 1 0 X High-Z* NOTE: *Shutdown Mode NOTE: *Shutdown Mode FN6587 Rev.2.00 Aug 31, 2017 Page 2 of 17 ISL3259E Pin Descriptions PIN FUNCTION RO Receiver output: If A - B  -50mV, RO is high. If A - B  -200mV, RO is low. If A and B are unconnected (floating) or shorted, or connected to a terminated bus that is undriven, RO is high. RE Receiver output enable. RO is enabled when RE is low. RO is high impedance when RE is high. If the Rx enable function isn’t required, connect RE directly to GND. DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. If the Tx enable function isn’t required, connect DE to VCC through a 1k or greater resistor. DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. GND Ground connection. This is also the potential of the DFN thermal pad. A/Y ±15kV IEC61000 ESD Protected RS-485, RS-422 level, noninverting receiver input and noninverting driver output. Pin is an input (A) if DE = 0; pin is an output (Y) if DE = 1. B/Z ±15kV IEC61000 ESD Protected RS-485, RS-422 level, inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0. Pin is an output (Z) if DE = 1. VCC System power supply input (4.75V to 5.25V). NC No Connection. Typical Operating Circuit ISL3259E +5V +5V MSOP PIN NUMBERS SHOWN + 8 0.1µF 0.1µF + 8 VCC 1 RO VCC R D 2 RE B/Z 7 3 DE A/Y 6 4 DI FN6587 Rev.2.00 Aug 31, 2017 RT RT DI 4 7 B/Z DE 3 6 A/Y RE 2 R D GND GND 5 5 RO 1 Page 3 of 17 ISL3259E Absolute Maximum Ratings Thermal Information VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V Input/Output Voltages A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V) Short-circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . Refer to “Electrical Specifications” Thermal Resistance (Typical) JA (°C/W) 105 8 Ld SOIC Package (Note 4). . . . . . . . . . . . . . . . . . . . 8 Ld MSOP Package (Note 4). . . . . . . . . . . . . . . . . . . 140 10 Ld DFN Package (Note 5) . . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . . .-65°C to +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Operating Conditions Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 4. JA is measured with the component mounted on a high-effective thermal conductivity test board in free air. Refer to TB379 for details. 5. JA is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features. Refer to TB379 for details. Electrical Specifications Test Conditions: VCC = 4.75V to 5.25V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C, (Note 6). PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 15) TYP MAX (Note 15) Full - - VCC UNITS DC CHARACTERISTICS Driver Differential VOUT VOD No Load RL = 100Ω (RS-422) (Figure 1A) Full 2.6 3.4 - V RL = 54Ω (RS-485) (Figure 1A) Full 2.1 2.8 VCC V RL = 60Ω, -7V  VCM  12V (Figure 1B) Full 1.9 2.7 - V VOD RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.2 V Driver Common-Mode VOUT VOC RL = 54Ω or 100Ω (Figure 1A) Full - 2 3 V Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States VOC RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.2 V Change in Magnitude of Driver Differential VOUT for Complementary Output States Logic Input High Voltage VIH DI, DE, RE Full 2 - - V Logic Input Low Voltage VIL DI, DE, RE Full - - 0.8 V Logic Input Current IIN1 DI = DE = RE = 0V or VCC Input Current (A/Y, B/Z) IIN2 DE = 0V, VCC = 0V or 5.25V Driver Short-Circuit Current, VO = High or Low IOSD1 Full -2 - 2 µA VIN = 12V Full - - 220 µA VIN = -7V Full -160 - - µA Full - - ±250 mA DE = VCC, -7V  VY or VZ  12V (Note 8) Differential Capacitance CD A/Y to B/Z 25 - 9 - pF Receiver Differential Threshold Voltage V TH -7V  VCM  12V Full -200 - -50 mV Receiver Input Hysteresis V TH VCM = 0V 25 - 28 - mV Receiver Output High Voltage VOH IO = -8mA, VID = -50mV Full VCC - 0.5 - - V Receiver Output Low Voltage VOL IO = +10mA, VID = -200mV Full - - 0.4 V Receiver Output Low Current IOL VOL = 1V, VID = -200mV Full 25 40 - mA Three-State (High Impedance) Receiver Output Current IOZR 0.4V  VO  2.4V Full -1 0.015 1 µA FN6587 Rev.2.00 Aug 31, 2017 Page 4 of 17 ISL3259E Electrical Specifications Test Conditions: VCC = 4.75V to 5.25V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C, (Note 6). (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 15) TYP MAX (Note 15) UNITS Receiver Input Resistance RIN -7V  VCM  12V Full 54 80 - kΩ Receiver Short-Circuit Current IOSR 0V  VO  VCC Full ±20 - ±110 mA DI = DE = 0V or VCC Full - 2.6 4 mA DE = 0V, RE = VCC, DI = 0V or VCC Full - 0.05 1 µA SUPPLY CURRENT No-Load Supply Current (Note 7) Shutdown Supply Current ICC ISHDN ESD PERFORMANCE RS-485 Pins (A/Y, B/Z) IEC61000-4-2, Air-Gap Discharge Method 25 - ±15 - kV IEC61000-4-2, Contact Discharge Method 25 - ±8 - kV Human Body Model, From Bus Pins to GND 25 - ±16.5 - kV HBM, per MIL-STD-883 Method 3015 25 - ±9 - kV Machine Model 25 - ±400 - V VOD  ±1.5V, RD = 54Ω, CL = 100pF (Figure 4) Full 100 - - Mbps tDD RD = 54Ω, CD = 50pF (Figure 2) Full - 8 12 ns Driver Differential Output Skew tSKEW RD = 54Ω, CD = 50pF (Figure 2) Full - 0.5 1.5 ns Prop Delay Part-to-Part Skew tSKP-P RD = 54Ω, CD = 50pF (Figure 2), (Note 14) Full - - 4 ns Driver Differential Rise or Fall Time tR, tF RD = 54Ω, CD = 50pF (Figure 2) Full 2 5 8 ns Driver Enable to Output High tZH RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Note 9) Full - 13 20 ns Driver Enable to Output Low tZL RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Note 9) Full - 11 20 ns |tZH (Y or Z) - tZL (Z or Y)| Full - 2.5 - ns All Pins DRIVER SWITCHING CHARACTERISTICS Maximum Data Rate Driver Differential Output Delay Driver Enable Time Skew fMAX tENSKEW Driver Disable from Output High tHZ RL = 110Ω, CL = 50pF, SW = GND (Figure 3) Full - 14 20 ns Driver Disable from Output Low tLZ RL = 110Ω, CL = 50pF, SW = VCC (Figure 3) Full - 12 20 ns |tHZ (Y or Z) - tLZ (Z or Y)| Full - 3 - ns (Note 11) Full 60 - 600 ns Full - - 1000 ns RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Notes 11, 12) Full - - 1000 ns VID = ±1.5V Full 100 - - Mbps Full - 9 13 ns (Figure 5) Full - 0 1.5 ns (Figure 5), (Note 14) Full - - 4 ns Driver Disable Time Skew Time to Shutdown tDISSKEW tSHDN Driver Enable from Shutdown to Output High tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Notes 11, 12) Driver Enable from Shutdown to Output Low tZL(SHDN) RECEIVER SWITCHING CHARACTERISTICS Maximum Data Rate Receiver Input to Output Delay fMAX tPLH, tPHL (Figure 5) Receiver Skew | tPLH - tPHL | tSKD Prop Delay Part-to-Part Skew tSKP-P Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Note 10) Full - - 12 ns Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Note 10) Full - - 12 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) Full - - 12 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) Full - - 12 ns FN6587 Rev.2.00 Aug 31, 2017 Page 5 of 17 ISL3259E Electrical Specifications Test Conditions: VCC = 4.75V to 5.25V; unless otherwise specified. Typical values are at VCC = 5V, TA = +25°C, (Note 6). (Continued) PARAMETER SYMBOL Time to Shutdown tSHDN TEST CONDITIONS (Notes 11) Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 11, 13) Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 11, 13) TEMP (°C) MIN (Note 15) TYP MAX (Note 15) UNITS Full 60 - 600 ns Full - - 1000 ns Full - - 1000 ns NOTES: 6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 7. Supply current specification is valid for loaded drivers when DE = 0V. 8. Applies to peak current. See “Typical Performance Curves” starting on page 11 for more information. 9. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN. 10. Because of the shutdown feature, the RE signal high time must be short enough (typically 700ns to ensure that the device enters SHDN. 13. Set the RE signal high time >700ns to ensure that the device enters SHDN. 14. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, VCC, etc.). 15. Parts are 100% tested at +25°C. Over-temperature limits are established by characterization and are not production tested. Test Circuits and Waveforms VCC RL/2 DE DI VCC Z Z DI VOD D 375Ω DE Y Y RL/2 FIGURE 1A. VOD AND VOC VOD D RL = 60 VCM -7V TO +12V 375Ω VOC FIGURE 1B. VOD WITH COMMON MODE LOAD FIGURE 1. DC DRIVER TEST CIRCUITS FN6587 Rev.2.00 Aug 31, 2017 Page 6 of 17 ISL3259E Test Circuits and Waveforms (Continued) 3V DI 1.5V 1.5V 0V VCC tPHL tPLH DE Z DI RD D OUT (Z) VOH OUT (Y) VOL CD Y SIGNAL GENERATOR 90% DIFF OUT (Y - Z) +VOD 90% 10% 10% tR -VOD tF SKEW = |tPLH - tPHL| FIGURE 2A. TEST CIRCUIT FIGURE 2B. MEASUREMENT POINTS FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES DE 110Ω Z DI VCC D SIGNAL GENERATOR SW Y GND 3V 50pF DE (NOTE 10) 1.5V 1.5V 0V tZH, tZH(SHDN) PARAMETER OUTPUT RE DI SW tHZ Y/Z X 1/0 GND tLZ Y/Z X 0/1 VCC tZH Y/Z 0 (Note 9) 1/0 GND tZL Y/Z 0 (Note 9) 0/1 VCC tHZ(SHDN) Y/Z 1 (Note 12) 1/0 GND tLZ(SHDN) Y/Z 1 (Note 12) 0/1 VCC OUTPUT HIGH (NOTE 10) tHZ VOH - 0.5V 50% OUT (Y, Z) VOH 0V tZL, tZL(SHDN) tLZ (NOTE 10) VCC OUT (Y, Z) 50% OUTPUT LOW VOL + 0.5V V OL FIGURE 3B. MEASUREMENT POINTS FIGURE 3A. TEST CIRCUIT FIGURE 3. DRIVER ENABLE AND DISABLE TIMES VCC DE + Z DI 54Ω D Y SIGNAL GENERATOR VOD CL 3V DI 0V - CL +VOD DIFF OUT (Y - Z) -VOD FIGURE 4A. TEST CIRCUIT 0V FIGURE 4B. MEASUREMENT POINTS FIGURE 4. DRIVER DATA RATE FN6587 Rev.2.00 Aug 31, 2017 Page 7 of 17 ISL3259E Test Circuits and Waveforms (Continued) +3V RE +1.5V A 15pF B R A 1.5V 1.5V RO 0V tPHL tPLH VCC SIGNAL GENERATOR 1.7V RO 1.7V 0V FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS FIGURE 5. RECEIVER PROPAGATION DELAY RE GND B A 1kΩ RO R VCC SW SIGNAL GENERATOR GND 15pF (NOTE 10) RE 3V 1.5V 1.5V 0V PARAMETER DE A SW tHZ 0 +1.5V GND tLZ 0 -1.5V VCC tZH (Note 10) 0 +1.5V GND tZL (Note 10) 0 -1.5V VCC tHZ(SHDN) (Note 13) 0 +1.5V GND tLZ(SHDN) (Note 13) 0 -1.5V VCC FIGURE 6A. TEST CIRCUIT tZH, tZH(SHDN) (NOTE 10) OUTPUT HIGH tHZ VOH - 0.5V 1.5V RO VOH 0V tZL, tZL(SHDN) tLZ (NOTE 10) VCC RO 1.5V OUTPUT LOW VOL + 0.5V V OL FIGURE 6B. MEASUREMENT POINTS FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES FN6587 Rev.2.00 Aug 31, 2017 Page 8 of 17 ISL3259E Application Information RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 receivers on each bus, assuming one unit load devices. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any mix of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 specification requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended Common Mode Range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for cable lengths as long as 4000ft (~1200m), so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. Receiver (Rx) Features This transceiver uses a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is ±200mV, as required by the RS-422 and RS-485 specifications. Receiver inputs function with common mode voltages as great as 7V outside the power supplies (that is, +12V and -7V), making them ideal for long networks, or industrial environments, where induced voltages are a realistic concern. The receiver input resistance of 50kΩ surpasses the RS-422 specification of 4kΩ, and is five times the RS-485 “Unit Load” (UL) requirement of 12kΩ minimum. Thus, the ISL3259E is known as a “one-fifth UL” transceiver, and there can be up to 160 devices on the RS-485 bus while still complying with the RS-485 loading specification. The receiver is a “full fail-safe” version that guarantees a high level receiver output if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated bus with all the transmitters disabled (terminated/undriven). Rx outputs deliver large low state currents (typically >30mA) at VOL = 1V, to ease the design of optically coupled isolated networks. Receivers easily meet the 100Mbps data rate supported by the driver, and the receiver output is tri-statable using the active low RE input. Driver (Tx) Features The RS-485/RS-422 driver is a differential output device that delivers at least 2.1V across a 54Ω load (RS-485/ PROFIBUS), and at least 2.6V across a 100Ω load (RS-422) even with VCC = 4.75V. The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. Driver outputs are not slew rate limited, so faster output transition times allow data rates up to 100Mbps. Driver outputs are tri-statable using the active high DE input. FN6587 Rev.2.00 Aug 31, 2017 For parallel applications, bit-to-bit skews between any two ISL3259E transmitter and receiver pairs are guaranteed to be no worse than 8ns (4ns maximum for any two Tx, 4ns maximum for any two Rx). High VOD Improves Noise Immunity and Flexibility The ISL3259E driver design delivers larger differential output voltages (VOD) than the RS-485 standard requires, or than most RS-485 transmitters can deliver. The minimum ±2.1V VOD guarantees at least ±600mV more noise immunity than networks built using standard 1.5V VOD transmitters. Another advantage of the large VOD is the ability to drive more than two bus terminations, which allows for use of the ISL3259E in “star” and other multi-terminated, non-standard network topologies. Figure 8 on page 11 details the transmitter’s VOD vs IOUT characteristic, and includes load lines for four (30Ω) and six (20Ω) 120Ω terminations. The figure shows that the driver typically delivers 1.9/1.5V into 4/6 terminations, even at +85°C. The RS-485 standard requires a minimum 1.5V VOD into two terminations, but the ISL3259E typically delivers RS-485 voltage levels with 2x to 3x the number of terminations. ESD Protection All pins on the ISL3259E include Class 3 (>9kV) Human Body Model (HBM) ESD protection structures, but the RS-485 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ESD events in excess of ±16.5kV HBM and ±15kV IEC61000-4-2. The RS-485 pins are particularly vulnerable to ESD strikes because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that can destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, and without degrading the RS-485 common mode range of -7V to +12V. This built-in ESD protection eliminates the need for board level protection structures (for example, transient suppression diodes), and the associated, undesirable capacitive load they present. IEC61000-4-2 Testing The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-485 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The IEC61000 standard’s lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device’s RS-485 pins allows the design of equipment meeting Level 4 criteria without the need for additional board level protection on the RS-485 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc, so it is more difficult to obtain repeatable results. The ISL3259E RS-485 pins withstand ±15kV air-gap discharges. Page 9 of 17 ISL3259E CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than ±9kV. The RS-485 pins of the ISL3259E survive ±8kV contact discharges. Hot Plug Function When a piece of equipment powers up, a period of time occurs in which the processor or ASIC driving the RS-485 control lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx outputs are kept disabled. If the equipment is connected to the bus, a driver activating prematurely during power-up may crash the bus. To avoid this scenario, the ISL3259E incorporates a hot plug function. Circuitry monitoring VCC ensures that, during power-up and power-down, the Tx and Rx outputs remain disabled, regardless of the state of DE and RE, if VCC is less than ~3.2V. This gives the processor/ASIC a chance to stabilize and drive the RS-485 control lines to the proper states. RE = GND 3.3V 3.1V 2.5 VCC 0 5.0 RL = 1k 2.5 0 A/Y ISL3259E RL = 1k RO ISL3259E 5.0 2.5 0 RECEIVER OUTPUT (V) DRIVER Y OUTPUT (V) 5.0 VCC (V) DE, DI = VCC TIME (40s/DIV) FIGURE 7. HOT PLUG PERFORMANCE (ISL3259E) vs ISL83088E WITHOUT HOT PLUG CIRCUITRY Data Rate, Cables, and Terminations Twisted pair is the cable of choice for RS-485, RS-422, and PROFIBUS networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. According to guidelines in the RS-422 and PROFIBUS specifications, networks operating at data rates in excess of 3Mbps should be limited to cable lengths of 100m (328 ft) or less, and the PROFIBUS specification recommends that the more expensive “Type A” (22AWG) cable be used. The ISL3259E’s large differential output swing, fast transition times, and high drivecurrent output stages allow operation even at 100Mbps over standard “CAT-5” cables up to 31m (100ft). Figures 16 and 17 detail the ISL3259E performance at this condition, with a 120Ω termination resistor at both the driver and the receiver ends. Note that the differential signal delivered to the receiver at the end of the cable (A - B) still exceeds 1V, so even longer cables FN6587 Rev.2.00 Aug 31, 2017 could be driven if lower noise margins are acceptable. Of course, jitter or some other criteria may limit the network to shorter cable lengths than those discussed here. If more noise margin is desired, shorter cables may produce a larger receiver input signal. Performance should be even better if using the “Type A” cable. The ISL3259E can also be used at slower data rates over longer cables, but some limitations apply. The Rx is optimized for high speed operation, so its output may glitch if the Rx input differential transition times are too slow. Keeping the transition times below 500ns, (which equates to the Tx driving a 1000ft (305m) CAT-5 cable) yields excellent performance over the full operating temperature range. To minimize reflections, proper termination is imperative when using this high data rate transceiver. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120Ω for “CAT-5”, and 220Ω for “Type A”) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. Built-In Driver Overload Protection As stated previously, the RS-485 specification requires that drivers survive worst case bus contentions undamaged. These transmitters meet this requirement using driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry, which ensures that the output current never exceeds the RS-485 specification, even at the common mode voltage range extremes. In the event of a major short circuit condition, the device also includes a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically reenable after the die temperature drops about +15 degrees. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. Low Power Shutdown Mode This BiCMOS transceiver uses a fraction of the power required by its bipolar counterparts, but it also includes a shutdown feature that reduces the already low quiescent ICC to a 50nA trickle. It enters shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for less than 60ns guarantees that the transceiver will not enter shutdown. Note that receiver and driver enable times increase when the transceiver enables from shutdown. Refer to Notes 9, 10, 11, 12, and 13 in the “Electrical Specifications” section for more information. Page 10 of 17 ISL3259E Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified DRIVER OUTPUT CURRENT (mA) 90 RD = 30Ω +85°C 80 3.5 RD = 20Ω +25°C DIFFERENTIAL OUTPUT VOLTAGE (V) 110 100 70 RD = 54Ω 60 50 40 RD = 100Ω 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 DIFFERENTIAL OUTPUT VOLTAGE (V) 4.5 3.4 3.2 3.1 3.0 2.9 2.8 2.7 RD = 54Ω 2.6 2.5 -40 5.0 -15 10 35 60 85 TEMPERATURE (°C) FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE 2.55 200 150 2.50 Y OR Z = LOW 100 ICC (mA) OUTPUT CURRENT (mA) RD = 100Ω 3.3 50 0 2.45 2.40 -50 2.35 Y OR Z = HIGH -100 -150 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 2.30 -40 12 -15 10 35 60 85 TEMPERATURE (°C) FIGURE 11. SUPPLY CURRENT vs TEMPERATURE FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE 9.0 0.9 8.8 |tPLH - tPHL| 0.8 8.6 8.4 0.7 8.2 SKEW (ns) PROPAGATION DELAY (ns) DE = VCC, RE = X OR DE = GND, RE = GND tPHL 8.0 7.8 0.6 0.5 7.6 tPLH 7.4 0.4 7.2 7.0 -40 -15 10 35 60 TEMPERATURE (°C) FIGURE 12. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE FN6587 Rev.2.00 Aug 31, 2017 85 0.3 -40 -15 10 35 TEMPERATURE (°C) 60 FIGURE 13. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE Page 11 of 17 85 ISL3259E RO 0 3 2 1 0 -1 DI Y-Z -2 -3 0 5 RO 0 3 2 1 0 -1 Y-Z -2 -3 TIME (5ns/DIV) TIME (5ns/DIV) FIGURE 15. DRIVER AND RECEIVER WAVEFORMS 0 5.0 RO 0 3.0 1.5 A-B 0 -1.5 -3.0 TIME (20ns/DIV) FIGURE 16. WORST CASE (NEGATIVE) SINGLE PULSE DRIVER AND RECEIVER WAVEFORMS DRIVING 100 FEET (31 METERS) OF CAT5 CABLE (DOUBLE TERMINATED WITH 120Ω) FN6587 Rev.2.00 Aug 31, 2017 VCC = 4.75V T = +85°C DI = 100Mbps 5 0 5.0 0 RO (~150ns) RECEIVER INPUT (V) DRIVER + CABLE DELAY RECEIVER INPUT (V) 5 RECEIVER OUTPUT (V) VCC = 4.75V T = +85°C DRIVER INPUT (V) RECEIVER OUTPUT (V) FIGURE 14. DRIVER AND RECEIVER WAVEFORMS DI = 100Mbps 5 DRIVER + CABLE DELAY 3.0 DRIVER INPUT (V) 5 RDIFF = 54Ω, CD = 50pF DRIVER INPUT (V) 0 RECEIVER OUTPUT (V) DI 5 DRIVER INPUT (V) RDIFF = 54Ω, CD = 50pF DRIVER OUTPUT (V) DRIVER OUTPUT (V) RECEIVER OUTPUT (V) Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified (~150ns) 1.5 0 A-B -1.5 -3.0 TIME (20ns/DIV) FIGURE 17. DRIVER AND RECEIVER SEVEN PULSE WAVEFORMS DRIVING 100 FEET (31 METERS) OF CAT5 CABLE (DOUBLE TERMINATED WITH 120Ω) Page 12 of 17 ISL3259E Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified Die Characteristics RECEIVER OUTPUT CURRENT (mA) 70 SUBSTRATE AND DFN THERMAL PAD POTENTIAL (POWERED UP) VOL, +25°C 60 VOH, +25°C VOL, +85°C GND 50 TRANSISTOR COUNT 40 VOH, +85°C 768 30 PROCESS Si Gate BiCMOS 20 10 0 0 1 2 3 4 5 RECEIVER OUTPUT VOLTAGE (V) FIGURE 18. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE FN6587 Rev.2.00 Aug 31, 2017 Page 13 of 17 ISL3259E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure you have the latest revision. DATE REVISION CHANGE Aug 31, 2017 FN6587.2 Added Related Literature section. Added VAB information to Receiving Truth Table on page 2. Applied new header/footer. Feb 18, 2008 FN6587.1 Initial release About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets. For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information page found at www.intersil.com. For a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary. You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. © Copyright Intersil Americas LLC 2008-2017. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6587 Rev.2.00 Aug 31, 2017 Page 14 of 17 ISL3259E Package Outline Drawing For the most recent package outline drawing, see M8.118. M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 4, 7/11 5 3.0±0.05 A DETAIL "X" D 8 1.10 MAX SIDE VIEW 2 0.09 - 0.20 4.9±0.15 3.0±0.05 5 0.95 REF PIN# 1 ID 1 2 B 0.65 BSC GAUGE PLANE TOP VIEW 0.55 ± 0.15 0.25 3°±3° 0.85±010 H DETAIL "X" C SEATING PLANE 0.25 - 0.36 0.08 M C A-B D 0.10 ± 0.05 0.10 C SIDE VIEW 1 (5.80) NOTES: (4.40) (3.00) 1. Dimensions are in millimeters. (0.65) (0.40) (1.40) TYPICAL RECOMMENDED LAND PATTERN FN6587 Rev.2.00 Aug 31, 2017 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.15mm max per side are not included. 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only. Page 15 of 17 ISL3259E Package Outline Drawing For the most recent package outline drawing, see L10.3x3C. L10.3x3C 10 LEAD DUAL FLAT PACKAGE (DFN) Rev 4, 3/15 3.00 5 PIN #1 INDEX AREA A B 10 5 PIN 1 INDEX AREA 1 2.38 3.00 0.50 2 10 x 0.25 6 (4X) 0.10 C B 1.64 TOP VIEW 10x 0.40 BOTTOM VIEW (4X) 0.10 M C B SEE DETAIL "X" (10 x 0.60) (10x 0.25) 0.90 MAX 0.10 C BASE PLANE 2.38 0.20 C SEATING PLANE 0.08 C SIDE VIEW (8x 0.50) 1.64 2.80 TYP C TYPICAL RECOMMENDED LAND PATTERN 0.20 REF 4 0.05 DETAIL "X" NOTES: FN6587 Rev.2.00 Aug 31, 2017 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends). 5. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 6. Compliant to JEDEC MO-229-WEED-3 except for E-PAD dimensions. Page 16 of 17 ISL3259E Package Outline Drawing For the most recent package outline drawing, see M8.15. M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45° 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8° 0° 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW “B” TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.51(0.020) 0.33(0.013) SIDE VIEW “A 0.25(0.010) 0.10(0.004) 5.20(0.205) TYPICAL RECOMMENDED LAND PATTERN NOTES: 16. Dimensioning and tolerancing per ANSI Y14.5M-1994. 17. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 18. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 19. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 20. Terminal numbers are shown for reference only. 21. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 22. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 23. This outline conforms to JEDEC publication MS-012-AA ISSUE C. FN6587 Rev.2.00 Aug 31, 2017 Page 17 of 17
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