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ISL4241EIRZ-T

ISL4241EIRZ-T

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    QFN32

  • 描述:

    IC TRANSCEIVER FULL 3/5 32QFN

  • 数据手册
  • 价格&库存
ISL4241EIRZ-T 数据手册
DATASHEET ISL4241E, ISL4243E FN8037 Rev 7.00 Jun 10, 2010 QFN Packaged, ±15kV ESD Protected, +2.7V to +5.5V, 10Nanoamp, 250kbps, RS-232 Transmitters/Receivers Intersil’s ISL4241E, ISL4243E devices are 2.7V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Additionally, they provide ±15kV ESD protection (IEC61000-4-2 Air Gap and Human Body Model) on transmitter outputs and receiver inputs (RS-232 pins). Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with manual and automatic power-down functions, reduce the standby supply current to a 10nA trickle. Tiny 5mmx5mm Quad Flat No-Lead (QFN) packaging and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. Features The ISL4241E, ISL4243E’s are 3 driver, 5 receiver devices that, coupled with the 5x5 QFN package, provide the industry’s smallest, lowest power complete serial port suitable for PDAs, and laptop or notebook computers. The 32 Ld 5X5 QFN requires 60% less board area than a 28 Ld TSSOP, and is nearly 20% thinner. The devices also include a noninverting always-active receiver for “wake-up” capability. • Receiver Hysteresis For Improved Noise Immunity The ISL4243E features an automatic power-down function that powers down the on-chip power-supply and driver circuits. This occurs when an attached peripheral device is shut off or the RS-232 cable is removed, conserving system power automatically without changes to the hardware or operating system. It powers up again when a valid RS-232 voltage is applied to any receiver input. Table 1 summarizes the features of both the ISL4241E and ISL4243E, while Application Note AN9863 summarizes the features of each device comprising the 3V RS-232 family. • Pb-Free Available (RoHS compliant) • Parameters Fully Specified for 10% Tolerance Supplies and Full Industrial Temp Range • Available in Small QFN (5mmx5mm) Package which is 60% Smaller than a 28 Lead TSSOP • ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000) • Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V • RS-232 Compatible with VCC = 2.7V • On-Chip Voltage Converters Require Only Four External 0.1µF Capacitors • Manual and Automatic Power-down Features • Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps • Wide Power Supply Range . . . . . . Single +2.7V to +5.5V • Low Supply Current in Power-down State . . . . . . . . .10nA Applications • Any Space Constrained System Requiring RS-232 Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks - PDAs and Palmtops, Data Cables - Cellular/Mobile Phones, Digital Cameras, GPS Receivers Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices • ”Technical Brief TB379 “Thermal Characterization of Packages for ICs” • Technical Brief TB389 “PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages” TABLE 1. SUMMARY OF FEATURES PART NUMBER NO. OF NO. OF Tx. Rx. NO. OF MONITOR Rx. QFN PKG. (ROUTB) AVAILABLE? DATA RATE (kbps) Rx. ENABLE FUNCTION? READY OUTPUT? MANUAL POWERDOWN? AUTOMATIC POWERDOWN FUNCTION? ISL4241E 3 5 YES 2 250 YES NO YES NO ISL4243E 3 5 YES 1 250 NO NO YES YES FN8037 Rev 7.00 Jun 10, 2010 Page 1 of 14 ISL4241E, ISL4243E Ordering Information PART NUMBER TEMP. RANGE (°C) PART MARKING PACKAGE PKG. DWG. # ISL4241EIR ISL 4241EIR -40 to +85 32 Ld QFN L32.5x5B ISL4241EIR-T* ISL 4241EIR -40 to +85 32 Ld QFN Tape & Reel L32.5x5B ISL4241EIRZ (Note) ISL4241 EIRZ -40 to +85 32 Ld QFN (Pb-Free) L32.5x5B ISL4241EIRZ-T* (Note) ISL4241 EIRZ -40 to +85 32 Ld QFN Tape & Reel (Pb-Free) L32.5x5B ISL4243EIR ISL 4243EIR -40 to +85 32 Ld QFN L32.5x5B ISL4243EIR-T* ISL 4243EIR -40 to +85 32 Ld QFN Tape & Reel L32.5x5B ISL4243EIRZ (Note) ISL4243 EIRZ -40 to +85 32 Ld QFN (Pb-Free) L32.5x5B ISL4243EIRZ-T* (Note) ISL4243 EIRZ -40 to +85 32 Ld QFN Tape & Reel (Pb-Free) L32.5x5B *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinouts 32 31 30 29 28 NC C2- 25 VCC V- 26 V+ NC 27 C1+ NC 28 VCC 29 V+ C230 C1+ V31 C2+ NC 32 C2+ ISL4243E (32 LD QFN) TOP VIEW ISL4241E (32 LD QFN) TOP VIEW 27 26 25 R1IN 1 24 GND R1IN 1 24 GND R2IN 2 23 C1- R2IN 2 23 C1- R3IN 3 22 EN R3IN 3 22 FORCEON R4IN 4 21 SHDN R4IN 4 21 FORCEOFF R5IN 5 20 R1OUTB R5IN 5 20 INVALID T1OUT 6 19 R2OUTB T1OUT 6 19 R2OUTB T2OUT 7 18 R1OUT T2OUT 7 18 R1OUT T3OUT 8 17 R2OUT T3OUT 8 17 R2OUT 12 13 14 15 16 NC NC 11 R3OUT R3OUT 10 R4OUT R4OUT 9 R5OUT 16 T1IN 15 T2IN 14 T3IN 13 NC 12 R5OUT T3IN FN8037 Rev 7.00 Jun 10, 2010 11 T1IN 10 T2IN 9 NC PD PD Page 2 of 14 ISL4241E, ISL4243E Pin Descriptions PIN VCC FUNCTION System power supply input (2.7V to 5.5V). V+ Internally generated positive transmitter supply (+5.5V). V- Internally generated negative transmitter supply (-5.5V). GND Ground connection. This is also the potential of the thermal pad (PD). C1+ External capacitor (voltage doubler) is connected to this lead. C1- External capacitor (voltage doubler) is connected to this lead. C2+ External capacitor (voltage inverter) is connected to this lead. C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. TOUT RIN ROUT ROUTB INVALID ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs. ±15kV ESD Protected, RS-232 compatible receiver inputs. TTL/CMOS level receiver outputs. TTL/CMOS level, noninverting, always enabled receiver outputs. Active low output that indicates if no valid RS-232 levels are present on any receiver input. FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2). FORCEON EN SHDN Active high input to override automatic power-down circuitry thereby keeping transmitters active. (FORCEOFF must be high). Active low receiver enable control. Active low input to shut down transmitters and on-board power supply, to place device in low power mode. NC No Connection PD Exposed Thermal Pad. Connect to GND. FN8037 Rev 7.00 Jun 10, 2010 Page 3 of 14 ISL4241E, ISL4243E Typical Operating Circuits ISL4241E +3.3V + C1 0.1µF C2 0.1µF T1IN T2IN T3IN R1OUTB R2OUTB TTL/CMOS LOGIC LEVELS R1OUT +3.3V 0.1µF 28 C1+ + 23 C129 C2+ + 30 C212 VCC V+ VT1 11 T2 10 T3 27 31 C1 0.1µF C2 0.1µF C4 0.1µF + T1OUT 7 8 T2OUT T1IN RS-232 LEVELS T2IN T3OUT T3IN 19 28 + C1+ 26 27 VCC V+ 23 C129 C2+ + 30 C2- V- 12 T1 11 T2 C3 0.1µF C4 0.1µF + 6 T1OUT 7 T2OUT T3 10 31 + RS-232 LEVELS 8 T3OUT R2OUTB 18 1 17 TTL/CMOS LOGIC LEVELS R2IN 5k R2OUT 4 R4OUT R4 17 13 RS-232 LEVELS 15 R4OUT 5k R5 R3IN 5k 14 R5OUT 4 GND 24 VCC TO POWER CONTROL LOGIC 21 20 RS-232 LEVELS R4IN 5k 13 22 SHDN 3 R4 R5IN R2IN 5k R3OUT 5 EN 2 R3 R4IN 5k R1IN 5k R2 R3IN 5k 1 R1 3 14 21 R1OUT 2 R3 22 18 R1IN 5k R3OUT FN8037 Rev 7.00 Jun 10, 2010 0.1µF 19 15 VCC + C3 0.1µF 6 20 R2 R5OUT + 26 R1 R2OUT ISL4243E 5 5k R5 R5IN FORCEON FORCEOFF INVALID GND 24 Page 4 of 14 ISL4241E, ISL4243E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, FORCEOFF, FORCEON, EN, SHDN . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . See “ESD PERFORMANCE” on page 7 Thermal Resistance (Typical, Notes 1, 2) JA (°C/W) JC (°C/W) 32 Ld QFN Package. . . . . . . . . . . . . . . 32 2.0 Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range ISL4241EIR, ISL4243EIR . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379, and Tech Brief TB389. 2. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 to C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = +25°C PARAMETER TEST CONDITIONS TEMP (°C) MIN (Note 4) TYP MAX (Note 4) UNITS Full 2.7 - 5.5 V DC CHARACTERISTICS Operating Voltage Range Supply Current, Automatic Power-down All RIN Open, FORCEON = GND, FORCEOFF = VCC (ISL4243E Only) Supply Current, Power-down All RIN Open, FORCEOFF = SHDN = GND Supply Current, Automatic Power-down Disabled All Outputs Unloaded, FORCEON = FORCEOFF = SHDN = VCC, VCC = 3.0V 25 - 3 300 nA Full - 50 300 nA 25 - 3 300 nA Full - 50 300 nA 25 - 0.3 1.0 mA Full - 0.3 1.5 mA Full - - 0.8 V LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low TIN, FORCEON, FORCEOFF, EN, SHDN Input Logic Threshold High TIN, FORCEON, FORCEOFF, EN, SHDN, VCC = 3.6V Full 2.0 - - V Input Leakage Current TIN, FORCEON, FORCEOFF, EN, SHDN Full - ±0.01 ±1.0 µA Output Leakage Current FORCEOFF = GND (ISL4243E) or EN = VCC (ISL4241E) Full - ±0.05 ±10 µA 25 - 0.5 - V - - 0.4 V - V Transmitter Input Hysteresis Output Voltage Low IOUT = 1.6mA Full Output Voltage High IOUT = -1.0mA Full VCC - 0.6 VCC - 0.1 AUTOMATIC POWER-DOWN (ISL4243E Only, FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to Enable Transmitters ISL4243E Powers Up (see Figure 7) Full -2.7 - 2.7 V Receiver Input Thresholds to Disable Transmitters ISL4243E Powers Down (see Figure7) Full -0.3 - 0.3 V INVALID Output Voltage Low IOUT = 1.6mA Full - - 0.4 V INVALID Output Voltage High IOUT = -1.0mA Full VCC - 0.6 - - V Full - 20 100 µs Receiver Threshold to Transmitters Enabled Delay (tWU) FN8037 Rev 7.00 Jun 10, 2010 Page 5 of 14 ISL4241E, ISL4243E Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 to C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = +25°C (Continued) PARAMETER TEST CONDITIONS Receiver Positive or Negative Threshold to INVALID High Delay (tINVH) Receiver Positive or Negative Threshold to INVALID Low Delay (tINVL) TEMP (°C) MIN (Note 4) TYP MAX (Note 4) UNITS 25 - 0.5 1 µs Full - 0.9 1.5 µs 25 - 30 50 µs Full - 40 60 µs RECEIVER INPUTS Input Voltage Range Full -25 - 25 V Input Threshold Low VCC = 3.0V Full - 1.0 0.6 V Input Threshold High VCC = 3.6V Full 2.4 1.5 - V Input Hysteresis 25 - 0.5 - V Input Resistance Full 3 5 7 k TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with 3k to Ground Full ±5.0 ±5.4 - V Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M -  Full - ±35 ±60 mA VOUT = ±12V, VCC = 0V or 3V to 5.5V, Automatic Power-down or FORCEOFF = SHDN = GND Full - - ±25 µA Maximum Data Rate RL = 3kCL = 1000pF, One Transmitter Switching Full 250 500 - kbps Receiver Propagation Delay Receiver Input to Receiver Output, CL = 150pF 25 - 0.15 0.3 µs Full - 0.2 0.35 µs Output Short-Circuit Current Output Leakage Current TIMING CHARACTERISTICS tPHL tPLH Receiver Skew Transmitter Propagation Delay tPHL - tPLH, CL = 150pF Transmitter Input to Transmitter Output, CL = 1000pF, RL = 3k tPHL tPLH Transmitter Skew Receiver Output Enable Time Receiver Output Disable Time Transmitter Output Enable Time Transmitter Output Disable Time FN8037 Rev 7.00 Jun 10, 2010 tPHL - tPLH (Note 3), RL = 3k, CL = 1000pF Normal Operation, RL = 1k to 0.5VCC, CL = 15pF Normal Operation, RL = 1k to 0.5VCC, CL = 15pF Normal Operation, RL = 3k, CL = 1000pF Normal Operation, RL = 3k, CL = 1000pF 25 - 0.3 0.5 µs Full - 0.35 0.55 µs 25 - 120 250 ns Full - 150 300 ns 25 - 0.75 1 µs Full - 0.85 1.1 µs 25 - 0.8 1 µs Full - 0.9 1.1 µs 25 - 50 200 ns Full - 100 250 ns 25 - 200 350 ns Full - 200 400 ns 25 - 350 500 ns Full - 400 600 ns 25 - 25 40 µs Full - 30 50 µs 25 - 2.5 4 µs Full - 2.7 4 µs Page 6 of 14 ISL4241E, ISL4243E Electrical Specifications PARAMETER Transition Region Slew Rate Test Conditions: VCC = 3V to 5.5V, C1 to C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = +25°C (Continued) TEMP (°C) MIN (Note 4) TYP 25 4 9 30 V/µs Full 4 8 30 V/µs 25 6 11 30 V/µs Full 6 10 30 V/µs Human Body Model 25 - ±15 - kV IEC61000-4-2 Contact Discharge 25 - ±8 - kV TEST CONDITIONS VCC = 3V to 3.6V, RL = 3kto 7k Measured From 3V to -3V or -3V to 3V CL = 150pF to 2500pF CL = 150pF to 1000pF MAX (Note 4) UNITS ESD PERFORMANCE RS-232 Pins (TOUT, RIN) All Other Pins IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV Human Body Model 25 - ±2 - kV NOTE: 3. Transmitter skew is measured at the transmitter zero crossing points. 4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Detailed Description The ISL4241E and ISL4243E both operate from a single +2.7V to +5.5V supply, guarantee a 250kbps minimum data rate, require only four small external 0.1µF capacitors, feature low power consumption, and meet all ElA RS-232C and V.28 specifications even with VCC = 3.0V. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Charge-Pump Intersil’s new ISL4241E, ISL4243E devices utilize regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ±5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows them to maintain RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings. Transmitters The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip ±5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. All transmitter outputs disable and assume a high impedance state when the device enters the power-down mode (see Table 2). These outputs may be driven to ±12V when disabled. transmitter operating at full speed. Under more typical conditions of VCC  3.3V, RL = 3k, and CL = 250pF, one transmitter easily operates at 900kbps. Transmitter inputs float if left unconnected, and may cause ICC increases. Connect unused inputs to GND for the best performance. Receivers All the ISL4241E, ISL4243E’s devices contain standard inverting receivers that are three-state via the EN or FORCEOFF control lines. Additionally, the ISL4241E, ISL4243E’s products include noninverting (monitor) receivers (denoted by the ROUTB label) that are always active, regardless of the state of any control lines. All the receivers convert RS-232 signals to CMOS output levels and accept inputs up to 25V while presenting the required 3k to 7k input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. VCC RXIN -25V  VRIN  +25V RXOUT 5k GND  VROUT  VCC GND FIGURE 1. INVERTING RECEIVER CONNECTIONS The ISL4241E inverting receivers disable only when EN is driven high. ISL4243E receivers disable during forced (manual) power-down, but not during automatic power-down (see Table 2). The devices guarantee a 250kbps data rate for full load conditions (3k and 1000pF), VCC  3.0V, with one FN8037 Rev 7.00 Jun 10, 2010 Page 7 of 14 ISL4241E, ISL4243E TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE RS-232 SIGNAL PRESENT AT RECEIVER INPUT? SHDN OR FORCEOFF FORCEON EN TRANSMITTER RECEIVER ROUTB INVALID INPUT INPUT INPUT OUTPUTS OUTPUTS OUTPUTS OUTPUT MODE OF OPERATION ISL4241E N.A. L N/A L High-Z Active Active N/A Manual Power-down N.A. L N/A H High-Z High-Z Active N/A Manual Power-down w/Receiver Disabled N.A. H N/A L Active Active Active N/A Normal Operation N.A. H N/A H Active High-Z Active N/A Normal Operation w/Receiver Disabled NO H H N/A Active Active Active L Normal Operation (Auto Power-down Disabled) YES H L N/A Active Active Active H Normal Operation (Auto Power-down Enabled) NO H L N/A High-Z Active Active L Power-down Due to Auto Power-down Logic YES L X N/A High-Z High-Z Active H Manual Power-down NO L X N/A High-Z High-Z Active L Manual Power-down ISL4243E ISL4241E and ISL4243E monitor receivers remain active even during manual power-down, making them extremely useful for Ring Indicator monitoring. Standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral’s protection diodes (see Figures 2 and 3). This renders them useless for wake-up functions, but the corresponding monitor receiver can be dedicated to this task as shown in Figure 3. Low Power Operation These 3V devices require a nominal supply current of 0.3mA, even at VCC = 5.5V, during normal operation (not in power-down mode). This is considerably less than the 5mA to 11mA current required by comparable 5V RS-232 devices, allowing users to reduce system power simply by switching to this new family. VCC VCC CURRENT FLOW VCC VOUT = VCC Rx POWERED DOWN UART Tx GND SHDN = GND OLD RS-232 CHIP FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL Power-down Functionality The already low current requirement drops significantly when the device enters power-down mode. In power-down, supply current drops to 10nA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs three-state. Inverting receiver outputs disable only in manual power-down; refer to Table 2 for details. This micro-power mode makes the ISL4241E and ISL4243E ideal for battery powered and portable applications. FN8037 Rev 7.00 Jun 10, 2010 Page 8 of 14 ISL4241E, ISL4243E VCC FORCEOFF PWR MGT LOGIC TRANSITION DETECTOR TO WAKE-UP LOGIC FORCEON INVALID ISL4241E ISL4243E ISL4243E VCC R2OUTB RX POWERED DOWN UART VOUT = HI-Z R2OUT TX I/O UART R2IN CPU T1IN FORCEOFF = GND OR SHDN = GND, EN = VCC T1OUT FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN FIGURE 4. CONNECTIONS FOR MANUAL POWER-DOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT Software Controlled (Manual) Power-down Most devices in the ISL4241E, ISL4243E family provide pins that allow the user to force the IC into the low power, standby state. On the ISL4241E, the power-down control is via a simple shutdown (SHDN) pin. Driving this pin high enables normal operation, while driving it low forces the IC into it’s power-down state. Connect SHDN to VCC if the power-down function isn’t needed. Note that all the receiver outputs remain enabled during shutdown (see Table 2). For the lowest power consumption during power-down, the receivers should also be disabled by driving the EN input high (see next section, and Figures 2 and 3). The ISL4243E utilize a two pin approach where the FORCEON and FORCEOFF inputs determine the IC’s mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. To switch between active and power-down modes, under logic or software control, only the FORCEOFF input need be driven. The FORCEON state isn’t critical, as FORCEOFF dominates over FORCEON. Nevertheless, if strictly manual control over power-down is desired, the user must strap FORCEON high to disable the automatic power-down circuitry. The ISL4243E inverting (standard) receiver outputs also disable when the device is in manual power-down, thereby eliminating the possible current path through a shutdown peripheral’s input protection diode (see Figures 2 and 3). Connecting FORCEOFF and FORCEON together disables the automatic power-down feature, enabling them to function as a manual SHUTDOWN input (see Figure 4). FN8037 Rev 7.00 Jun 10, 2010 With any of the previous mentioned control schemes, the time required to exit power-down, and resume transmission is only 100µs. A mouse, or other application, may need more time to wake up from shutdown. If automatic power-down is being utilized, the RS-232 device will reenter power-down if valid receiver levels aren’t reestablished within 30µs of the ISL4243E powering up. Figure 5 illustrates a circuit that keeps the ISL4243E from initiating automatic power-down for 100ms after powering up. This gives the slow-to-wake peripheral circuit time to reestablish valid RS-232 output levels. POWER MANAGEMENT UNIT MASTER POWER-DOWN LINE 0.1µF FORCEOFF 1M FORCEON ISL4243E FIGURE 5. CIRCUIT TO PREVENT AUTO POWER-DOWN FOR 100ms AFTER FORCED POWERUP INVALID Output (ISL4243E Only) The INVALID output always indicates whether or not a valid RS-232 signal (see Figure 6) is present at any of the receiver inputs (see Table 2), giving the user an easy way to determine when the interface block should power down. Invalid receiver levels occur whenever the driving peripheral’s outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. In the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic Page 9 of 14 ISL4241E, ISL4243E then uses this indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the interface block. INVALID can also be used to indicate the DTR or RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to GND (as in the case of a powered down driver). 2.7V VALID RS-232 LEVEL - ISL4243E IS ACTIVE INDETERMINATE - POWER-DOWN MAY OR MAY NOT OCCUR 0.3V INVALID LEVEL - POWER-DOWN OCCURS AFTER 30µs -0.3V INDETERMINATE - POWER-DOWN MAY OR MAY NOT OCCUR VALID RS-232 LEVEL - ISL4243E IS ACTIVE FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS INVALID switches low after invalid levels have persisted on all of the receiver inputs for more than 30µs (see Figure 7). INVALID switches back high 1µs after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic power-down, or forced on), so it is also useful for systems employing manual power-down circuitry. When automatic power-down is utilized, INVALID = 0 indicates that the ISL4243E is in power-down mode. INVALID } REGION TRANSMITTER OUTPUTS INVALID OUTPUT VCC 0 tINVL The time to recover from automatic power-down mode is typically 100µs. The charge pumps require 0.1µF, or greater, capacitors for proper operation. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-. Power Supply Decoupling In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC. Transmitter Outputs when Exiting Power-down tINVH AUTOPWDN Automatic power-down operates when the FORCEON input is low, and the FORCEOFF input is high. Tying FORCEON high disables automatic power-down, but manual power-down is always available via the overriding FORCEOFF input. Table 2 summarizes the automatic power-down functionality. Capacitor Selection -2.7V RECEIVER INPUTS peripheral’s outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. The ISL4243E powers back up whenever it detects a valid RS-232 voltage level on any receiver input. This automatic power-down feature provides additional system power savings without changes to the existing operating system. PWR UP V+ VCC 0 V- Figure 8 shows the response of two transmitter outputs when exiting power-down mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3kin parallel with 2500pF. Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V. FIGURE 7. AUTOMATIC POWER-DOWN AND INVALID TIMING DIAGRAMS Automatic Power-down (ISL4243E Only) Even greater power savings is available by using the ISL4243E which features an automatic power-down function. When no valid RS-232 voltages (see Figure 5) are sensed on any receiver input for 30µs, the charge pump and transmitters power-down, thereby reducing supply current to 10nA. Invalid receiver levels occur whenever the driving FN8037 Rev 7.00 Jun 10, 2010 Page 10 of 14 ISL4241E, ISL4243E 5V/DIV 5V/DIV. FORCEOFF T1 T1IN T1OUT 2V/DIV. T2 R1OUT VCC = +3.3V C1 to C4 = 0.1 µF VCC = +3.3V C1 to C4 = 0.1µF 5µs/DIV TIME (20µs/DIV) FIGURE 10. LOOPBACK TEST AT 120kbps FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING POWER-DOWN Operation Down to 2.7V The ISL4241E, ISL4243E transmitter outputs meet RS-562 levels (±3.7V), at the full data rate, with VCC as low as 2.7V. RS-562 levels typically ensure inter operability with RS-232 devices. High Data Rates + C1 VCC C1+ V+ C1C2 + C2+ ISL4241E ISL4243E V- C2TIN FORCEON + C3 C4 + TOUT RIN ROUT VCC R1OUT VCC = +3.3V C1 - C4 = 0.µF 2µs/DIV FIGURE 11. LOOPBACK TEST AT 250kbps Interconnection with 3V and 5V Logic + 0.1µF T1IN T1OUT The ISL4241E, ISL4243E maintain the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 9 details a transmitter loopback test circuit, and Figure 10 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 11 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitters were also loaded with an RS-232 receiver. VCC 5V/DIV. 1000pF 5k The ISL4241E, ISL4243E directly interface with 5V CMOS and TTL logic families. Nevertheless, with the ISL4241E, ISL4243E at 3.3V, and the logic supply at 5V, AC, HC, and CD4000 outputs can drive ISL4241E, ISL4243E inputs, but ISL4241E, ISL4243E outputs do not reach the minimum VIH for these logic families. See Table 3 for more information. TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES VCC SYSTEM POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE (V) (V) 3.3 3.3 5 5 FORCEOFF or SHDN FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT FN8037 Rev 7.00 Jun 10, 2010 COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Page 11 of 14 ISL4241E, ISL4243E TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES (Continued) VCC SYSTEM POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE (V) (V) 5 3.3 respect to all other pins. The RS-232 pins on “E” family devices can withstand HBM ESD events to 15kV. IEC61000-4-2 Testing COMPATIBILITY Compatible with ACT and HCT CMOS, and with TTL. ISL4241E, ISL4243E outputs are incompatible with AC, HC, and CD4000 CMOS inputs. ±15kV ESD Protection All pins on ISL4241E, ISL4243E devices include ESD protection structures, but the RS-232 pins (transmitter outputs and receiver inputs) incorporate advanced structures which allow them to survive ESD events up to ±15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don’t interfere with RS-232 signals as large as ±25V. Human Body Model (HBM) Testing As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5k current limiting resistor, making the test less severe than the IEC61000 test which utilizes a 330 limiting resistor. The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with Typical Performance Curves The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device’s RS-232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-232 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The “E” device RS-232 pins withstand 15kV air-gap discharges. CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 8kV. All “E” family devices survive 8kV contact discharges on the RS-232 pins. VCC = 3.3V, TA = +25°C 25 VOUT+ 4 20 2 SLEW RATE (V/s) TRANSMITTER OUTPUT VOLTAGE (V) 6 1 TRANSMITTER AT 250kbps OTHER TRANSMITTERS AT 30kbps 0 -2 15 -SLEW +SLEW 10 VOUT - -4 -6 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE FN8037 Rev 7.00 Jun 10, 2010 5 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) FIGURE 13. SLEW RATE vs LOAD CAPACITANCE Page 12 of 14 ISL4241E, ISL4243E VCC = 3.3V, TA = +25°C (Continued) 45 3.5 40 3.0 250kbps SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) Typical Performance Curves 35 30 120kbps 25 20 20kbps 15 NO LOAD ALL OUTPUTS STATIC 2.5 2.0 1.5 1.0 0.5 10 0 2000 1000 3000 4000 5000 0 2.5 3.0 3.5 LOAD CAPACITANCE (pF) FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE Die Characteristics SUBSTRATE AND QFN THERMAL PAD POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL4241E, ISL4243E: 464 PROCESS: Si Gate BiCMOS © Copyright Intersil Americas LLC 2002-2010. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN8037 Rev 7.00 Jun 10, 2010 Page 13 of 14 ISL4241E, ISL4243E Package Outline Drawing L32.5x5B 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 11/07 4X 3.5 5.00 28X 0.50 A B 6 PIN 1 INDEX AREA 6 PIN #1 INDEX AREA 32 25 1 5.00 24 3 .30 ± 0 . 15 17 (4X) 8 0.15 9 16 TOP VIEW 0.10 M C A B + 0.07 32X 0.40 ± 0.10 4 32X 0.23 - 0.05 BOTTOM VIEW SEE DETAIL "X" 0.10 C 0 . 90 ± 0.1 C BASE PLANE SEATING PLANE 0.08 C ( 4. 80 TYP ) ( ( 28X 0 . 5 ) SIDE VIEW 3. 30 ) (32X 0 . 23 ) C 0 . 2 REF 5 ( 32X 0 . 60) 0 . 00 MIN. 0 . 05 MAX. DETAIL "X" TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN8037 Rev 7.00 Jun 10, 2010 Page 14 of 14
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