ISL8130IRZ

DATASHEET ISL8130 FN7954 Rev.4.00 Mar 24, 2017 Advanced Single Universal Pulse-Width Modulation (PWM) Controller Features The ISL8130 is a versatile controller that integrates control, output adjustment, monitoring, and protection functions into a single package for synchronous Buck, standard Boost, SEPIC, and Flyback topologies. • Universal controller for multiple DC/DC converters • Wide input range - 4.5V to 5.5V - 5.5V to 28V The ISL8130 provides simple, single feedback loop, voltage mode control with fast transient response. The output voltage of the converter can be precisely regulated to as low as 0.6V. The switching frequency is adjustable from 100kHz to 1.4MHz. • Programmable soft-start • Supports pre-biased load applications The error amplifier features a 15MHz gain-bandwidth product and 6V/µs slew rate that enables fast transient response. The PWM duty cycle ranges from 0% to 100% in transient conditions. The capacitor from the ENSS pin to ground sets soft-start slew rate. • Resistor-selectable switching frequency - 100kHz to 1.4MHz • External reference tracking mode • Fast transient response - High-bandwidth error amplifier The ISL8130 monitors the output voltage and generates a power-good (PGOOD) signal when soft-start sequence is complete and the output is within regulation. A built-in, overvoltage protection circuit prevents the output voltage from going above typically 115% of the set point. For a Buck and Buck-Boost configuration, protection from overcurrent conditions is provided by monitoring the rDS(ON) of the upper MOSFET to inhibit the PWM operation appropriately. This approach improves efficiency by eliminating the need for a current sensing resistor. For other topologies, overcurrent protection is achieved using a current sensing resistor. • Extensive circuit protection functions - Overvoltage, overcurrent, over-temperature • Pb-free (RoHS compliant) Applications • Power supplies for microprocessors/ASICs • Ethernet routers and switchers • Medical instrument power supplies Related Literature • For a full list of related documents, visit our website - ISL8130 product page 5.6V to 16V C1 C3 C2 VIN VCC5 47.5kΩ PGOOD OSC R2 CDEL 0.1µF REF C8 SGND 10kΩ R6 C15 470pF C11 COMP 470pF R5 C12 Rcs 5mΩ 32V + PGND R3 3.32kΩ OCSET ISEN BOOT + - FB R1 499Ω L1 LGATE 10µH RT C7 0.1µF C4 PVCC MONITOR AND PROTECTION ENSS C6 C5 D1 UGATE PHASE REFOUT C14 2.2µF Q1 C9 C10 220µF x 2 REFIN 12.1kΩ 47nF R4 174kΩ FIGURE 1. BOOST CONVERTER FN7954 Rev.4.00 Mar 24, 2017 Page 1 of 23 ISL8130 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP. RANGE (°C) PACKAGE (RoHS COMPLIANT) PKG. DWG. # ISL8130IAZ 8130 IAZ -40 to +85 20 Ld QSOP M20.15 ISL8130IRZ 81 30IRZ -40 to +85 20 Ld 4x4 QFN L20.4x4 NOTES: 1. Add “-TK” suffix for 1k unit or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8130 For more information on MSL, see techbrief TB363. Pin Configurations ISL8130 (20 LD QSOP) TOP VIEW BOOT UGATE PHASE PVCC LGATE ISL8130 (20 LD QFN) TOP VIEW 20 19 18 17 16 ISEN 1 15 PGND REFIN 2 14 CDEL OCSET 3 13 PGOOD REFOUT 4 12 ENSS 8 9 10 FB 7 RT 6 SGND 11 COMP VIN 5 VCC5 NC CDEL 1 PGND 2 19 ENSS LGATE 3 18 COMP PVCC 4 17 FB PHASE 5 20 PGOOD EP 16 RT UGATE 6 BOOT 7 14 VIN ISEN 8 13 VCC5 REFIN 9 12 NC OCSET 10 15 SGND 11 REFOUT Pin Descriptions PIN # QFN, QSOP SYMBOL I/O DESCRIPTION 1, 8 ISEN I Input to overcurrent protection comparator. Voltage on this pin is compared with voltage on OCSET pin to detect an overcurrent condition. Connect this pin to the junction of the inductor and a current sensing resistor in a Boost, SEPIC, and Flyback configuration. Connect this pin to the phase node for sensing the voltage drop across the upper MOSFET in a Buck configuration. See “Overcurrent Protection” on page 14 for details. 2, 9 REFIN I To use REFIN as input reference, connect the desired reference voltage to the REFIN pin in the range of 0.6V to 1.25V. To use internal reference voltage, tie this pin to VCC5. Do not leave the REFIN pin floating. 3, 10 OCSET I An internal current source draws 100µA through a resistor connected between the supply and this pin. Voltage at this pin is compared with voltage at the ISEN pin for detecting an overcurrent condition. 4, 11 REFOUT O This pin provides buffered reference output for REFIN. Connect 2.2µF decoupling capacitor to this pin. 5, 12 NC 6, 13 VCC5 7, 14 VIN FN7954 Rev.4.00 Mar 24, 2017 No Connect This pin is the output of the internal 5V LDO. Connect a minimum of 4.7µF ceramic decoupling capacitor as close to the IC as possible at this pin. Refer to Table 1 on page 14. This pin powers the controller and must be decoupled to ground using a ceramic capacitor as close as possible to the VIN pin. Page 2 of 23 ISL8130 Pin Descriptions (Continued) SYMBOL 8, 15 SGND 9, 16 RT I/O DESCRIPTION This pin provides the signal ground for the IC. Tie this pin to the ground plane through the lowest impedance connection. I This is the oscillator frequency selection pin. Connecting this pin directly to VCC5 will select the oscillator free running frequency of 300kHz. By placing a resistor from this pin to GND, the oscillator frequency can be programmed from 100kHz to 1.4MHz. Figure 2 shows the oscillator frequency vs RT resistance. FREQUENCY (kHz) PIN # QFN, QSOP 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 0 25 50 75 RT (kΩ) 100 125 150 FIGURE 2. OSCILLATOR FREQUENCY vs RT 10, 17 FB I 11, 18 COMP I/O This pin is the error amplifier output pin. It is used as the compensation point for the PWM error amplifier. 12, 19 ENSS I This pin provides enable/disable function and soft-start for the PWM output. The output drivers are turned off when this pin is held below 1V. 13, 20 PGOOD O This pin provides a power-good status. It is an open collector output used to indicate the status of the output voltage. 14, 1 CDEL I The PGOOD signal can be delayed by a time proportional to a CDEL current of 2µA and the value of the capacitor connected between this pin and ground. A 0.1µF will typically provide 125ms delay. 15, 2 PGND 16, 3 LGATE 17, 4 PVCC This pin is the power connection for the gate drivers. Connect this pin to the VCC5 pin. Connect a minimum of 1.0µF ceramic decoupling capacitor as close to the IC as possible at this pin. 18, 5 PHASE This pin also provides a return path for the upper gate driver. In a Buck configuration, it is the junction point of the inductor, the upper MOSFET source, and the lower MOSFET drain. For Boost, SEPIC, and Flyback configurations, this pin is tied to the power ground. 19, 6 UGATE 20, 7 BOOT 21 (QSOP only) EP FN7954 Rev.4.00 Mar 24, 2017 This pin is connected to the feedback resistor divider and provides the voltage feedback signal for the controller. This pin sets the output voltage of the converter. This pin provides the power ground for the IC. Tie this pin to the ground plane through the lowest impedance connection. O O This pin provides the PWM-controlled gate drive for the lower MOSFET in Buck and Buck-Boost configuration. This pin provides the PWM-controlled gate drive for the main switching MOSFET in all configurations. This pin is used to generate level-shifted gate drive signals on the UGATE pin. Connect this pin to the junction of the bootstrap capacitor and the cathode of the bootstrap diode in a Buck or Buck-Boost configuration. For other topologies, connect this pin to PVCC. Please refer to typical application circuits beginning on page 5 for details. This pad is electrically isolated. Connect this pad to the signal ground plane using at least five vias for a robust thermal conduction path. Page 3 of 23 VCC5 ENSS ISL8130 FN7954 Rev.4.00 Mar 24, 2017 Block Diagram VIN OCSET 10µA ENSS INTERNAL 0.6V 100µA LINEAR REGULATOR POWER-ON RESET (POR) ISEN OTP SSDONE BOOT REFIN OVERCURRENT COMP SSDONE REFOUT VOLTAGE CONTROL UGATE FAULT LOGIC SSDONE GATE CONTROL LOGIC PHASE CDEL PWM COMP SS PVCC VREF FB EA LGATE COMP PGND OSCILLATOR PGOOD PGOOD COMP OV/UV COMP Page 4 of 23 SGND RT FIGURE 3. BLOCK DIAGRAM EP (QFN ONLY) ISL8130 Typical Step Down DC/DC Application Schematic 5.5V to 27V C6 C1 VIN PVCC C3 VCC5 C2 BOOT RT Q1 PGOOD R2 L1 PHASE CDEL C8 C9 UGATE OSC REF SGND R3 C11 Q2 LGATE -+ + + - FB VOUT ISEN C10 PGND REFIN COMP C7 0.1µF D1 R1 OCSET MONITOR AND PROTECTION ENSS C5 C4 REFOUT C12 R5 R4 FIGURE 4. TYPICAL STEP DOWN DC/DC APPLICATION SCHEMATIC Typical Standard Boost DC/DC Application Schematic 5.6V TO 16V C6 C1 C3 C2 VIN C4 R1 PVCC VCC5 MONITOR AND PROTECTION ENSS C5 RT R2 OSC REF -+ + SGND UGATE PHASE 32V D1 C9 C10 Q1 + - FB R3 L1 BOOT CDEL C8 LGATE C11 R5 COMP PGND C7 0.1µF PGOOD Rcs OCSET ISEN C12 REFOUT C14 REFIN R4 FIGURE 5. TYPICAL STANDARD BOOST DC/DC APPLICATION SCHEMATIC FN7954 Rev.4.00 Mar 24, 2017 Page 5 of 23 ISL8130 Typical SEPIC DC/DC Application Schematic 8.4V TO 19V C6 C1 C3 C2 VIN VCC5 C4 R1 PVCC MONITOR AND PROTECTION ENSS C5 ISEN PGOOD R2 LGATE OSC REF -+ + SGND UGATE PHASE C11 R5 COMP C12 PGND + - FB R3 C13 BOOT CDEL C8 COUPLED INDUCTOR L1 RT C7 0.1µF Rcs OCSET REFOUT C14 C9 D1 12V C10 Q1 REFIN R4 FIGURE 6. TYPICAL SEPIC DC/DC APPLICATION SCHEMATIC FN7954 Rev.4.00 Mar 24, 2017 Page 6 of 23 ISL8130 Absolute Maximum Ratings Thermal Information VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +30V PHASE, BOOT, and UGATE Pins to GND . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V BOOT to PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V PVCC, VCC5, PGOOD, REFIN, and CDEL to GND . . . . . . . . . . . . . . . -0.3V to +6V LGATE, ENSS, COMP, FB and RT to GND . . . . . . . . . . . . . . .-0.3V to VCC5 + 0.3V OCSET and ISEN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +27V OCSET to ISEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.7V to +27V ESD Rating Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 2kV Machine Model (Tested per JESD22-A115C) . . . . . . . . . . . . . . . . . 150V Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . 1.5kV Latch-Up (Tested per JESD-78C; Class 2, Level A) . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) JA (°C/W) JC (°C/W) QFN Package (Notes 4, 6) . . . . . . . . . . . . . . 43 6.5 QSOP Package (Notes 5, 7). . . . . . . . . . . . . 90 52 Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C Ambient Temperature Range . . . . . . . . . . . . -40°C to +85°C (for “I” suffix) Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to +24V OCSET to VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-1.4V to +0.3V Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 5. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. For JC, the "case temp" location is the center of the exposed metal pad on the package underside. 7. For JC, the “case temp” location is taken at the package top center. Electrical Specifications Operating Conditions: VIN = 12V, PVCC shorted with VCC5, TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +85°C. PARAMETER SYMBOL TEST CONDITIONS MIN (Note 13) TYP MAX (Note 13) UNIT - 1.4 - mA - 2.0 3.0 mA VIN SUPPLY CURRENT Shutdown Current (Note 8) IVIN_SHDN Operating Current (Notes 8, 9) IVIN_OP EN/SS = GND VCC5 SUPPLY (Notes 9, 10) Input Voltage Range VIN = VCC5 for 5V configuration 4.5 5.0 5.5 V Output Voltage VIN = 5.6V to 28V, IL = 3mA to 50mA 4.5 5.0 5.5 V Maximum Output Current VIN = 12V 50 - - mA 4.310 4.400 4.475 V 4.090 4.100 4.250 V 0.16 - - V POWER-ON RESET Rising VCC5 Threshold VIN connected to VCC5, 5V input operation Falling VCC5 Threshold UVLO Threshold Hysteresis PWM CONVERTERS Maximum Duty Cycle fSW = 300kHz 90 96 - % Minimum Duty Cycle fSW = 300kHz - - 0 % - 80 - nA FB Pin Bias Current Undervoltage Protection VUV Fraction of the set point; ~3µs noise filter 75 - 85 % Overvoltage Protection VOVP Fraction of the set point; ~1µs noise filter 112 - 120 % Free Running Frequency RT = VCC5, TA = -40°C to +85°C 270 300 330 kHz Total Variation TA = -40°C to +85°C, with frequency set by external resistor at RT - ±10% - % Frequency Range (Set by RT) VIN = 12V 100 - 1400 kHz OSCILLATOR FN7954 Rev.4.00 Mar 24, 2017 Page 7 of 23 ISL8130 Electrical Specifications Operating Conditions: VIN = 12V, PVCC shorted with VCC5, TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued) MIN (Note 13) TYP MAX (Note 13) UNIT VOSC - 1.25 - VP-P VREF 0.594 - 0.606 V ISS - 10 - µA VSOFT 1.0 - - V - - 1.0 V Gate Drive Pull-Down Resistance - 2.0 - Ω Gate Drive Pull-Up Resistance - 2.6 - Ω PARAMETER SYMBOL Ramp Amplitude (Note 11) TEST CONDITIONS REFERENCE AND SOFT-START/ENABLE Internal Reference Voltage Soft-Start Current Soft-Start Threshold Enable Low (Converter Disabled) PWM CONTROLLER GATE DRIVERS Rise Time Co = 3300pF - 25 - ns Fall Time Co = 3300pF - 25 - ns - 20 - ns - 88 - dB GBW - 15 - MHz SR - 6 - V/µs Dead Time Between Drivers ERROR AMPLIFIER DC Gain (Note 11) Gain-Bandwidth Product (Note 11) Slew Rate (Note 11) COMP Source/Sink Current (Note 11) ±0.4 mA OVERCURRENT PROTECTION OCSET Current Source IOCSET VOCSET = 4.5V 80 100 120 µA POWER-GOOD AND CONTROL FUNCTIONS Power-Good Lower Threshold VPG- Fraction of the set point; ~3µs noise filter -14 -10 -8 % Power-Good Higher Threshold VPG+ Fraction of the set point; ~3µs noise filter 9 - 16 % VPULLUP = 5.0V (Note 12) - - 1 µA PGOOD Voltage Low IPGOOD = 4mA - - 0.5 V PGOOD Delay CDEL = 0.1µF - 125 - ms CDEL Current for PGOOD CDEL threshold = 2.5V - 2 - µA - 2.5 - V Min External Reference Input at REFIN - 0.600 - V Max External Reference Input at REFIN - - 1.250 V PGOOD Leakage Current IPGLKG CDEL Threshold EXTERNAL REFERENCE REFERENCE BUFFER Buffered Output Voltage - Internal Reference VREFOUT IREFOUT = 1mA, CREFOUT = 2.2µF, TA = -40°C to +85°C 0.583 0.595 0.607 V Buffered Output Voltage - Internal Reference VREFOUT IREFOUT = 20mA, CREFOUT = 2.2µF, TA = -40°C to +85°C 0.575 0.587 0.599 V Buffered Output Voltage - External Reference VREFOUT VREFIN= 1.25V, IREFOUT = 1mA, CREFOUT = 2.2µF, TA = -40°C to +85°C 1.227 1.246 1.265 V FN7954 Rev.4.00 Mar 24, 2017 Page 8 of 23 ISL8130 Electrical Specifications Operating Conditions: VIN = 12V, PVCC shorted with VCC5, TA = +25°C. Boldface limits apply across the operating temperature range, -40°C to +85°C. (Continued) MIN (Note 13) TYP MAX (Note 13) UNIT 1.219 1.238 1.257 V 20 - - mA Shutdown Temperature (Note 11) - 150 - °C Thermal Shutdown Hysteresis (Note 11) - 20 - °C PARAMETER SYMBOL Buffered Output Voltage - External Reference VREFOUT Current Drive Capability TEST CONDITIONS VREFIN = 1.25V, IREFOUT = 20mA, CREFOUT = 2.2µF, TA = -40°C to +85°C CREFOUT = 2.2µF THERMAL SHUTDOWN NOTES: 8. The operating supply current and shutdown current specifications for 5V input are the same as VIN supply current specifications, i.e., 5.6V to 28V input conditions. These should also be tested with part configured for 5V input configuration, i.e., VIN = VCC5 = PVCC = 5V. 9. This is the VCC current consumed when the device is active but not switching. Does not include gate drive current. 10. When the input voltage is 5.6V to 28V at the VIN pin, the VCC5 pin provides a 5V output capable of 50mA (max) total from the internal LDO. When the input voltage is 5V, the VCC5 pin will be used as a 5V input, the internal LDO regulator is disabled and the VIN must be connected to the VCC5. In both cases the PVCC pin should always be connected to the VCC5 pin (refer to “Functional Description” on page 14 for more details). 11. Limits established by characterization and are not production tested. 12. It is recommended to use VCC5 as the pull-up source. 13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 2.00 2.00 1.75 1.75 IVIN_SHDN(mA) IVIN_SHDN (mA) Typical Performance Curves Oscilloscope plots are taken using the ISL8130EVAL1Z evaluation board for buck converter or ISL8130EVAL2Z for boost converter, VIN = 12V, VOUT = 5V for buck converter or VOUT = 32V for boost converter unless otherwise noted. 1.50 1.25 1.00 -40 -15 10 35 60 TEMPERATURE (°C) FIGURE 7. SHUTDOWN CURRENT, IVIN_SHDN vs TEMPERATURE FN7954 Rev.4.00 Mar 24, 2017 85 1.50 1.25 1.00 4 8 12 16 20 24 VIN (V) FIGURE 8. SHUTDOWN CURRENT, IVIN_SHDN vs VIN Page 9 of 23 28 ISL8130 3.00 4 2.50 3 IVIN_OP(mA) IVIN_OP (mA) Typical Performance Curves Oscilloscope plots are taken using the ISL8130EVAL1Z evaluation board for buck converter or ISL8130EVAL2Z for boost converter, VIN = 12V, VOUT = 5V for buck converter or VOUT = 32V for boost converter unless otherwise noted. (Continued) 2.00 1.50 1.00 -40 2 1 -15 10 35 60 0 85 4 8 12 16 TEMPERATURE (°C) 20 24 28 VIN (V) FIGURE 9. OPERATING CURRENT IVIN_OP vs TEMPERATURE FIGURE 10. OPERATING CURRENT IVIN_OP vs VIN 5.10 5.5 5.4 5.3 5.2 VVCC (V) VVCC (V) 5.05 5.00 5.1 5.0 4.9 4.8 4.95 4.7 4.6 4.90 -40 -15 10 35 60 4.5 0 85 0.01 0.02 FIGURE 11. VVCC vs TEMPERATURE 0.05 60 85 320 310 FSW (kHz) 0.605 VREF (V) 0.04 FIGURE 12. VVCC vs IVCC 0.610 0.600 0.595 0.590 -40 0.03 IVCC (A) TEMPERATURE (°C) 300 290 280 -15 10 35 TEMPERATURE (°C) FIGURE 13. VREF vs TEMPERATURE FN7954 Rev.4.00 Mar 24, 2017 60 85 270 -40 -15 10 35 TEMPERATURE (°C) FIGURE 14. fSW vs TEMPERATURE Page 10 of 23 ISL8130 Typical Performance Curves Oscilloscope plots are taken using the ISL8130EVAL1Z evaluation board for buck converter or ISL8130EVAL2Z for boost converter, VIN = 12V, VOUT = 5V for buck converter or VOUT = 32V for boost converter unless otherwise noted. (Continued) 12 11 1.05 ISS (µA) IOCSET NORMALIZED 1.15 0.95 9 0.85 -40 -15 10 35 TEMPERATURE (°C) 60 8 -40 85 10 35 60 85 FIGURE 16. SOFT-START CURRENT, ISS vs TEMPERATURE 2.2 1.25 1.10 2.1 ICDEL(µA) 0.95 0.80 2.0 1.9 0.65 0.50 0.50 -15 TEMPERATURE (°C) FIGURE 15. IOCSET vs TEMPERATURE VFB (V) 10 0.65 0.80 0.95 1.10 VREFIN (V) FIGURE 17. VFB vs VREFIN 1.8 -40 -15 10 35 60 FIGURE 18. CDEL CURRENT FOR PGOOD, ICDEL vs TEMPERATURE VIN EN/SS EN/SS PHASE FIGURE 19. SOFT-START WAVEFORM, NO PRE-BIASED, BUCK CONVERTER 85 TEMPERATURE (°C) VIN VOUT FN7954 Rev.4.00 Mar 24, 2017 1.25 VOUT PHASE FIGURE 20. SOFT-START WAVEFORM, PRE-BIASED, BUCK CONVERTER Page 11 of 23 ISL8130 Typical Performance Curves Oscilloscope plots are taken using the ISL8130EVAL1Z evaluation board for buck converter or ISL8130EVAL2Z for boost converter, VIN = 12V, VOUT = 5V for buck converter or VOUT = 32V for boost converter unless otherwise noted. (Continued) VOUT VOUT PGOOD PGOOD EN/SS EN/SS CDEL CDEL = 0.1µF FIGURE 21. PGOOD PULL-UP DELAY AT START UP, BUCK CONVERTER CDEL CDEL = 0.1µF FIGURE 22. PGOOD PULL-DOWN AT SHUTDOWN, BUCK CONVERTER VOUT VOUT VIN VIN PHASE PHASE EN/SS FIGURE 23. SOFT-START WAVEFORM, NO PRE-BIASED, BOOST CONVERTER EN/SS FIGURE 24. SOFT-START WAVEFORM, PRE-BIASED, BOOST CONVERTER VOUT VOUT IINDUCTOR EN/SS VIN EN/SS IINDUCTOR PGOOD FIGURE 25. OVERCURRENT PROTECTION, BUCK CONVERTER FN7954 Rev.4.00 Mar 24, 2017 FIGURE 26. OVERCURRENT PROTECTION, BOOST CONVERTER Page 12 of 23 ISL8130 Typical Performance Curves Oscilloscope plots are taken using the ISL8130EVAL1Z evaluation board for buck converter or ISL8130EVAL2Z for boost converter, VIN = 12V, VOUT = 5V for buck converter or VOUT = 32V for boost converter unless otherwise noted. (Continued) EN/SS VOUT IOUT EN/SS VIN PGOOD VOUT IINDUCTOR FIGURE 28. OCP ENTRY AND RECOVERY, BOOST CONVERTER FIGURE 27. OCP ENTRY AND RECOVERY, BUCK CONVERTER 1.00 1.00 VIN = 12V, VOUT = 5V VIN = 12V, VOUT = 32V 0.95 EFFICIENCY EFFICIENCY 0.95 0.90 0.85 VIN = 6V, VOUT = 32V 0.90 0.85 fSW = 280kHz fSW = 320kHz 0.80 0.80 0 5 10 15 20 LOAD CURRENT (A) FIGURE 29. EFFICIENCY VS LOAD CURRENT, BUCK CONVERTER, UPPER AND LOWER MOSFET: BSC057N03LS X 2; INDUCTOR: SER2010-901 VIN = 12V, VOUT = 5V 25 0 0.25 0.50 0.75 1.00 FIGURE 30. EFFICIENCY VS LOAD CURRENT, BOOST CONVERTER, MOSFET: BSC100N06LS; INDUCTOR: WE 74477110 VIN = 12V, VOUT = 32V IOUT, 0.5A/DIV IOUT, 10A/DIV VOUT, AC, 50mV/DIV VOUT, AC, 500mV/DIV ISTEP: 0A to 25A 3A/µs ISTEP: 0.5A to 1.25A 3A/µs FIGURE 31. LOAD TRANSIENT, BUCK CONVERTER, INDUCTOR: SER2010-901; COUT: 2*16SEPC180MX FIGURE 32. LOAD TRANSIENT, BOOST CONVERTER, INDUCTOR: WE 74477110; COUT: 2*220µF 50V, 42mΩ ESR FN7954 Rev.4.00 Mar 24, 2017 1.25 LOAD CURRENT (A) Page 13 of 23 ISL8130 Functional Description Initialization The ISL8130 automatically initializes upon receipt of power. The Power-On Reset (POR) function monitors the internal bias voltage generated from LDO output (VCC5) and the ENSS pin. The POR function initiates the soft-start operation after the VCC5 exceeds the POR threshold. The POR function inhibits operation with the chip disabled (ENSS pin