ISL8488IB

DATASHEET ISL8485, ISL8490, ISL8491 FN6046 Rev 10.01 Oct 14, 2021 5V, Low Power, High Speed, RS-485/RS-422 Transceivers The ISL8485, ISL8490, and ISL8491 RS-485/RS-422 devices are BiCMOS 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Unlike competitive devices, this family is specified for 10% tolerance supplies (4.5V to 5.5V). Features • Specified for 10% tolerance supplies • Class 3 ESD protection (HBM) on all pins: 7kV • High data rates: up to 5Mbps The ISL8485, ISL8490, and ISL8491 feature data rates up to 5Mbps. • Single unit load allows up to 32 devices on the bus All devices present a single unit load to the RS-485 bus, which allows up to 32 transceivers on the network. • -7V to +12V common-mode input voltage range The receiver (Rx) inputs feature a “fail-safe if open” design, which ensures a logic high Rx output if the Rx inputs are floating. The driver (Tx) outputs are short-circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. The ISL8490 and ISL8491 are configured for full duplex (separate Rx input and Tx output pins) applications. Half duplex configurations (ISL8485) multiplex the Rx inputs and Tx outputs to allow transceivers with Rx and Tx disable functions in 8 Ld packages. • Low quiescent current: 500µA • Three state Rx and Tx outputs (except ISL8490) • 30ns propagation delays, 5ns skew • Full duplex and half duplex pinouts • Operation from a single +5V supply (10% tolerance) • Current limiting and thermal shutdown for driver overload protection • Pb-free plus anneal (RoHS compliant) Applications • Factory automation • Security networks • Building environmental control systems • Industrial/process control networks • Level translators (for example, RS-232 to RS-422) • RS-232 “extension cords” FN6046 Rev 10.01 Oct 14, 2021 Page 1 of 15 © 2003 Renesas Electronics ISL8485, ISL8490, ISL8491 Typical Operating Circuits ISL8485 5V 8 RPU 5V 100nF VCC 100nF RPU VCC RB 1 RO 8 RO 1 A/Y 6 6 A/Y 2 RE RE 2 RT2 3 DE VFS RT1 B/Z 7 DE 3 7 B/Z 4 DI DI 4 RB GND GND 5 5 ISL8490 5V 1 VCC 5V 100nF 100nF A 8 2 RO 5 Y 1 VCC DI RT B 7 6 Z Z 6 7 B 3 DI RO 2 RT Y 5 3 8 A GND GND 4 4 ISL8491 5V 100nF 13,14 R PU 5V VCC RB RB A 12 100nF 9 Y 2 RO 3 RE B 11 10 Z 4 DE Z 10 11 B 5 DI 13,14 R PU VCC DI 5 RT RT Y GND 6,7 9 DE 4 RE 3 RO 2 12 A RB RB GND 6,7 To calculate the resistor values, refer to TB509. FN6046 Rev 10.01 Oct 14, 2021 Page 2 of 15 ISL8485, ISL8490, ISL8491 TABLE 1. SUMMARY OF FEATURES PART NUMBER HALF/FULL NO. OF DEVICES DUPLEX ALLOWED ON BUS DATA RATE (Mbps) SLEW-RATE LIMITED? RECEIVER/ DRIVER ENABLE? QUIESCENT ICC (µA) LOW POWER SHUTDOWN? PIN COUNT ISL8485 Half 32 5 No Yes 500 No 8 ISL8490 Full 32 5 No No 500 No 8 ISL8491 Full 32 5 No Yes 500 No 14 Ordering Information PART NUMBER (Notes 2, 3) ISL8485CBZ ISL8485CBZ-T PART MARKING 8485 CBZ PACKAGE DESCRIPTION (RoHS COMPLIANT) 8 Ld SOIC PKG. DWG. # M8.15 Carrier Type (Note 1) TEMP. RANGE Tube 0 to +70°C Reel, 2.5k ISL8485CPZ (No longer available, ISL 8485CPZ recommended replacement: ISL8485ECBZ-T) 8 Ld PDIP (Note 4) E8.3 Tube ISL8485IBZ 8 Ld SOIC M8.15 Tube ISL8485IPZ (No longer available, ISL 8485IPZ recommended replacement: ISL8485EIBZ-T) 8 Ld PDIP (Note 4) E8.3 ISL8490IBZ 8490 IBZ 8 Ld SOIC M8.15 8491IBZ 14 Ld SOIC ISL8485IBZ-T ISL8490IBZ-T ISL8491IBZ 8485 IBZ -40 to +85°C Reel, 2.5k Tube Tube Reel, 2.5k M14.15 Tube NOTE: 1. See TB347 for details about reel specifications. 2. Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), see the ISL8485, ISL8490, and ISL8491 product information pages. For more information about MSL, see TB363. 4. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications FN6046 Rev 10.01 Oct 14, 2021 Page 3 of 15 ISL8485, ISL8490, ISL8491 Pinouts ISL8485 (PDIP, SOIC) TOP VIEW RO 1 8 R ISL8490 (SOIC) TOP VIEW VCC 1 VCC R ISL8491 (SOIC) TOP VIEW 8 A NC 1 14 VCC RE 2 7 B/Z RO 2 7 B RO 2 DE 3 6 A/Y DI 3 6 Z RE 3 12 A 5 GND 5 Y DE 4 11 B D DI 4 GND 4 D DI 5 13 NC R D 10 Z GND 6 9 Y GND 7 8 NC Pin Descriptions PIN FUNCTION RO Receiver output: RO is high if A > B by at least 0.2V; RO is low if A < B by 0.2V or more; RO = high if A and B are unconnected (floating). RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. DE Driver output enable. The driver outputs Y and Z are enabled by bringing DE high. They are high impedance when DE is low. DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. GND Ground connection. A/Y Noninverting receiver input and noninverting driver output. Pin is an input (A) if DE = 0; pin is an output (Y) if DE = 1. B/Z Inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is an output (Z) if DE = 1. A Noninverting receiver input. B Inverting receiver input. Y Noninverting driver output. Z Inverting driver output. VCC System power supply input (4.5V to 5.5V). NC No connection. Truth Tables RECEIVING TRANSMITTING INPUTS INPUTS OUTPUTS RE DE DI Z Y X 1 1 0 1 X 1 0 1 0 0 0 X High-Z High-Z FN6046 Rev 10.01 Oct 14, 2021 RE OUTPUT DE DE Half Duplex Full Duplex A-B RO 0 0 X ≥ +0.2V 1 0 0 X ≤ -0.2V 0 0 0 X Inputs Open 1 1 1 1 X High-Z Page 4 of 15 ISL8485, ISL8490, ISL8491 Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Input/Output Voltages A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Short Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating HBM (Per MIL-STD-883, Method 3015.7) . . . . . . . . . . . . . . >7kV Thermal Resistance (Typical, Note 5) JA (°C/W) 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 140 8 Ld PDIP Package (Note 6) . . . . . . . . . . . . . . . . . . 14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 120 Moisture Sensitivity (see TB363) All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Junction Temperature (Plastic Package) . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile (SOIC only). . . . . . . . . . . . . . . . . see TB493 Operating Conditions Temperature Range ISL84XXCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C ISL84XXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Stresses above those listed in Absolute Maximum Ratings can permanently damage the device. This is a stress only rating.Operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 5. JA is measured with the component mounted on a low-effective thermal conductivity test board in free air. See TB379 for details. 6. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Electrical Specifications TA = +25°C, Note 7 PARAMETER Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, SYMBOL TEST CONDITIONS TEMP (°C) MIN TYP MAX UNIT Full - - VCC V DC CHARACTERISTICS Driver Differential VOUT (No Load) VOD1 Driver Differential VOUT (with Load) VOD2 Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States R = 50Ω (RS-422), Figure 1 Full 2 3 - V R = 27Ω (RS-485), Figure 1 Full 1.5 2.3 5 V VOD R = 27Ω or 50Ω, Figure 1 Full - 0.01 0.2 V VOC R = 27Ω or 50Ω, Figure 1 Full - - 3 V VOC R = 27Ω or 50Ω, Figure 1 Full - 0.01 0.2 V Logic Input High Voltage VIH DE, DI, RE Full 2 - - V Logic Input Low Voltage VIL DE, DI, RE Full - - 0.8 V Logic Input Current IIN1 DI (ISL8485, ISL8490, ISL8491) Full -2 - 2 µA IIN1 DE, RE (ISL8485, ISL8491) Full -25 - 25 µA IIN2 DE = 0V, VCC = 0V or 4.5 to 5.5V VIN = 12V Full - - 1 mA VIN = -7V Full - - -0.8 mA -7V ≤ VCM ≤ 12V Full -0.2 - 0.2 V Input Current (A, B), Note 10 Receiver Differential Threshold Voltage VTH Receiver Input Hysteresis VTH VCM = 0V 25 - 70 - mV Receiver Output High Voltage VOH IO = -4mA, VID = 200mV Full 3.5 - - V Receiver Output Low Voltage VOL IO = -4mA, VID = 200mV Full - - 0.4 V Three-State (high impedance) Receiver Output Current IOZR 0.4V ≤ VO ≤ 2.4V Full - - 1 µA Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V Full 12 - - kΩ FN6046 Rev 10.01 Oct 14, 2021 Page 5 of 15 ISL8485, ISL8490, ISL8491 Electrical Specifications TA = +25°C, Note 7 (Continued) PARAMETER No-Load Supply Current, Note 8 Test Conditions: VCC = 4.5V to 5.5V; unless otherwise specified. Typical values are at VCC = 5V, TEMP (°C) MIN TYP MAX UNIT ISL8490, ISL8491, DE, DI, RE = 0V or VCC Full - 500 565 µA ISL8485, DI, RE = 0V or DE = VCC VCC DE = 0V Full - 700 900 µA Full - 500 565 µA SYMBOL TEST CONDITIONS ICC Driver Short-Circuit Current, VO = High or Low IOSD1 DE = VCC, -7V ≤ VY or VZ ≤ 12V, Note 9 Full 35 - 250 mA Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full 7 - 85 mA Full 18 30 50 ns SWITCHING CHARACTERISTICS (ISL8485, ISL8490, ISL8491) Driver Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time tPLH, tPHL RDIFF = 54Ω, CL = 100pF, Figure 2 tSKEW RDIFF = 54Ω, CL = 100pF, Figure 2 Full - 2 10 ns tR, tF RDIFF = 54Ω, CL = 100pF, Figure 2 Full 3 11 25 ns Driver Enable to Output High tZH CL = 100pF, SW = GND, Figure 3 Full - 17 70 ns Driver Enable to Output Low tZL CL = 100pF, SW = VCC, Figure 3 Full - 14 70 ns Driver Disable from Output High tHZ CL = 15pF, SW = GND, Figure 3 Full - 19 70 ns Driver Disable from Output Low tLZ CL = 15pF, SW = VCC, Figure 3 Full - 13 70 ns Full 30 40 150 ns Figure 4 25 - 5 - ns Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | tPLH, tPHL Figure 4 tSKD Receiver Enable to Output High tZH CL = 15pF, SW = GND, Figure 5 Full - 9 50 ns Receiver Enable to Output Low tZL CL = 15pF, SW = VCC, Figure 5 Full - 9 50 ns Receiver Disable from Output High tHZ CL = 15pF, SW = GND, Figure 5 Full - 9 50 ns Receiver Disable from Output Low tLZ CL = 15pF, SW = VCC, Figure 5 Full - 9 50 ns Note 11 Full 5 - - Mbps Maximum Data Rate fMAX NOTES: 7. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 8. Supply current specification is valid for loaded drivers when DE = 0V. 9. Applies to peak current. See “Typical Performance Curves” on page 10 for more information. 10. Devices meeting these limits are denoted as “single unit load (1 UL)” transceivers. The RS-485 standard allows up to 32 unit loads on the bus. 11. Ensured by characterization, but not tested. FN6046 Rev 10.01 Oct 14, 2021 Page 6 of 15 ISL8485, ISL8490, ISL8491 Test Circuits and Waveforms R VCC DE Z DI VOD D Y VOC R FIGURE 1. DRIVER VOD AND VOC 3V DI 1.5V 1.5V 0V tPLH VCC CL = 100pF DE tPHL VOH 50% OUT (Y) 50% VOL Z DI RDIFF D Y VOH OUT (Z) SIGNAL GENERATOR tPLH tPHL CL = 100pF 50% 50% VOL 90% DIFF OUT (Y - Z) 10% tR +VOD 90% 10% -VOD tF SKEW = |tPLH (Y or Z) - tPHL (Z or Y)| FIGURE 2A. TEST CIRCUIT FIGURE 2B. MEASUREMENT POINTS FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES FN6046 Rev 10.01 Oct 14, 2021 Page 7 of 15 ISL8485, ISL8490, ISL8491 Test Circuits and Waveforms (Continued) DE Z DI 500Ω SIGNAL GENERATOR 3V VCC D SW Y DE GND 1.5V 1.5V 0V CL OUTPUT HIGH OUT (Y, Z) PARAMETER OUTPUT RE DI SW CL (pF) tHZ Y/Z X 1/0 GND 15 tLZ Y/Z X 0/1 VCC 15 tZH Y/Z 0 1/0 GND 100 tZL Y/Z 0 0/1 VCC 100 tHZ VOH - 0.5V VOH 2.3V 0V tLZ VCC OUT (Y, Z) 2.3V OUTPUT LOW VOL + 0.5V V OL FIGURE 3B. MEASUREMENT POINTS FIGURE 3A. TEST CIRCUIT FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL8490) RE +1.5V 3V 15pF B R A A 1.5V RO 1.5V 0V tPLH tPHL VCC SIGNAL GENERATOR 50% RO 50% 0V FIGURE 4B. MEASUREMENT POINTS FIGURE 4A. TEST CIRCUIT FIGURE 4. RECEIVER PROPAGATION DELAY RE B R SIGNAL GENERATOR 1kΩ RO VCC SW A GND 3V RE 1.5V 1.5V 0V 15pF OUTPUT HIGH RO PARAMETER DE AΩ SW tHZ 0 +1.5V GND tLZ 0 -1.5V VCC tZH 0 +1.5V GND tZL 0 -1.5V VCC FIGURE 5A. TEST CIRCUIT tHZ VOH - 0.5V VOH 1.5V 0V tLZ VCC RO 1.5V OUTPUT LOW VOL + 0.5V V OL FIGURE 5B. MEASUREMENT POINTS FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL8490) FN6046 Rev 10.01 Oct 14, 2021 Page 8 of 15 ISL8485, ISL8490, ISL8491 Application Information Data Rate, Cables, and Terminations RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a point-tomultipoint (multidrop) standard, which allows only one driver and up to 10 receivers on each bus, assuming one unit load devices. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow multipoint operation, the RS485 specification requires that drivers must handle bus contention without sustaining any damage. RS-485/RS-422 are intended for network lengths up to 4000ft, but the maximum system data rate decreases as the transmission length increases. Devices operating at 5Mbps are limited to lengths less than 100ft. An important advantage of RS-485 is the extended Common-Mode Range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000ft, so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. In point-to-point networks or point-to-multipoint (single driver on bus) networks, terminate the main cable in its characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. In multipoint (multi-driver) systems, terminate the main cable in its characteristic impedance at both ends. Keep stubs connecting a transceiver to the main cable as short as possible. Receiver Features These devices use a differential input receiver for maximum noise immunity and common-mode rejection. Input sensitivity is 200mV, as required by the RS-422 and RS-485 specifications. Receiver input impedance surpasses the RS-422 specification of 4kΩ, and meets the RS-485 unit load requirement of 12kΩ minimum. Receiver inputs function with common-mode voltages as great as 7V outside the power supplies (+12V and -7V), making them ideal for long networks in which induced voltages are a realistic concern. All the receivers include a “fail-safe if open” function that ensures a high level receiver output if the receiver inputs are unconnected (floating). Receivers easily meet the data rates supported by the corresponding driver. The ISL8485 and ISL8491 receiver outputs are three-statable using the active low RE input. Twisted pair cable is the cable of choice for RS-485/422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common-mode signals, which are effectively rejected by the differential receivers in these ICs. Proper termination is imperative to minimize reflections when using the 5Mbps devices. Built-In Driver Overload Protection The RS-485 specification requires that drivers survive worst case bus contentions undamaged. The ISL84XX devices meet this requirement using driver output short circuit current limits and on-chip thermal shutdown circuitry. The driver output stages incorporate short-circuit current limiting circuitry that ensures the output current never exceeds the RS-485 specification, even at the common-mode voltage range extremes. These devices also use a foldback circuit that reduces the short-circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short-circuit condition, the ISL84XX devices’ thermal shutdown feature disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about 15°C. If the condition persists, the thermal shutdown/reenable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. Driver Features The RS-485/RS-422 driver is a differential output device that delivers at least 1.5V across a 54Ω load (RS-485), and at least 2V across a 100Ω load (RS-422). The drivers feature low propagation delay skew to maximize bit width and to minimize EMI. The ISL8485 and ISL8491 drivers are three-statable using the active high DE input. The ISL8485 and ISL8491 driver outputs are not limited, so faster output transition times allow data rates of at least 5Mbps. FN6046 Rev 10.01 Oct 14, 2021 Page 9 of 15 ISL8485, ISL8490, ISL8491 Typical Performance Curves VCC = 5V, TA = 25°C, ISL8485, ISL8490, ISL8491; unless otherwise specified 90 DIFFERENTIAL OUTPUT VOLTAGE (V) 3.6 DRIVER OUTPUT CURRENT (mA) 80 70 60 50 40 30 20 10 0 0 1 2 3 4 3.4 3.2 RDIFF = 100Ω 3 2.8 2.6 2.4 RDIFF = 54Ω 2.2 2 -40 5 700 140 ISL8485: DE = VCC, RE = X 650 120 Y OR Z = LOW 100 600 80 550 60 500 40 ICC (A) OUTPUT CURRENT (mA) 85 75 FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE 160 20 0 -20 ISL8485: DE = GND, RE = X, ISL8490/ISL8491: DE = RE ISL8485, DE = GND, RE == XX 450 400 350 Y OR Z = HIGH -40 300 -60 250 -80 -100 200 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 12 150 -40 -25 0 50 25 75 85 TEMPERATURE (°C) FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE FIGURE 9. SUPPLY CURRENT vs TEMPERATURE 40 3 35 2.5 |tPHLY - tPLHZ| tPHLY 30 tPHLZ SKEW (ns) PROPAGATION DELAY (ns) 50 25 TEMPERATURE (°C) FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE -120 0 -25 DIFFERENTIAL OUTPUT VOLTAGE (V) tPLHZ tPLHY 25 2 |tPLHY - tPHLZ| 1.5 |CROSSING PT. OF Y and Z - CROSSING PT. OF Y and Z 20 -40 -25 0 25 50 TEMPERATURE (°C) FIGURE 10. DRIVER PROPAGATION DELAY vs TEMPERATURE FN6046 Rev 10.01 Oct 14, 2021 75 85 1 -40 -25 0 50 25 75 TEMPERATURE (°C) FIGURE 11. DRIVER SKEW vs TEMPERATURE Page 10 of 15 85 ISL8485, ISL8490, ISL8491 0 5 RO 0 4 3 2 B/Z A/Y 1 0 TIME (10ns/DIV) FIGURE 12. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH RDIFF = 54Ω, CL = 100pF DI 5 5 0 RO 0 4 3 A/Y 2 B/Z 1 0 TIME (10ns/DIV) FIGURE 13. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 518 PROCESS: Si Gate CMOS FN6046 Rev 10.01 Oct 14, 2021 Page 11 of 15 DRIVER INPUT (V) DI 5 RECEIVER OUTPUT (V) RDIFF = 54Ω, CL = 100pF DRIVER INPUT (V) VCC = 5V, TA = 25°C, ISL8485, ISL8490, ISL8491; unless otherwise specified (Continued) DRIVER OUTPUT (V) DRIVER OUTPUT (V) RECEIVER OUTPUT (V) Typical Performance Curves ISL8485, ISL8490, ISL8491 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit out website to make sure that you have the latest revision. DATE REVISION CHANGE Oct 14, 2021 10.01 Fixed the formatting on Ordering table. Removed Related Literature section. Updated POD M8.15 to the latest version, changes are as follows: -Added the coplanarity spec into the drawing. Updated POD M14.15 to the latest version, changes are as follows: -Added lead length dimension (1.27 – 0.40) -Changed angle of the lead to 0-8 degrees. Oct 18, 2018 10.00 Removed ISL8483, ISL8488, and ISL8489 information from the datasheet. Updated Typical Operating Circuits on page 2. Updated Features bullets on page 1. Added Related Literature section to page 1. Updated Ordering Information table on page 3: -Added Tape and Reel column. -Added information about replacements for the ISL8485CPZ and ISL8485IPZ. Removed About Intersil section and updated Renesas disclaimer. Feb 16, 2016 9.00 Added Rev History and About Intersil verbiage. Updated “Ordering Information” table on page 3. Updated following PODs to current revisions listing POD updates: POD M8.15: Updated to new POD format by removing table and moving dimensions onto drawing and adding land pattern Changed in Typical Recommended Land Pattern the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) Changed Note 1 "1982" to "1994 POD M14.15 Added land pattern and moved dimensions from table onto drawing FN6046 Rev 10.01 Oct 14, 2021 Page 12 of 15 ISL8485, ISL8490, ISL8491 Package Outline Drawings For the most recent package outline drawing, see E8.3. E8.3 (JEDEC MS-001-BA ISSUE D) 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE (PDIP) N E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AE D BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 B 0.010 (0.25) M C L eA A1 eC C A B S C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. MILLIMETERS SYMBOL MIN MAX MIN A - 0.210 - MAX 5.33 A1 0.015 - 0.39 A2 0.115 0.195 2.93 4.95 - NOTES 4 4 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 D 0.355 0.400 9.01 D1 0.005 - 0.13 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC eA 0.300 BSC eB - L 0.115 N 0.430 0.150 8 0.355 10.16 - 2.54 BSC 7.62 BSC 2.93 8 5 5 6 10.92 7 3.81 4 9 Rev. 0 12/93 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). FN6046 Rev 10.01 Oct 14, 2021 Page 13 of 15 ISL8485, ISL8490, ISL8491 For the most recent package outline drawing, see M8.15. M8.15 8 Lead Narrow Body Small Outline Plastic Package Rev 5, 4/2021 FN6046 Rev 10.01 Oct 14, 2021 Page 14 of 15 ISL8485, ISL8490, ISL8491 For the most recent package outline drawing, see M14.15. M14.15 14 Lead Narrow Body Small Outline Plastic Package Rev 2, 6/20 FN6046 Rev 10.01 Oct 14, 2021 Page 15 of 15 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. 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