IDT Confidential
TS3000B3A
Data Sheet
Local Temperature Sensor
Advance Information*
®
Features
The TS3000B3A digital temperature sensor with accuracy up to ±0.5°C
was designed to target applications demanding highest level of
temperature readout. The sensor is fully compliant with JEDEC JC42.4
Component Specification.
The digital temperature sensor comes with several user-programmable
registers to provide maximum flexibility for temperature-sensing
applications. The registers allow specifying critical, upper, and lower
temperature limits as well as hysteresis settings. Both the limits and
hysteresis values are used for communicating temperature events from
the chip to the system. This communication is done using Event pin,
which has an open-drain configuration. The user has the option of setting
the Event pin polarity as either an active-low or active-high comparator
output for thermostat operation, or as a temperature event interrupt
output for microprocessor-based systems.
•
•
•
- Meets strict SMBus spec of 25ms (min) 35ms (max)
•
•
•
•
•
•
•
•
•
Typical Server or Laptop Applications
Thermal
Controller
SMBus
Temperature Converted to Digital Data
Sampling Rate of 100ms (max)
Selectable 0, 1.5°C, 3°C, 6°C Hysteresis
Programmable Resolution from 0.0625°C to 0.5°C
Accuracy:
– ±0.5°C/±1°C (typ./max.) from -20°C to +125°C
Typical Applications
Local
Temperature
Sensor
•
•
•
•
•
Or
Board
management
Controller
Total Number of
Sensors is Application
Dependent
Or
Any other
I2C/SMBus
Master Device
MCH
Timeout supported in all Modes
– Active mode
– Shutdown mode
Schmitt trigger and noise filtering on bus inputs
2-wire Serial Interface: 10-400 kHz I2C™ /SMBus™
Available Packages: DFN-8, TDFN-8
Temperature Sensor Features
The sensor uses an industry standard 2-wire, I2C/SMBus serial
interface, and allows up to eight devices to be controlled on the bus.
EVENT
Temperature Sensor
Single Supply: 3V to 3.6V
Accurate timeout support
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Description
DIMM Modules (DDR2, DDR3), SSD Boards
Servers, Laptops, Ultra-portables, PC Boards
High end audio / video equipment
Portable devices
Hard Disk Drives and Other PC Peripherals
SMBus
EVENT
Local
Temperature
Sensor
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
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*Notice: The information in this document is subject to change without notice
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Block Diagram: Temperature Sensor
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Maximum Ratings
Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress
ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Symbol
Parameter
Min.
Max.
Units
-65
150
°C
TSTG
Storage Temperature
VIO
Input or output range, SA0
-0.50
10
V
Input or output range, other pins
-0.50
4.3
V
Supply Voltage
-0.5
4.3
V
VDD
DC and AC Parameters
This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC
and AC Characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables.
Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. DC
Characteristics
Operating Conditions
Symbol
VDD
TA
Parameter
Supply Voltage
Ambient operating temperature
Min.
Max.
Units
3
3.6
V
-20
125
°C
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Absolute Maximum Ratings
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AC Measurement Conditions
Symbol
CL
Parameter
Min.
Load capacitance
Max.
Units
100
Input rise and fall times
pF
50
ns
Input levels
0.2*VDD to 0.8*VDD
V
Input and output timing reference levels
0.3*VDDto 0.7*VDD
V
Input Parameters for the TS3000B3A
Symbol
Parameter1,2
Test Condition
Min.
Max.
Units
CIN
Input capacitance (SDA)
8
pF
CIN
Input rise and fall times
6
ns
ZEIL
Ei (SA0,SA1,SA2) input impedance
VIN< 0.3* VDD
30
kΩ
ZEIH
Ei (SA0,SA1,SA2) input impedance
VIN> 0.7* VDD
800
kΩ
tSP
Pulse width ignored (input filter on
SCL and SDA)
Single glitch, f < 100 KHz
100
Single glitch, f> 100 KHz
50
ns
1.TA=25°C, f=400 kHz
2.Verified by design and characterization not necessarily tested on all devices
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AC Measurement I/O Waveform
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Parameter
Symbol
Conditions
Min.
Max.
Units
Input Leakage Current (SCL, SDA)
ILI
VIN = VSS or VDD
±5
μA
Output Leakage Current
ILO
VOUT = VSS or VDD,
SDA in Hi-Z
±5
μA
Supply Current, temp sensor active
IDD
VDDSPD = 3.3 V, fC = 100 kHz
(rise/fall time < 30 ns)
0.5
mA
Standby Supply Current
IDD1
VIN = VSS or VDD,
VDD= 3.6 V
100
μA
Input Low Voltage (SCL, SDA)
VIL
-0.5
0.3*VDD
V
Input High Voltage (SCL, SDA)
VIH
0.7* VDD
VDD +1
V
SA0 High Voltage
VHV
VHV - VDD > 4.8 V
7
10
V
Output Low Voltage
VOL
IOL = 2.1 mA,
3 V =< VDD =< 3.6 V
0.4
V
IOL = 0.7 mA,
VDD = 1.7 - 3.6 V
0.2
V
__
V
Input hysteresis
VHYST
VDD> 2.2V
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DC Characteristics
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AC Characteristics
VDD > 2.2 V
Symbol
Min.
Max.
Units
Clock Frequency
fSCL
10
400
kHz
Clock Pulse Width High Time
tHIGH
600
ns
Clock Pulse Width Low Time
tLOW5
1300
ns
Detect clock low timeout, Capabilities
Register bit 6 =1
tTIMEOUT
SDA Rise Time
tR2
SDA Fall Time
2
tF
6
25
20
35
ms
300
ns
300
ns
Data In Setup Time
tSU:DAT
100
ns
Data In Hold Time
tHD:DI
0
ns
Data Out Hold Time
tHD:DAT
200
Start Condition Setup Time
tSU:STA
1
600
ns
Start Condition Hold Time
tHD:STA
600
ns
Stop Condition Setup Time
tSU:STO
600
ns
tBUF
1300
ns
Time Between Stop Condition and Next
Start Condition
Write Time
900
10
tW
ns
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Parameter
ms
1. For a RESTART condition, or following a write cycle.
2. Guaranteed by design and characterization, not necessarily tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between falling edge of SCL and the falling or
rising edge of SDA.
4. The TS3000B3A does not initiate clock stretching which is an optional I2C bus feature
5. Devices participating in a transfer can abort the transfer in progress and release the bus when any single clock low interval
exceeds the value of tTIMEOUT,MIN. After the master in a transaction detects this condition, it must generate a stop condition
within or after the current data byte in the transfer process. Devices that have detected this condition must reset their
communication and be able to receive a new START condition no later than tTIMEOUT,MAX. Typical device examples include
the host controller and embedded controller and most devices that can master the SMBus. Some devices do not contain a clock
low drive circuit; this simple kind of device typically may reset its communications port after a start or stop condition. A
timeout condition can only be ensured if the device that is forcing the timeout holds SCL low for tTIMEOUT,MAX or longer.
6. The temperature sensor family of devices are not required to support the SMBus ALERT function.
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Temperature-to-Digital Conversion Performance
Parameter
Min
Temperature Sensor Accuracy
Typ
Max
Unit
±0.5
±1.0
°C
Test Conditions1
-20°C < TA < 125°C
1. VDDMIN < VDD < VDDMAX
Temperature Conversion Time
Resolution
ADC Setting
tCONV (typ)
tCONV (Max)
Unit
9 bit
100
ms
0.25°C (POR default)
10 bit
100
ms
0.125°C
11 bit
100
ms
0.0625°C
12 bit
100
ms
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0.5°C
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Pin Assignment
SA0
1
8
VDD
SA1
SA2
VSS
2
3
4
7
6
5
EVENT
SCL
SDA
Pin Description
Pin Name
Definition
1
SA0
Select Address 0
2
SA1
Select Address 1
3
SA2
Select Address 2
4
VSS
Ground
5
SDA
Serial Data In
6
SCL
Serial Clock In
7
EVENT
8
VDD
Temperature Event Out
Supply Voltage
Pin Functional Descriptions
Serial Clock (SCL)
This input signal is used to strobe all data in and out of the device. In applications where this signal is used by slave devices to synchronize the bus
to a slower clock, the bus master must have an open drain output, and a pull-up resistor can be connected from Serial Clock (SCL) to VDD. (refer to
the Maximum RL Value vs. Bus Capacitance figure on how the value of the pull-up resistor can be calculated). In most applications, though, this
method of synchronization is not employed, and so the pull-up resistor is not necessary, provided that the bus master has a push-pull (rather than
open drain) output.
Serial Data (SDA)
This bi-directional signal is used to transfer data in or out of the device. It is an open drain output that may be wire-ORed with other open drain or
open collector signals on the bus. A pull up resistor must be connected from Serial Data (SDA) to the most positive VDD in the I2C chain. (refer to the
Maximum RL Value vs. Bus Capacitance figure on how the value of the pull-up resistor can be calculated).
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Select Address (SA0, SA1, SA2)
These input signals are used to set the value that is to be looked for on the three least significant bits (b3, b2, b1) of the 7-bit Slave Address. In the
end application, SA0, SA1 and SA2 must be directly (not through a pull-up or pull-down resistor) connected to VDD or VSS to establish the Slave
Address. When these inputs are not connected, an internal pull-down circuitry makes (SA0, SA1, SA2) = (0, 0, 0).
EVENT
The TS3000B3A EVENT pin is an open drain output that requires a pull-up to VDD on the system motherboard or integrated into the master
controller. The TS3000B3A EVENT pin has three operating modes, depending on configuration settings and any current out-of-limit conditions. These
modes are Interrupt, Comparator, or TCRIT Only.
In Interrupt Mode the EVENT pin will remain asserted until it is released by writing a '1' to the “Clear Event” bit in the Status Register. The value to
write is independent of the EVENT polarity bit.
In Comparator Mode the EVENT pin will clear itself when the error condition that caused the pin to be asserted is removed. When the temperature
is compared against the TCRIT limit, then this mode is always used.
Finally, in the TCRIT Only Mode the EVENT pin will only be asserted if the measured temperature exceeds the TCRIT Limit. Once the pin has been
asserted, it will remain asserted until the temperature drops below the TCRIT Limit minus the TCRIT hysteresis. The next figure illustrates the operation of the different modes over time and temperature.
Systems that use the active high mode for EVENT must be wired point to point between the TS3000B3A and the sensing controller. Wire-OR
configurations should not be used with active high EVENT since any device pulling the EVENT signal low will mask the other devices on the bus. Also
note that the normal state of EVENT in active high mode is a 0 which will continually draw power through the pull-up resistor.
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Maximum RL Value vs. Bus Capacitance (CBUS) for an I2C Bus
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EVENT Pin Mode Functionality
Event Thresholds
All event thresholds use hysteresis as programmed in register 0x01 bits 10:9 to set when they deassert (stop driving).
Alarm Window Trip
The device provides a comparison window with an upper temperature trip point in the Alarm Upper Boundary Register, and a lower trip point in the
Alarm Lower Boundary Register. When enabled, the EVENT# output will be triggered whenever entering, or exiting (crossing above or below) the
Alarm Window.
Critical Window Trip
The device can be programmed in such a way that the EVENT# output is only triggered when the temperature exceeds critical trip point. The Critical temperature setting is programmed in Critical Temperature Register. When the temperature sensor reaches the critical temperature value in this
register, the device is automatically placed in comparator mode meaning that the Critical Event output cannot be cleared through software setting the
“Clear Event” bit.
Interrupt Mode
After an Event occurs, Software may write a one (‘1’) to the “Clear Event” bit in the Configuration Register to de-assert the EVENT# Interrupt
output, until the next trigger condition occurs.
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Comparator Mode
Reads/writes on the device registers will not affect the EVENT# output in comparator mode. The EVENT# signal will remain asserted until the
temperature drops outside the range, or the range is re-programmed such that the current temperature is outside the range.
Serial Communications
The TS3000B3A temperature sensor circuitry continuously monitors the temperature and updates the temperature data minimum of eight times
per second. Temperature data is latched internally by the device and may be read by software from the bus host at any time.
Internal registers are used to configure both the TS performance and response to over-temperature conditions. The device contains programmable
high, low, and critical temperature limits. Finally, the device EVENT pin can be configured as active high or active low and can be configured to operate
as an interrupt or as a comparator output.
Device Diagram
VDD
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SA2
SA1
SA0
TS3000B3A
TS3000B2
SCL
SDA
EVENT
VSS
SMBus/I2C Communications
The data registers in this device are selected by the Pointer Register. At power-up the Pointer Register is set to “00”, the location for the Capability
Register. The Pointer Register latches the last location it was set to. Each data register falls into one of three types of user accessibility:
1. Read only
2. Write only
3. Write/Read same address
A Write to this device will always include the address byte and the pointer byte. A write to any register, other than the pointer register, requires two
data bytes.
Reading this device can take place either of two ways:
If the location latched in the Pointer Register is correct (most of the time it is expected that the Pointer Register will point to one of the Read
Temperature Registers because that will be the data most frequently read), then the read can simply consist of an address byte, followed by retrieving
the two data bytes.
If the Pointer Register needs to be set, then an address byte, pointer byte, repeat start, and another address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, this device can accept either Acknowledge (Ack) or No Acknowledge (No Ack)
from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte).
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SMBus/I2C write to the pointer register
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SMBus/I2C write to the pointer register followed by a write data word
SMBus/I2C word read from register with a preset pointer
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SMBus/I2C Slave Sub-Address Decoding
The physical address for TS is different than that used by current SPD devices. The physical address for thermal sensor is “0 0 1 1 A2 A1 A0 RW”
in binary, where A2, A1, A0 are the three slave sub-address pins, and the least significant bit “RW” is the Read/Write flag.
Assuming the slave base address of the SPD+TS interface is fixed, for example at 0x30, then the pins set the sub-address bits of the slave
address, allowing the device to be located anywhere within 8 slave address locations, for example from 0x30 to 0x3E.
Slave Address Decoding
Slave Address
A2
A1
A0
x0
0
0
0
x2
0
0
1
x4
0
1
0
x6
0
1
1
x8
1
0
0
xA
1
0
1
xC
1
1
0
xE
1
1
1
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SMBus/I2C write to pointer register followed by a repeat start and an immediate data word read
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The meaning of the A0/A1/A2 pin states is as follows:; 0= Pull-down to Thermal Sensor Vss, 1=Pull-up to Thermal Sensor VDD
SMBus/I2 AC Timing Consideration
In order for this device to be both SMBus and I2C compliant, the device complies with a subset of each specification. This requires a few minor
considerations to ensure interoperability. The time out requirements of SMBus are optional for this device. The minimum clock frequency of SMBus is
a required feature. Note that the minimum data hold time (THD:DAT) of 200 ns is smaller than the 300 ns of the SMBus specification. With these minor
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considerations, this device is capable of co-existing with devices on either an SMBus or an I2C bus.
TS Register Set Definition
The register set address are shown in the Acknowledge When Writing Data or Defining Write Protection table. These values are used in the I2C
operations as the “REG_PTR” as shown in previous figures.
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Temperature Register Addresses
R/W
Name
N/A
W
Address Pointer
00
R
Capabilities
01
R/W
Configuration
02
R/W
03
Function
Default
Address storage for subsequent operations
Undefined
Indicates the functions and capabilities of the
temperature sensor
004F
Controls the operation of the temperature monitor
0000
High Limit
Temperature High Limit
0000
R/W
Low Limit
Temperature Low Limit
0000
04
R/W
TCRIT Limit
Critical Temperature
0000
05
R
Ambient Temperature
Current Ambient temperature
N/A
06
R
Manufacturer ID
PCI-SIG manufacturer ID
00B3
07
R
Device/Revision
Device ID and Revision number
2903
08
R/W
Resolution Register
Allows changing temperature sensor resolution
000F
Capabilities Register
The Capabilities Register indicates the supported features of the temperature sensor.
Capabilities Register
ADDR
R/W
00
R
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
Default
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
004F
EVSD
TMOUT
X
RANGE
ACC
EVENT
TRES[1:0]
Bits 15 - Bit 8 – RFU; Reserved for future use. These bits will always read '0' and writing to them will have no affect.
Bit 7- EVSD-EVENT with Shutdown action.
‘0’ - (default) The EVENT output freezes in its current state when entering shutdown. Upon exiting shutdown, the EVENT output remains in the
previous state until the next thermal sample is taken, or possibly sooner if EVENT is programmed for comparator mode.
‘1’ The EVENT output is deasserted (not driven) when entering shutdown and remains deasserted upon exit from shutdown until the next thermal
sample is taken, or possibly sooner if EVENT is programmed for comparator mode.
Bit 6 - TMOUT – Bus timeout period for thermal sensor access during normal operation. Note that the TS3000B3A supports timeout in both active
and shutdown mode for temperature sensor and SPD (EEPROM) portions of the device.
‘0’ - Parameter tTIMEOUT is supported within the range of 10 to 60 ms.
‘1’ - (default) Parameter tTIMEOUT is supported within the range of 25 to 35 ms (SMBus compatible).
Bit 5 - X – May be 0 or 1; applications must accept either code. (Default =0)
Bits 4 - 3 – TRES[1:0]; Indicates the resolution of the temperature monitor as shown in the TRES Bit Decode table. (Default =01)
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TRES Bit Decode
TRES[1:0]
Temperature Resolution
1
0
0
0
0.5°C (9-bit)
0
1
0.25°C (10-bit) (default)
1
0
0.125°C (11-bit)
1
1
0.0625°C (12-bit)
Note: Refer to section Resolution Register on page 19.
Bit 2 - RANGE; Indicates the supported temperature range.
'0' - The temperature monitor clamps values lower than 0 °C.
'1' (default) - The temperature monitor can read temperatures below 0 °C and sets the sign bit appropriately.
'0' - The temperature monitor has ±2 °C accuracy of the active range (75 °C to 95 °C) and 3 °C accuracy over the entire operating range.
'1' (default) - Bgrade. The temperature monitor has ±1 °C accuracy
Bit 0 - EVENT; Indicates whether the temperature monitor supports interrupt capabilities
'0'.-The device does not support interrupt capabilities.
'1' (default); The device supports interrupt capabilities.
Configuration Register
Configuration Register
ADDR
R/W
01
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
RFU
RFU
RFU
RFU
RFU
TCRIT_
LOCK
EVENT_
LOCK
CLEAR
EVENT_
STS
EVENT_
CTRL
B10/B2
B9/B1
HYST[1:0]
TCRIT_
ONLY
EVENT_
POL
B8/B0
Default
SHDN
EVENT_
MODE
0000
The Configuration Register holds the control and status bits of the EVENT pin as well as general hysteresis on all limits.
Bits 15 - 11 – RFU; Reserved for future use. These bits will always read '0' and writing to them will have no affect. For future compatibility, all RFU
bits must be programmed as '0'.
Bits 10 - 9 – HYST[1:0]; Control the hysteresis that is applied to all limits as shown in the HYST Bit Decode table that follows. This hysteresis
applies to all limits when the temperature is dropping below the threshold so that once the temperature is above a given threshold, it must drop below
the threshold minus the hysteresis in order to be flagged as an interrupt event. Note that hysteresis is also applied to EVENT pin functionality. When
either of the lock bits is set, these bits cannot be altered.
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Bit 1 - ACC; Indicates the supported temperature accuracy.
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Hysteresis
TU= Value stored in Alarm Temperature Upper Boundary Trip Register
TL=Value stored in Alarm Temperature Lower Boundary Trip Register
Hyst= Absolute value of selected hysteresis
Temperature Register Value Definitions
Temperatures in the High Limit Register, Low Limit Register, TCRIT Register, and Temperature Data Register are expressed in two's complement
format. Bits B 12 through B2 for each of these registers are defined for all device resolutions as defined in the TRES field of the Capabilities Register,
hence a 0.25°C minimum granularity is supported in all registers. Examples of valid settings and interpretation of temperature register bits:
Temperature Register Coding Examples
B15~B0 (binary)
Value
Units
xxx0 0000 0010 11xx
+2.75
°C
xxx0 0000 0001 00xx
+1.00
°C
xxx0 0000 0000 01xx
+0.25
°C
xxx0 0000 0000 00xx
0
°C
xxx1 1111 1111 11xx
-0.25
°C
xxx1 1111 1111 00xx
-1.00
°C
xxx1 1111 1101 01xx
-2.75
°C
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The TRES field of the Capabilities Register optionally defines higher resolution devices. For compatibility and simplicity, this additional resolution
affects only the Temperature Data Register but none of the Limit Registers. When higher resolution devices generate status or EVENT changes, only
bits B12 through B2 are used in the comparison; however, all 11 bits (TRES[1-0] = 10) or all 12 bits (TRES[1-0] = 11) are visible in reads from the
Temperature Data Register.
When a lower resolution device is indicated in the Capabilities Register (TRES[1-0] = 00), the finest resolution supported is 0.5°C. When this is
detected, bit 2 of all Limit Registers should be programmed to 0 to assure correct operation of the temperature comparators.
High Limit Register
The temperature limit registers (High, Low, and TCRIT) define the temperatures to be used by various on-chip comparators to determine device
temperature status and thermal EVENTs. For future compatibility, unused bits “-” must be programmed as 0.
High Limit Register
R/W
02
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
–
–
–
Sign
128
64
32
16
8
4
2
1
0.5
0.25
–
–
Default
0000
The High Limit Register holds the High Limit for the nominal operating window. When the temperature rises above the High Limit, or drops below or
equal to the High Limit, then the EVENT pin is asserted (if enabled). If the EVENT_LOCK bit is set as shown in the Configuration Register table), then
this register becomes read-only.
Low Limit Register
Low Limit Register
ADDR
R/W
03
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
–
–
–
Sign
128
64
32
16
8
4
2
1
0.5
0.25
–
–
Default
0000
The Low Limit Register holds the lower limit for the nominal operating window. When the temperature drops below the Low Limit or rises up to meet
or exceed the Low Limit, then the EVENT pin is asserted (if enabled). If the EVENT_LOCK bit is set as shown in the Configuration Register, then this
register becomes read-only.
TCRIT Limit Register
TCRIT Limit Register
ADDR
R/W
04
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
–
–
–
Sign
128
64
32
16
8
4
2
1
0.5
0.25
–
–
Default
0000
The TCRIT Limit Register holds the TCRIT Limit. If the temperature exceeds the limit, the EVENT pin will be asserted. It will remain asserted until
the temperature drops below or equal to the limit minus hysteresis. If the TCRIT_LOCK bit is set as shown in the Configuration Register table, then
this register becomes read-only.
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Temperature Data Register
Temperature Data Register
ADDR
R/W
05
R
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
TCRIT
HIGH
LOW
Sign
128
64
32
16
8
4
2
1
0.5
0.25*
0.125*
0.0625*
Default
N/A (0000)
* Resolution defined based on value of TRES field of the Capabilities Register. Unused/unsupported bits will read as 0.
The Temperature Data Register holds the 10-bit + sign data for the internal temperature measurement as well as the status bits indicating which
error conditions, if any, are active. The encoding of bits B 12 through B0 is the same as for the temperature limit registers.
Bit 15 – TCRIT; When set, the temperature is above the TCRIT Limit. This bit will remain set so long as the temperature is above TCRIT and will
automatically clear once the temperature has dropped below the limit minus the hysteresis.
Bit 13 – LOW; When set, the temperature is below the Low Limit. This bit will remain set so long as the temperature is below the Low Limit minus
the hysteresis. Once set, it will only be cleared when the temperature meets or exceeds the Low Limit.
Manufacturer ID Register
Manufacturer ID Register
ADDR
R/W
06
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
0
0
0
0
0
0
0
0
1
0
1
1
0
0
1
1
Default
00B3
The Manufacturer ID Register holds the PCI SIG number assigned to the specific manufacturer.
Device ID/Revision Register
Device ID/Revision Register
ADDR
R/W
07
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
0
0
1
0
1
0
0
1
0
0
0
0
0
0
1
1
Default
2903
The upper byte of the Device ID / Revision Register stores a unique number indicating the TS3000B3A from other devices.
The lower byte holds the revision value.
Resolution Register
This register allows the user to change the resolution of the temperature sensor. The POR default resolution is 0.25°C. The resolution implemented via this register is also reflected in the capability register.
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Advance Information
Bit 14 – HIGH; When set, the temperature is above the High Limit. This bit will remain set so long as the temperature is above the HIGH limit. Once
set, it will only be cleared when the temperature drops below or equal to the HIGH Limit minus the hysteresis.
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Resolution Register
ADDR
R/W
B15/B7
B14/B6
B13/B5
B12/B4
B11/B3
B10/B2
B9/B1
B8/B0
Default
Value
08h
R/W
0
0
0
0
0
0
0
0
000F
0
0
0
TRES[1]
TRES[0]
1
1
1
Legend:
Resolution bits 4-3 TRES[4:3]
00 = LSB = 0.5°C (register value = 0007)
01 = LSB = 0.25°C (register value = 000F)
10 = LSB = 0.125°C (register value = 0017)
11 = LSB = 0.0625°C (register value = 001F)
Advance Information
Conversion times for each resolution are less than 100ms (worst case).
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Ordering Information
TS
XXXX
X
X
X
XXX
X
Device Type
Temp
Voltage
Range
Rev.
Package
Shipping
Carrier
8
NCG
NRG
Tape and Reel
Green TDFN (2.0 x 3.0mm body, 0.75mm thick)
Green DFN (2.0 x 3.0mm body, 0.90mm thick)
3
(3V to 3.6V)
B
Temperature Accuracy Grade (±1.0°C Max)
3000
Temperature Sensor
Example: TS3000B3A NRG8
®
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
800-345-7015 or 408-284-8200
fax: 408-284-2775
www.idt.com
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for Tech Support:
email: memorymodule-help@idt.com
phone: 408-284-8208
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Advance Information
A
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