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V386G

V386G

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    TSSOP56

  • 描述:

    IC RECEIVER 8BIT LVDS 56TSSOP

  • 数据手册
  • 价格&库存
V386G 数据手册
V386 8-BIT LVDS RECEIVER FOR VIDEO General Description Features The V386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to 2.38 Gbps throughput or 297.5 Mbytes per second. • Packaged in a 56-pin TSSOP (Pb free available) • Converts 4-pair LVDS data streams into parallel 28 This chip is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces through very low-swing LVDS signals. ICS manufactures a large variety of video application devices. Consult ICS for all of your video application requirements. Pin Assignments D22 D23 D24 GND D25 D26 D27 LVDSGND RX0RX0+ RX1RX1+ LVDSVCC LVDSGND RX2RX2+ RCKRCK+ RX3RX3+ LVDSGND PLLGND PLLVCC PLLGND PWRDWN CLKOUT D0 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VCC D21 D20 D19 GND D18 D17 D16 VCC D15 D14 D13 GND D12 D11 D10 VCC D9 D8 D7 GND D6 D5 D4 D3 VCC D2 D1 bits of CMOS/TTL data • Up to 2.38 Gbps throughput or 297.5 Megabytes/sec bandwidth • Wide clock frequency range from 25 MHz to 85 MHz (for lower frequency requirements, please use V386-2) • • • • • • • • Supports VGA, SVGA, XGA, and SXGA LVDS voltage swing of 350 mV for low EMI On-chip PLL requires no external components Single 3.3 V low-power CMOS design Falling edge clock triggered outputs Power-down control function Compatible with TIA/EIA-644 LVDS standards Pin and function compatible with the National DS90CF386, THine THC63LVDF84, TI SN65LVDS94 Block Diagram RX0+ 8 RX0- 8 GREEN RX1+ 8 BLUE RX1RX2+ LVDS to TTL De-serializer RED HSYNC VSYNC RX2- DATA ENABLE RX3+ CONTROL RX3- CLOCK RCK+ PLL RCKPWRDWN V386 56-pin TSSOP V386 V386 Datasheet 1 10/20/04 Revision 1.7 I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m V386 8-BIT LVDS RECEIVER FOR VIDEO Pin Descriptions Pin Type Pin Count Pins Pin Description/Name LVDS Differential Input 10 9, 10, 11, 12, 15, 16, 17, 18, 19, 20 8 pins (4 pairs) for Data inputs (RX0+, RX0- ; RX1+, RX1- ; RX2+, RX2- ;RX3+, RX3-) 2 pins (1 pair) for Clock Inputs (RCK+, RCK-) Data Output 28 1, 2, 3, 5, 6, 7, 27, 29, 30, 32, 33, 34, 35, 37, 38, 39, 41, 42, 43, 45, 46, 47, 49, 50, 51, 53, 54, 55 Data outputs on pins D0 through D27 Clock Output 1 26 CLKOUT VCC 6 13, 23, 31, 40, 48, 56 1 pin for LVDS input pairs (LVDSVCC) 1 pin for PLL (PLLVCC) 4 pins for Logic and Data outputs (VCC) Power Down 1 25 Power-down control input (PWRDWN) Active low Ground 10 4, 8, 14, 21, 22, 24, 28, 36, 44, 5 3 pins for LVDS input pairs (LVDSGND) 2 pins for PLL (PLLGND) 5 pins for Logic and Data outputs (GND) External Components The V386 require no external components. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the V386. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VCC -0.3 V to +4 V CMOS/TTL Output Voltage -0.3 V to (VCC+0.3 V) LVDS Receiver Input Voltage -0.3 V to (VCC+0.3 V) Ambient Operating Temperature 0 to +70°C Storage Temperature -65 to +150°C Junction Temperature 150°C Soldering Temperature (20 seconds max.) 260°C Maximum Package Power 1.61 W (V386) Package Derating 12.4 mW/°C above +25°C 15 mW/°C above +25°C V386 Datasheet 2 10/20/04 Revision 1.7 I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m V386 8-BIT LVDS RECEIVER FOR VIDEO Recommended Operation Conditions Parameter Min. Typ. Max. Units Ambient Operating Temperature (Ta) 0 25 +70 °C 3.3 V Supply Voltage (VCC) 3 3.3 3.6 V 8 pF 2.4 V 100 mVpp CMOS/TTL Output Load (CL) Receiver Input Range (VIN) 0 Supply Noise Voltage (VN) Electrical Characteristics VDD=3.3 V ±10%, Ambient temperature 0 to +70°C Parameter Symbol Conditions Min. Typ. Max. Units CMOS/TTL DC Specifications Input High Voltage VIH 2.0 VCC V Input Low Voltage VIL GND 0.8 V Output High Voltage VOH IOH = -4 mA 2.4 VCC V Output Low Voltage VOL IOL = 2 mA 0.4 V Input Current IIN 0
V386G 价格&库存

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