®
RT5753A/B
3A, 1.2MHz, 5.5V Synchronous Step-Down Converter
In WDFN-8L 2x2
General Description
Features
The RT5753A/B is a simple, easy-to-use, 3A synchronous
step-down DC-DC converter with an input supply voltage
range from 2.5V to 5.5V. The device builds in an accurate
0.6V reference voltage and integrates low RDS(ON) power
MOSFETs to achieve high efficiency in WDFN-8L 2x2 and
WDFN-8SL 2x2 packages.
The RT5753A/B adopts Advanced Constant On-Time
(ACOT®) control architecture to provide an ultrafast
transient response with few external components and to
operate in nearly constant switching frequency over the
line, load, and output voltage range. The RT5753A operates
in automatic PSM that maintains high efficiency during
light load operation. The RT5753B operates in Forced
PWM that helps to meet tight voltage regulation accuracy
requirements.
The RT5753A/B senses both FETs current for a robust
over-current protection. The device features cycle-by-cycle
current limit protection which prevents the device from
the catastrophic damage in output short circuit, over current
or inductor saturation. A built-in soft-start function prevents
inrush current during start-up. The device also includes
input under-voltage lockout, output under-voltage
protection, over-voltage protection (RT5753AL/BL) and
over-temperature protection to provide safe and smooth
operation in all operating conditions.
Input Voltage Range from 2.5V to 5.5V
Ω and 70mΩ
Ω FETs
Integrated 100mΩ
100% Duty Cycle for Lowest Dropout
Internal Reference Voltage with 1% Accuracy
1.2MHz Typical Switching Frequency
Power Saving Mode for Light Loads (RT5753A)
Advanced Constant On-Time (ACOT®) Control
Internal Soft Startup (1.5ms)
Enable Control Input
Power Good Indicator
Both FETs Over-Current Protection
Negative Over-Current Protection (RT5753B)
Input Under-Voltage Lockout Protection
Output Under-Voltage Protection
Over-Temperature Protection
RoHS Compliant and Halogen Free
Applications
Mobile Phones and Handheld Devices
STB, Cable Modem, and xDSL Platforms
WLAN ASIC Power / Storage (SSD and HDD)
General Purpose for POL LV Buck Converters
Simplified Application Circuit
RT5753A/B
VIN
VIN
RPG
SW
L
VOUT
CIN
RFB1
VPG
CFF
COUT
PG
Chip Enable
FB
EN
AGND
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DS5753A/B-01 November 2020
PGND
RFB2
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1
RT5753A/B
Ordering Information
Pin Configuration
RT5753A/B
Lead Plating System
G : Green (Halogen Free and Pb Free)
FB
1
PG
2
VIN
3
PGND
UVP Option
H : Hiccup
L : Latched-Off
PGND
(TOP VIEW)
Package Type
QW : WDFN-8L 2x2 (W-Type)
QWA : WDFN-8SL 2x2 (W-Type)
(Exposed Pad-Option 2)
9
4
8
AGND
7
EN
6
SW
5
NC
WDFN-8L 2x2/WDFN-8SL 2x2
PWM Operation Mode
A : Automatic PSM
B : Forced PWM
Note :
Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT5753AHGQW
54 : Product Code
54W
W : Date Code
RT5753AHGQWA
5K : Product Code
5KW
RT5753ALGQWA
RT5753ALGQW
51 : Product Code
W : Date Code
51W
RT5753BHGQW
4Z : Product Code
4ZW
W : Date Code
5J : Product Code
5JW
W : Date Code
RT5753BHGQWA
5H : Product Code
5HW
W : Date Code
RT5753BLGQWA
RT5753BLGQW
4Y : Product Code
4YW
W : Date Code
W : Date Code
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2
5G : Product Code
5GW
W : Date Code
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DS5753A/B-01 November 2020
RT5753A/B
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
FB
Output voltage sense. Sense the output voltage at the FB pin through a
resistive divider. The feedback reference voltage is 0.6V typically.
2
PG
Open-drain power-good indicator output. Once being started-up, PG will be
pulled low to ground if any internal protection is triggered.
3
VIN
Power input. The input voltage range is from 2.5V to 5.5V. Connect a
suitable input capacitor between this pin and PGND pins, usually one 22F
or higher than 22F ceramic capacitors is recommended.
PGND
Power ground. The exposed pad is internally unconnected which must be
soldered to a large PCB cooper area and connected to PGND for maximum
power dissipation.
5
NC
No internal connection. Keep this pin floating.
6
SW
Switch node between the internal switch and the synchronous rectifier.
Connect this pin to the inductor.
7
EN
Enable control input. Connect this pin to logic high enables the device and
connect this pin to ground disables the device.
8
AGND
Analog ground.
4, 9
(Exposed Pad)
Functional Block Diagram
EN
*OVP : OVP is designed for RT5753A/BL
VIN
UVLO
Shutdown
Control
OTP
*OVP
FB
Error Amplifier
+
+
FB
VREF
PG
Comparator
+
-
Ramp
Generator
SW
90%VREF
VFB
FB
UV
TON
Logic
Control
Current
Limit
Detector
Driver
SW
VIN
SW
PGND
SW
Discharge
Resistor
+
AGND
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS5753A/B-01 November 2020
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3
RT5753A/B
Operation
The RT5753A/B is a high-efficiency, synchronous stepdown DC-DC converter that delivers up to 3A output current
from a 2.5V to 5.5V input supply.
Advanced Constant On-Time Control and PWM
Operation
The RT5753A/B adopts ACOT® control for its ultrafast
transient response, low external component counts and
stable with low ESR MLCC output capacitors. When the
feedback voltage falls below the feedback reference
voltage, the minimum off-time one-shot (90ns, typ.) has
timed out and the inductor current is below the current
limit threshold, then the internal on-time one-shot circuitry
is triggered and the high-side switch is turned on. Since
the minimum off-time is short, the device exhibits ultrafast
transient response and enables the use of smaller output
capacitance.
The on-time is inversely proportional to input voltage and
directly proportional to output voltage to achieve pseudofixed frequency over the input voltage range. After the ontime one-shot timer is expired, the high-side switch is
turned off and the low-side switch is turned on until the
on-time one-shot is triggered again. In the steady state,
the error amplifier compares the feedback voltage VFB and
an internal reference voltage. If the virtual inductor current
ramp voltage is lower than the output of the error amplifier,
a new pre-determined fixed on-time will be triggered by
the on-time one-shot generator.
Power Saving Mode
The RT5753A automatically enters power saving mode
(PSM) at light load to maintain high efficiency. As the
load current decreases and eventually the inductor current
ripple valley touches the zero current, which is the
boundary between continuous conduction and
discontinuous conduction modes. The low-side switch is
turned off when the zero inductor current is detected. As
the load current is further decreased, it takes longer time
to discharge the output capacitor to the level that requires
the next on-time. The switching frequency decreases and
is proportional to the load current to maintain high
efficiency at light load.
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4
Enable Control
The RT5753A/B provides an EN pin, as an external chip
enable control, to enable or disable the device. If VEN is
held below a logic-low threshold voltage (VEN_L) of the
enable input (EN), the converter will disable output voltage,
that is, the converter is disabled and switching is inhibited
even if the VIN voltage is above VIN under-voltage lockout
threshold (VUVLO). During shutdown mode, the supply
current can be reduced to ISHDN (15μA or below). If the EN
voltage rises above the logic-high threshold voltage (VEN_H)
while the VIN voltage is higher than UVLO threshold, the
device will be turned on, that is, switching being enabled
and soft-start sequence being initiated.
Soft-Start (SS)
The RT5753A/B provides an internal soft-start feature for
inrush control. At power up, the internal capacitor is
charged by an internal current source to generate a softstart ramp voltage as a reference voltage to the PWM
comparator. The device will initiate switching and the
output voltage will smoothly ramp up to its targeted
regulation voltage only after this ramp voltage is greater
than the feedback voltage VFB to ensure the converters
have a smooth start-up from pre-biased output. The output
voltage starts to rise in 220μs(Typ.) from EN rising, and
the soft-start ramp-up time (0%VOUT to 95%VOUT) is
1.5ms(Typ.).
VIN
EN
1.5ms
220µs
95%VOUT
0%VOUT
SS END
VOUT
SS
(Internal)
2.5ms
PG
Figure 1. Start-Up Sequence
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DS5753A/B-01 November 2020
RT5753A/B
Maximum Duty Cycle Operation
The RT5753A/B is designed to operate in dropout at the
high duty cycle approaching 100%. If the operational duty
cycle is large and the required off-time becomes smaller
than minimum off-time, the RT5753A/B starts to enable
skip off-time function and keeps high-side MOSFET switch
on continuously. The RT5753A/B implements skip off-time
function to achieve high duty approaching 100%. Therefore,
the maximum output voltage is near the minimum input
supply voltage of the application for input voltage
momentarily falls down to the normal output voltage
requirement. The input voltage at which the devices enter
dropout changes depending on the input voltage, output
voltage, switching frequency, load current, and the
efficiency of the design.
Power Good Indication
The RT5753A/B features an open-drain power-good output
(PG) to monitor the output voltage status. The output delay
of comparator prevents false flag operation for short
excursions in the output voltage, such as during line and
load transients. Pull-up PG with a resistor to VIN or an
external voltage below 5.5V. When VIN voltage rises above
VUVLO, the power-good function is activated. After softstart is finished, the PG pin is controlled by a comparator
connected to the feedback signal VFB. If VFB rises above
a power-good high threshold (VTH_PGLH) (typically 90% of
the reference voltage), the PG pin will be in high impedance
and VPG will be held high. When VFB falls short of powergood low threshold (VTH_PGHL) (typically 85% of the
reference voltage), the PG pin will be pulled low. Once
being started-up, if any internal protection is triggered,
PG will be pulled low to GND. The internal open-drain pulldown device will pull the PG pin low. The power good
indication profile is shown below.
Table 1. PG Pin Status
Conditions
PG Pin
VEN > VEN_H,
VFB > VTH_PGLH
High Impedance
VEN > VEN_H,
VFB < VTH_PGHL
Low
Shutdown
VEN < VEN_L
Low
OTP
TJ > TSD
Low
Enable
Input Under-Voltage Lockout
In addition to the EN pin, the RT5753A/B also provides
enable control through the VIN pin. If VEN rises above VENH
first, switching will still be inhibited until the VIN voltage
rises above VUVLO. It is to ensure that the internal regulator
is ready so that operation with not-fully-enhanced internal
MOSFET switches can be prevented. After the device is
powered up, if the input voltage VIN goes below the UVLO
falling threshold voltage (VUVLO − ΔVUVLO), this switching
will be inhibited; if VIN rises above the UVLO rising
threshold (VUVLO), the device will resume normal operation
with a complete soft-start.
The Over-Current Protection
The RT5753A/B features cycle-by-cycle current-limit
protection on both the high-side and low-side MOSFETs
and the protection prevents the device from the catastrophic
damage in output short circuit, over current or inductor
saturation.
The high-side MOSFET over-current protection is achieved
by an internal current comparator that monitors the current
in the high-side MOSFET during each on-time. The switch
current is compared with the high-side switch peak-current
limit (ILIM_H) after a certain amount of delay when the highside switch being turned on each cycle. If an over-current
condition occurs, the converter will immediately turn off
the high-side switch and turn on the low-side switch to
prevent the inductor current from exceeding the high-side
current limit.
The low-side MOSFET over-current protection is achieved
by measuring the inductor current through the
synchronous rectifier (low-side switch) during the low-side
on-time. Once the current rises above the low-side switch
valley current limit (ILIM_L), the on-time one-shot will be
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5
RT5753A/B
inhibited until the inductor current ramps down to the
current limit level (ILIM_L), that is, another on-time can only
be triggered when the inductor current goes below the
low-side current limit. If the output load current exceeds
the available inductor current (clamped by the low-side
current limit), the output capacitor needs to supply the
extra current such that the output voltage will begin to
drop. If it drops below the output under-voltage protection
threshold, the IC will stop switching to avoid excessive
heat.
VOUT
(500mV/Div)
tHICCUP_OFF (5ms, typ.), and then attempt to recover
automatically for tHICCUP_ON (1ms, typ.). Upon completion
of the soft-start sequence, if the fault condition is removed,
the converter will resume normal operation; otherwise, such
cycle for auto-recovery will be repeated until the fault
condition is cleared. Hiccup mode allows the circuit to
operate safely with low input current and power dissipation,
and then resume normal operation as soon as the overload or short-circuit condition is removed. A short-circuit
protection and recovery profile is shown below.
VOUT
(500mV/Div)
VSW
(5V/Div)
Short Applied
Short Removed
VSW
(5V/Div)
VPG
(5V/Div)
VPG
(5V/Div)
I SW
(2A/Div)
I SW
(2A/Div)
Time (50μs/Div)
Time (5ms/Div)
Figure 2. Over-Current Protection
Figure 3. Short-Circuit Protection and Recovery
Output Active Discharge
When the RT5753A/B is disabled by EN pin, UVLO or
OTP, the device discharges the output capacitors (via SW
pins) through an internal discharge resistor (100Ω)
connected to ground. This function prevents the reverse
current flow from the output capacitors to the input
capacitors once the input voltage collapses. It doesn't need
to rely on another active discharge circuit for discharging
output capacitors. This function will be turned off when
the fault condition is removed.
Output Under-Voltage Protection
The RT5753A/B includes output under-voltage protection
(UVP) against over-load or short-circuited condition by
constantly monitoring the feedback voltage VFB. If VFB
drops below the under-voltage protection threshold
(typically 40% of the internal feedback reference voltage),
the UV comparator will go high to turn off both the internal
high-side and low-side MOSFET switches. The RT5753A/
B will enter output under-voltage protection with hiccup
mode. During hiccup mode, the IC will shut down for
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Output Over-Voltage Protection
The RT5753A/BL includes an output over-voltage protection
(OVP) circuit to limit output voltage and minimize output
voltage overshoot. If the VFB goes above the 120% of the
reference voltage, the high-side MOSFET will be forced
off to limit the output voltage then the IC will be into Latchoff mode.
Thermal Shutdown
The RT5753A/B includes an over-temperature protection
(OTP) circuitry to prevent overheating due to excessive
power dissipation. The OTP will shut down switching
operation when junction temperature exceeds a thermal
shutdown threshold (TSD). Once the junction temperature
cools down by a thermal shutdown hysteresis (ΔTSD), the
IC will resume normal operation with a complete soft-start.
Note that the over-temperature protection is intended to
protect the device during momentary overload conditions.
The protection is activated outside of the absolute
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DS5753A/B-01 November 2020
RT5753A/B
maximum range of operation as a secondary fail-safe and
therefore should not be relied upon operationally.
Continuous operation above the specified absolute
maximum operating junction temperature may impair
device reliability or permanently damage the device.
Negative Over-Current Limit (RT5753B)
The RT5753B is the part which is forced to PWM and
allows negative current operation. In case of PWM
operation, high negative current may be generated as an
external power source which is tied to output terminal
unexpectedly. As the risk described above, the internal
circuit monitors negative current in each on-time interval
of low-side MOSFET and compares it with NOC threshold.
Once the negative current exceeds the NOC threshold,
the low-side MOSFET is turned off immediately, and then
the high-side MOSFET will be turned on to discharge the
energy of output inductor. This behavior can keep the valley
of negative current at NOC threshold to protect low-side
MOSFET. However, the negative current can't be limited
at NOC threshold anymore since minimum off-time is
reached.
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RT5753A/B
Absolute Maximum Ratings
Supply Input Voltage ----------------------------------------------------------------------------------------------VIN to SW -----------------------------------------------------------------------------------------------------------VIN to SW (t ≤ 10ns) ---------------------------------------------------------------------------------------------Switch Voltage, SW ----------------------------------------------------------------------------------------------SW (t ≤ 10ns) ------------------------------------------------------------------------------------------------------Other Pins -----------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------
ESD Ratings
(Note 1)
(Note 2)
ESD Susceptibility
HBM (Human Body Model) --------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
−0.3V to 6.5V
−0.3V to 6.5V
−2.5V to 9V
−0.3V to 6.5V
−2.5V to 9V
−0.3V to 6.5V
260°C
150°C
−65°C to 150°C
(Note 3)
Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V
Output Voltage ------------------------------------------------------------------------------------------------------------- 0.6V to VIN
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Thermal Information
(Note 4 and Note 5)
Thermal Parameter
WDFN-8L 2x2
WDFN-8SL 2x2
Unit
JA
Junction-to-ambient thermal resistance (JEDEC
standard)
49.5
48.2
C/W
JC(Top)
Junction-to-case (top) thermal resistance
167.1
158.5
C/W
JC(Bottom)
Junction-to-case (bottom) thermal resistance
5.8
5.5
C/W
JA(EVB)
Junction-to-ambient thermal resistance (specific
EVB)
49.7
49.7
C/W
JC(Top)
Junction-to-top characterization parameter
5.01
5.01
C/W
JB
Junction-to-board characterization parameter
30.5
30.5
C/W
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RT5753A/B
Electrical Characteristics
(VIN = 3.6V. TJ = TA = −40°C to 125°C. Typical value is tested at TA = 25°C. The limit over temperature is guaranteed by
characterization, unless otherwise noted.)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
2.5
--
5.5
V
2.15
2.3
2.45
V
--
300
--
mV
Supply Voltage
VIN Supply Input Operating
Voltage
VIN
Under-Voltage Lockout Threshold VUVLO
VIN rising
Under-Voltage Lockout Threshold
VUVLO
Hysteresis
Supply Current (Shutdown)
ISHDN
VEN = 0V
--
--
15
Supply Current (Quiescent)
IQ
VEN = 2V, VFB = 0.7V, not
switching
--
23
35
tSS
0%VOUT to 95%VOUT
1
1.5
2.4
VEN_H
EN high-level input voltage
0.88
--
1.2
VEN_L
EN low-level input voltage
0.4
--
0.85
--
1.5
--
A
0.594
0.6
0.606
V
--
0.1
0.4
µA
A
Soft-Start
Soft-Start Time
ms
Enable Voltage
Enable Voltage Threshold
Enable Pull-Low Current
IEN_PL
V
Feedback Voltage
Feedback Threshold Voltage
VFB
Feedback Input Current
IFB
VFB = 0.6V, TA = 25°C
Internal MOSFET
High-Side On-Resistance
RDS(ON)_H
--
100
120
Low-Side On-Resistance
RDS(ON)_L
--
70
85
3.6
4.14
4.8
3
3.45
3.9
f SW
1
1.2
1.44
MHz
tOFF_MIN
--
90
--
ns
VUVP
--
40
--
%
110
120
130
%
m
Current Limit
High-Side Switch Current Limit
ILIM_H
Low-Side Switch Valley Current
Limit
ILIM_L
VIN = 3.6V, VOUT = 1.2V,
L = 1H, TA = 25C
A
Switching Frequency
Switching Frequency
On-Time Timer Control
Minimum Off-Time
Output Voltage Protection
Output Under-Voltage Threshold
(RT5753A/BH : Hiccup)
(RT5753A/BL : Latch-Off)
Output Over-Voltage Threshold
(RT5753A/BL: Latch-Off, Deglitch VOVP
Time = 2s)
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VFB rising
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RT5753A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Thermal Shutdown
Thermal Shutdown Threshold
TSD
--
150
--
Thermal Shutdown Hysteresis
TSD
--
20
--
C
Power Good
Power Good High Threshold
VTH_PGLH
VFB rising, PG goes high
83
90
--
%
Power Good Falling Threshold
VTH_PGHL
VFB falling, PG goes low
78
85
--
%
IPG sinks 5mA
--
--
0.4
V
VEN = 0V (Protection)
--
100
--
Power Good Sink Current
Capability
Output Discharge Resistor
Output Discharge Switch
On-Resistor
RDISCHG
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions may affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution is recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. For more information about thermal parameter, see the Application and Definition of Thermal Resistances report,
AN061.
Note 5. θJA(EVB), ψJC(Top) and ψJB are measured on a high effective-thermal-conductivity four-layer test board which is in size of
70mm x 50mm; furthermore, all layers with 1 oz. Cu. Thermal resistance/parameter values may vary depending on the
PCB material, layout, and test environmental conditions.
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RT5753A/B
Typical Application Circuit
RT5753A/B
3
VIN
RPG
100k
VIN
SW
6
L
VOUT
CIN2
0.1µF
CIN1
2
VPG
RFB1
COUT
PG
Chip Enable
7
CFF*
FB
1
EN
AGND
8
RFB2
PGND
4, 9 (Exposed pad)
CFF*: Optional for performance fine-tune
Table 2. Suggested Component Values
VOUT (V)
RFB1 (k)
RFB2 (k)
CIN1 (F)
L (H)
COUT (F)
CFF (pF)
3.3
100
22.1
22
1
44 to 66
--
1.8
100
50
22
1
44 to 66
‐‐
1.5
100
66.6
22
1
44 to 66
‐‐
1.2
100
100
22
1
44 to 66
22
1.05
100
133
22
1
44 to 66
22
1
100
148
22
1
44 to 66
22
Table 3. Recommended External Components
Component
Description
Vendor P/N
CIN
22F, 6.3V, X5R, 0603
GRM188R60J226MEA0D (MURATA)
COUT
22F, 6.3V, X5R, 0603
GRM188R60J226MEA0D (MURATA)
1H
DFE322512F-1R0M (MURATA)
L
COUT and CIN : Considering the effective capacitance de-rated with biased voltage level and size, the COUT and CIN
components need to satisfy the effective capacitance which corresponding to recommended external
components.
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RT5753A/B
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
90
VIN
VIN
VIN
VIN
VIN
70
60
50
40
=
=
=
=
=
2.5V
3.3V
3.6V
4.5V
5V
Efficiency (%)
Efficiency (%)
80
30
20
70
=
=
=
=
=
2.5V
3.3V
3.6V
4.5V
5V
60
50
10
0
0.001
VIN
VIN
VIN
VIN
VIN
80
RT5753B, VOUT = 1.2V
0.01
0.1
1
RT5753A, VOUT = 1.2V
40
0.001
10
0.01
Output Current (A)
0.1
1
10
Output Current (A)
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
VIN
VIN
VIN
VIN
70
60
=
=
=
=
90
3.3V
3.6V
4.5V
5V
Efficiency (%)
Efficiency (%)
80
50
40
30
20
80
=
=
=
=
3.3V
3.6V
4.5V
5V
70
60
50
10
0
0.001
VIN
VIN
VIN
VIN
RT5753A, VOUT = 1.8V
RT5753B, VOUT = 1.8V
0.01
0.1
1
40
0.001
10
0.01
Output Current (A)
0.1
1
10
Output Current (A)
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
VIN = 4.5V
VIN = 5V
70
60
50
40
30
20
70
60
RT5753A, VOUT = 3.3V
RT5753B, VOUT = 3.3V
0.01
0.1
1
Output Current (A)
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12
80
50
10
0
0.001
VIN = 4.5V
VIN = 5V
90
Efficiency (%)
Efficiency (%)
80
10
40
0.001
0.01
0.1
1
10
Output Current (A)
is a registered trademark of Richtek Technology Corporation.
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RT5753A/B
Output Voltage vs. Output Current
1.220
1.215
1.215
1.210
1.210
Output Voltage (V)
Output Voltage (V)
Output Voltage vs. Output Current
1.220
1.205
1.200
1.195
1.190
1.185
1.205
1.200
1.195
1.190
1.185
RT5753B, VIN = 5V, VOUT = 1.2V
1.180
0.001
0.01
0.1
1
RT5753A, VIN = 5V, VOUT = 1.2V
1.180
0.001
10
0.01
Output Current (A)
0.1
1
10
Output Current (A)
Output Voltage vs. Input Voltage
Current Limit vs. Temperature
4.0
1.220
3.8
1.210
Current Limit (A)
Output Voltage(V)
1.215
1.205
1.200
1.195
1.190
3.6
3.4
3.2
1.185
Low-side MOSFET, VIN = 3.6V
VOUT = 1.2V, IOUT = 1.5A
3.0
1.180
2.5
3
3.5
4
4.5
5
-50
5.5
-25
0
Input Voltage (V)
Current Limit vs. Temperature
50
75
100
125
Switching Frequency vs. Temperature
1.30
4.8
4.6
4.4
4.2
High-side MOSFET, VIN = 3.6V
4.0
Switching Frequency (MHz)1
5.0
Current Limit (A)
25
Temperature (°C)
1.25
1.20
1.15
1.10
1.05
1.00
-50
-25
0
25
50
75
100
Temperature (°C)
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DS5753A/B-01 November 2020
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT5753A/B
Shutdown Current vs. Temperature
5.0
45
4.5
40
4.0
Shutdown Current (μA)1
Quiescent Current (μA)
Quiescent Current vs. Temperature
50
35
30
25
20
15
10
5
VIN = 3.6V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
VIN = 3.6V
0.0
0
-50
-25
0
25
50
75
100
-50
125
-25
0
25
Input UVLO Threshold vs. Temperature
100
125
Enable Voltage Threshold vs. Temperature
2.5
1.2
2.4
Enable Voltage Threshold(V)
Input UVLO Threshold(V)
75
Temperature (°C)
Temperature (°C)
Rising
2.3
2.2
2.1
Falling
2.0
1.9
1.8
1.1
1.0
Rising
0.9
0.8
Falling
0.7
0.6
0.5
0.4
0.3
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
Temperature (°C)
Temperature (°C)
Reference Voltage vs. Temperature
Load Transient Response
0.62
125
VIN = 5V, VOUT = 3.3V, L = 1μH,
COUT = 44μF, IOUT = 100mA to 1A,
TR = TF = 1μs
0.61
Reference Voltage (V)
50
0.60
VOUT
(50mV/Div)
0.59
0.58
0.57
0.56
VIN = 3.6V, IOUT = 0A
IOUT
(500mA/Div)
0.55
-50
-25
0
25
50
75
100
125
Time (20μs/Div)
Temperature (°C)
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is a registered trademark of Richtek Technology Corporation.
DS5753A/B-01 November 2020
RT5753A/B
Load Transient Response
Load Transient Response
VIN = 3.6V, VOUT = 1.2V, L = 1μH,
COUT = 44μF, CFF = 22pF,
IOUT = 100mA to 1A, TR = TF = 1μs
VIN = 5V, VOUT = 3.3V, L = 1μH,
COUT = 44μF, IOUT = 2A to 3A,
TR = TF = 1μs
VOUT
(50mV/Div)
VOUT
(100mV/Div)
IOUT
(1A/Div)
IOUT
(500mA/Div)
Time (20μs/Div)
Time (20μs/Div)
Load Transient Response
Output Ripple Voltage
VIN = 3.6V, VOUT = 1.2V, L = 1μH,
COUT = 44μF, CFF = 22pF,
IOUT = 2A to 3A, TR = TF = 1μs
VOUT
(50mV/Div)
VOUT
(20mV/Div)
IOUT
(1A/Div)
VSW
(4V/Div)
VIN = 5V, VOUT = 3.3V, IOUT = 10mA,
L = 1μH, COUT = 44μF, CFF = 22pF
Time (20μs/Div)
Time (50μs/Div)
Output Ripple Voltage
Output Ripple Voltage
VIN = 5V, VOUT = 3.3V, IOUT = 1.5A,
L = 1μH, COUT = 44μF, CFF = 22pF
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA,
L = 1μH, COUT = 44μF, CFF = 22pF
VOUT
(20mV/Div)
VOUT
(20mV/Div)
VSW
(4V/Div)
VSW
(4V/Div)
Time (500ns/Div)
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Time (50μs/Div)
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RT5753A/B
Output Ripple Voltage
VIN = 3.6V, VOUT = 1.2V, IOUT = 1.5A,
L = 1μH, COUT = 44μF, CFF = 22pF
VOUT
(10mV/Div)
VPG
(4V/Div)
VEN
(1V/Div)
VPG
(4V/Div)
VOUT
(1V/Div)
VSW
(4V/Div)
VEN
(1V/Div)
Power On from EN
IOUT
(1A/Div)
Time (500ns/Div)
Time (1ms/Div)
Power Off from EN
Power On from VIN
VIN = 5V, VOUT = 3.3V, IOUT = 3A,
VPG reference source pull high to 5V
VIN
(2V/Div)
VSW
(4V/Div)
VOUT
(1V/Div)
IOUT
(1A/Div)
VOUT
(2V/Div)
IOUT
(2A/Div)
VIN
(2V/Div)
VIN = 5V, VOUT = 3.3V, IOUT = 3A,
VPG reference source pull high to 5V
VIN = 5V, VOUT = 3.3V, IOUT = 3A
Time (50μs/Div)
Time (2ms/Div)
Power Off from VIN
Power On from EN
VEN
(1V/Div)
VSW
(4V/Div)
VPG
(2V/Div)
VOUT
(2V/Div)
VOUT
(500mV/Div)
IOUT
(2A/Div)
VIN = 5V, VOUT = 3.3V, IOUT = 3A
Time (5ms/Div)
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IOUT
(1A/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 3A
VPG reference source pull high to 3.6V
Time (1ms/Div)
is a registered trademark of Richtek Technology Corporation.
DS5753A/B-01 November 2020
RT5753A/B
Power On from VIN
Power Off from EN
VEN
(1V/Div)
VPG
(2V/Div)
VOUT
(500mV/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 3A
VPG reference source pull high to 3.6V
VIN
(2V/Div)
VSW
(4V/Div)
VOUT
(1V/Div)
IOUT
(1A/Div)
IOUT
(2A/Div)
Time (20μs/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 3A
Time (5ms/Div)
Power Off from VIN
VIN
(2V/Div)
VSW
(4V/Div)
VOUT
(1V/Div)
IOUT
(2A/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 3A
Time (5ms/Div)
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RT5753A/B
Application Information
The output stage of a synchronous buck converter is
composed of an inductor and capacitor, which stores and
delivers energy to the load, and forms a second-order lowpass filter to smooth out the switch node voltage to
maintain a regulated output voltage.
current limit of the device rather than the inductor peak
current.
For EMI sensitive application, choosing shielding type
inductor is preferred.
Input Capacitor Selection
Inductor Selection
The inductor selection trade-offs among size, cost,
efficiency, and transient response requirements. Generally,
three key inductor parameters are specified for operation
with the device: inductance value (L), inductor saturation
current (ISAT), and DC resistance (DCR).
A good compromise between size and loss is to choose
the peak-to-peak ripple current equals to 20% to 50% of
the IC rated current. The switching frequency, input
voltage, output voltage, and selected inductor ripple current
determines the inductor value as follows :
V
(VIN VOUT )
L = OUT
VIN fSW IL
Once an inductor value is chosen, the ripple current (ΔIL)
is calculated to determine the required peak inductor
current.
V
(VIN VOUT )
IL = OUT
VIN fSW L
IL_PEAK = IOUT_MAX + 1 IL
2
IL(PEAK) should not exceed the minimum value of IC's upper
current limit level. Besides, the current flowing through
the inductor is the inductor ripple current plus the output
current. During power up, faults or transient load
conditions, the inductor current can increase above the
calculated peak inductor current level calculated above.
In transient conditions, the inductor current can increase
up to the switch current limit of the device. For this reason,
the most conservative approach is to specify an inductor
with a saturation current rating equal to or greater than
the switch current limit rather than the peak inductor
current.
Input capacitance, CIN, is needed to filter the pulsating
current at the drain of the high-side power MOSFET. CIN
should be sized to do this without causing a large variation
in input voltage. The waveform of CIN ripple voltage and
ripple current are shown in Figure 4. The peak-to-peak
voltage ripple on input capacitor can be estimated as
equation below :
+ IOUT ESR
VCIN = D IOUT 1 D
CIN fSW
where
V
D = OUT
VIN
For ceramic capacitors, the equivalent series resistance
(ESR) is very low, the ripple which is caused by ESR can
be ignored, and the minimum input capacitance can be
estimated as equation below :
D 1 D
CIN_MIN = IOUT_MAX
VCIN_MAX fSW
where ΔVCIN_MAX is maximum input ripple voltage.
VCIN
CIN Ripple Voltage
VESR = IOUT x ESR
(1-D) x IOUT
CIN Ripple Current
D x IOUT
D x tSW (1-D) x tSW
Figure 4. CIN Ripple Voltage and Ripple Current
For the selected inductor, the inductor’s saturation and
thermal rating should meet or greater than the ripple
current (ΔIL). For more conservative, the rating for inductor
saturation current must be equal to or greater than switch
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is a registered trademark of Richtek Technology Corporation.
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RT5753A/B
In addition, the input capacitor needs to have a very low
ESR and must be rated to handle the worst-case RMS
input current of :
V
VIN
IRMS IOUT _MAX OUT
1
VIN
VOUT
It is common to use the worse IRMS ≅ IOUT/2 at VIN =
2VOUT for design. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further de-rate
the capacitor, or choose a capacitor rated at a higher
temperature than required.
Several capacitors may also be paralleled to meet size,
height and thermal requirements in the design. For low
input voltage applications, sufficient bulk input capacitance
is needed to minimize transient effects during output load
changes.
Ceramic capacitors are ideal for switching regulator
applications because of its small size, robustness and
very low ESR. However, care must be taken when these
capacitors are used at the input. A ceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the RT5753A/B
circuit is plugged into a live supply, the input voltage can
ring to twice its nominal value, possibly exceeding the
device's rating. This situation is easily avoided by placing
the low ESR ceramic input capacitor in parallel with a
bulk capacitor with higher ESR to damp the voltage ringing.
The input capacitor should be placed as close as possible
to the VIN pins, with a low inductance connection to the
GND of the IC. In addition to a larger bulk capacitor, a
small ceramic capacitors of 0.1μF should be placed close
to the VIN and GND pin. This capacitor should be 0402 or
0603 in size.
Output Capacitor Selection
The RT5753A/B are optimized for ceramic output
capacitors and best performance will be obtained by using
them. The total output capacitance value is usually
determined by the desired output voltage ripple level and
transient response requirements for sag (undershoot on
load apply) and soar (overshoot on load release).
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DS5753A/B-01 November 2020
Output Ripple
The output voltage ripple at the switching frequency is a
function of the inductor current ripple going through the
output capacitor's impedance. To derive the output voltage
ripple, the output capacitor with capacitance, COUT, and
its equivalent series resistance, RESR, must be taken into
consideration. The output peak-to-peak ripple voltage
VRIPPLE, caused by the inductor current ripple ΔIL, is
characterized by two components, which are ESR ripple
VRIPPLE(ESR) and capacitive ripple VRIPPLE(C), and can be
expressed as below :
VRIPPLE = VRIPPLE(ESR) VRIPPLE(C)
VRIPPLE(ESR) = IL RESR
VRIPPLE(C) =
IL
8 COUT fSW
If ceramic capacitors are used as the output capacitors,
both the components need to be considered due to the
extremely low ESR and relatively small capacitance.
Output Transient Undershoot and Overshoot
In addition to voltage ripple at the switching frequency,
the output capacitor and its ESR also affect the voltage
sag (undershoot) and soar (overshoot) when the load steps
up and down abruptly. The ACOT® transient response is
very quick and output transients are usually small. The
following section shows how to calculate the worst-case
voltage swings in response to very fast load steps.
The output voltage transient undershoot and overshoot each
have two components : the voltage steps caused by the
output capacitor's ESR, and the voltage sag and soar due
to the finite output capacitance and the inductor current
slew rate. Use the following formula to check if the ESR
is low enough (typically not a problem with ceramic
capacitors) and the output capacitance is large enough to
prevent excessive sag and soar on very fast load step
edges, with the chosen inductor value.
The amplitude of the ESR step up or down is a function of
the load step and the ESR of the output capacitor :
VESR _STEP = ΔIOUT x RESR
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor value,
the input-to-output voltage differential, and the maximum
duty cycle. The maximum duty cycle during a fast transient
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RT5753A/B
is a function of the on-time and the minimum off-time since
the ACOT® control scheme will ramp the current using
on-times spaced apart with minimum off-times, which is
as fast as allowed. Calculate the approximate on-time
(neglecting parasites) and maximum duty cycle for a given
input and output voltage as :
VOUT
tON
t ON =
and DMAX =
VIN fSW
tON tOFF_MIN
The actual on-time will be slightly longer as the IC
compensates for voltage drops in the circuit, but we can
neglect both of these since the on-time increase
compensates for the voltage losses. Calculate the output
voltage sag as :
VSAG =
L (IOUT )2
2 COUT VIN(MIN) DMAX VOUT
The amplitude of the capacitive soar is a function of the
load step, the output capacitor value, the inductor value
and the output voltage :
VSOAR =
L (IOUT )2
2 COUT VOUT
EN Pin for Start-Up and Shutdown Operation
For automatic start-up, the EN pin can be connected to
the input supply VIN directly. The large built-in hysteresis
band makes the EN pin useful for simple delay and timing
circuits. The EN pin can be externally connected to VIN
by adding a resistor REN and a capacitor CEN, as shown in
Figure 6, to have an additional delay. The time delay can
be calculated with the EN's internal threshold, at which
switching operation begins.
An external MOSFET can be added for the EN pin to be
logic-controlled, as shown in Figure 7. In this case, a pullup resistor, REN, is connected between VIN and the EN
pin. The MOSFET Q1 will be under logic control to pull
down the EN pin. To prevent the device being enabled
when VIN is smaller than the VOUT target level or some
other desired voltage level, a resistive divider (REN1 and
REN2) can be used to externally set the input under-voltage
lockout threshold, as shown in Figure 8.
VIN
Because some modern digital loads can exhibit nearly
instantaneous load changes, the amplitude of the ESR
step up or down should be taken into consideration.
REN
EN
RT5753A/B
CEN
GND
Output Voltage Setting
Set the desired output voltage using a resistive divider
from the output to ground with the midpoint connected to
FB, as shown in Figure 5. The output voltage is set
according to the following equation :
Figure 6. Enable Timing Control
VIN
REN
GND
VOUT
RFB1
RT5753A/B
Q1
Enable
VOUT = 0.6V x (1 + RFB1 / RFB2)
EN
Figure 7. Logic Control for the EN Pin
FB
RT5753A/B
RFB2
GND
VIN
REN1
EN
REN2
Figure 5. Output Voltage Setting
Place the FB resistors within 5mm of the FB pin. For
output voltage accuracy, use divider resistors with 1% or
better tolerance.
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20
RT5753A/B
GND
Figure 8. Resistive Divider for Under-Voltage Lockout
Threshold Setting
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DS5753A/B-01 November 2020
RT5753A/B
Power-Good Output
The PG pin is an open-drain power-good indication output
and is to be connected to an external voltage source
through a pull-up resistor.
The external voltage source can be an external voltage
supply below 5.5V, VCC or the output of the RT5753A/B if
the output voltage is regulated under 5.5V. It is
recommended to connect a 100kΩ between external
voltage source to PG pin.
the excitation frequency is sufficient. It is important that
the converter operates in PWM mode, outside the light
load efficiency range, and below any current limit threshold.
A load transient from 30% to 60% of maximum load is
reasonable which is shown in Figure 10.
fCO
Feedforward Capacitor (CFF)
The RT5753A/B is optimized for low duty-cycle
applications, and the control loop is stable with low ESR
ceramic output capacitors. This optimization makes circuit
easily to achieve stability with reasonable output
capacitors, but it also narrows the optimization of transient
responses of the converter. In higher duty-cycle
applications (higher output voltages or lower input voltage),
the internal ripple signal will increase in amplitude. Before
the ACOT® control loop can react to an output voltage
fluctuation, the voltage change on the feedback signal must
exceed the internal ripple amplitude. Because of the large
internal ripple in this condition, the response may become
too slow and may show an under-damped response. This
can cause some ringing in the output and is especially
visible at higher output voltage applications where dutycycle is high. The feedback network attenuation is large,
adding to the delay. As shown in Figure 9, adding a
feedforward capacitor (CFF) across the upper feedback
resistor is recommended. This increases the damping of
the control system.
60% Load
30% Load
Figure 10. Example of Measuring the Converter fCO by
Fast Load Transient
CFF can be calculated base on below equation :
CFF =
1
1 1 + 1
2 fco
RFB1 RFB1
RFB2
Note that, after defining the CFF, please also check the
load regulation because the feedforward capacitor might
inject an offset voltage into VOUT to cause VOUT inaccuracy.
If the output voltage is over specification caused by
calculated CFF, please decrease the value of feedforward
capacitor CFF.
Figure 11. shows the transient performance with and
without feedforward capacitor.
L
SW
RT5753A/B
VOUT
RFB1
CFF
COUT
FB
GND
RFB2
Figure 9. Feedback Loop with Feedforward Capacitor
Loop stability can be checked by viewing the load transient
response. A load step with a speed that exceeds the
converter bandwidth must be applied. For ACOT®, loop
bandwidth can be in the order of 100 to 200kHz, so a load
step with 500ns maximum rise time (di/dt 2A/μs) ensures
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Figure 11. Load Transient Response with and without
Feedforward Capactior
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RT5753A/B
Thermal Considerations
In many applications, the RT5753A/B does not generate
much heat due to its high efficiency and low thermal
resistance of its WDFN-8L 2x2 and WDFN-8SL 2x2
packages. However, in applications which the RT5753A/
B runs at a high ambient temperature and high input voltage
or high switching frequency, the generated heat may
exceed the maximum junction temperature of the part.
The junction temperature should never exceed the
absolute maximum junction temperature of the part.
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. If the junction temperature reaches
approximately 150°C, the RT5753A/B stops switching the
power MOSFETs until the temperature cools down by
20°C.
loss, 16.5mW, can be obtained from its website in this
case. In this case, the power dissipation of the
RT5753A/B is
1 η
POUT IO 2 DCR + PCORE = 1.03W
η
Considering the θJA(EFFECTIVE) is 59.64°C/W by using the
RT5753A/B evaluation board with 4 layers PCB, all layers
with 1 oz. Cu, the junction temperature of the regulator
operating in a 25°C ambient temperature is approximately :
PD, RT =
TJ = 1.03W x 59.64°C/W + 25°C = 86.4°C
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the device.
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high current path comprising
of input capacitor, high-side FET, inductor, and the output
capacitor should be as short as possible. This practice
is essential for high efficiency.
where TJ(MAX) is the maximum junction temperature of the
die. For recommended operating condition specifications,
the maximum junction temperature is 150°C. TA is the
ambient temperature, and θJA(EFFECTIVE) is the systemlevel junction to ambient thermal resistance. It can be
estimated from thermal modeling or measurements in the
system.
Place the input MLCC capacitors as close to the VIN
and PGND pins as possible. The major MLCC capacitors
should be placed on the same layer as the RT5753A/B.
SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pickup.
The thermal resistance of the device strongly depends on
the surrounding PCB layout and can be improved by
providing a heat sink of surrounding copper ground. The
addition of backside copper with thermal vias, stiffeners,
and other enhancements can also help reduce thermal
resistance.
Connect feedback network behind the output capacitors.
Place the feedback components next to the FB pin.
For better thermal performance, design a wide and thick
plane for PGND pin or add a lot of vias to GND plane.
AGND and PGND are connected with a via and at only
one point to reduce circulating currents.
The maximum power dissipation can be calculated by
the following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA(EFFECTIVE)
Experiments in the Richtek thermal lab show that simply
set θJA(EFFECTIVE) as 110% to 120% of the θJA is reasonable
to obtain the allowed PD(MAX).
An example of PCB layout guide is shown from Figure
12.
As an example, consider the case when the RT5753A/B
is used in applications where VIN = 5V, IOUT = 3A, fSW =
1.2MHz, VOUT = 1.2V. The efficiency at 1.2V, 3A is 74.2%
by using WE-74437324010 (1μH, 22mΩ DCR) as the
inductor and measured at room temperature. The core
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is a registered trademark of Richtek Technology Corporation.
DS5753A/B-01 November 2020
RT5753A/B
GND
VOUT
COUT1
COUT1
Connect output feedback
network behind the top layer.
COUT2
GND
Shielding inductor by GND.
SW should be connected to inductor
by wide and short trace. Please keep
analog components away from the
SW node to prevent stray capacitive
noise pickup.
Add extra vias for thermal Dissipation.
Place the input MLCC capacitors as close to
the VIN and GND pins as possible.
EN
AGND
GND
PGNG
`
VIN
CIN1
PGND
VIN
PG
FB
RFB2
RPG
VOUT
RFB1
CFF
REN
EN
NC
SW
CIN2
L
EN
The VIN trace should have enough width,
and use several vias to shunt the high
input current.
Place the feedback components next to
the FB pin.
Connect EN network behind In order to avoid the the ground noise interruption at bad
the top layer.
ground plane, it’s recommended to connect AGND to GND
plane at only one point to reduce circulating currents.
Figure 12. Layout Guide
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS5753A/B-01 November 2020
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
23
RT5753A/B
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.300
0.008
0.012
D
1.950
2.050
0.077
0.081
D2
1.000
1.250
0.039
0.049
E
1.950
2.050
0.077
0.081
E2
0.400
0.650
0.016
0.026
e
L
0.500
0.300
0.020
0.400
0.012
0.016
W-Type 8L DFN 2x2 Package
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
www.richtek.com
24
is a registered trademark of Richtek Technology Corporation.
DS5753A/B-01 November 2020
RT5753A/B
2
1
2
1
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Symbol
D2
E2
Dimensions In Millimeters
Dimensions In Inches
Min.
Max.
Min.
Max.
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.300
0.008
0.012
D
1.900
2.100
0.075
0.083
Option1
1.150
1.250
0.045
0.049
Option2
1.550
1.650
0.061
0.065
E
1.900
2.100
0.075
0.083
Option1
0.750
0.850
0.030
0.033
Option2
0.850
0.950
0.033
0.037
e
L
0.500
0.250
0.020
0.350
0.010
0.014
W-Type 8SL DFN 2x2 Package
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
DS5753A/B-01 November 2020
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
25
RT5753A/B
Footprint Information
Footprint Dimension (mm)
Package
Number of
Pin
P
A
B
C
D
Sx
Sy
M
V/W/U/XDFN2*2-8
8
0.50
2.80
1.20
0.80
0.30
1.30
0.70
1.80
Package
V/W/U/XDFN2*2-8S
Option1
Option2
Tolerance
±0.05
Footprint Dimension (mm)
Number of
Pin
P
A
B
C
D
8
0.50
2.80
1.30
0.75
0.30
Sx
Sy
1.30
0.90
1.60
0.90
M
1.80
Tolerance
±0.05
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS5753A/B-01 November 2020
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