RT9018B25PSP

RT9018A/B Maximum 3A, Ultra Low Dropout Regulator General Description The RT9018A/B is a high performance positive voltage regulator designed for use in applications requiring very low Input voltage and very low dropout voltage at up to 3A(Peak). It operates with a VIN as low as 1.0V and VDD voltage 3V with output voltage programmable as low as 0.8V. The significant feature includes ultra low dropout, ideal for applications where VOUT is very close to VIN. Additionally, there is an enable pin to further reduce power dissipation while shutdown. The RT9018A/B provides excellent regulation over variations in line, load and temperature. and provides a power OK signal to indicate if the voltage level of Vo reaches 90% of its rating value. The RT9018A/B is available in the SOP-8 (Exposed Pad) and WDFN-10L 3x3 packages with 1V, 1.05V, 1.2V, 1.5V, 1.8V and 2.5V internally preset outputs that are also adjustable using external resistors. Features Maximum 3A Low-Dropout Voltage Regulator High Accuracy Output Voltage ±1.5% Typically 220mV Dropout at 3A Power Good Output Output Voltage Pull Low Resistance when Disable Thermal and Over Current Protection RoHS Compliant and 100% Lead (Pb)-Free Applications Front Side Bus VTT (1.2V/3A) NoteBook PC Applications Motherboard Applications Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. Ordering Information RT9018A/B Package Type SP : SOP-8 (Exposed Pad-Option 1) QW : WDFN-10L 3x3 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Output Voltage 10 : 1V/Adj 1K : 1.05V/Adj 12 : 1.2V/Adj 15 : 1.5V/Adj 18 : 1.8V/Adj 25 : 2.5V/Adj Enable Pin Function A : Internal Pull High B : Internal Pull Low Note : Richtek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating. Pin Configurations (TOP VIEW) PGOOD EN VIN VDD 2 3 4 8 GND 6 9 5 7 GND ADJ VOUT NC SOP-8 (Exposed Pad) WDFN-10L 3x3 DS9018A/B-04 September 2007 9 VOUT VOUT VOUT ADJ PGOOD 1 2 3 4 5 GND 11 10 9 8 7 VDD VIN VIN VIN EN www.richtek.com 1 RT9018A/B Pin Description Pin No. P SOP-8 3 2 4 1 7 6 5 WDFN 3x3 7, 8, 9 6 10 5 4 1, 2, 3 -VIN EN VDD PGOOD ADJ VOUT NC Supply Input Voltage. Chip Enable (Active-High). Supply Voltage of Control Circuitry. Power Good Open Drain Output. Set the output voltage by the internal feedback resistors when ADJ is grounded. If external feedback resistors is used, VOUT = 0.8V x (R1 + R2)/R2. Output Voltage. No Internal Connection. Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissi pation. Pin Name Pin Function 8, Exposed Pad (11) GND Exp osed Pad (9) Typical Application Circuit VOUT = 0.8 × R1 + R2 R2 VIN 10uF Chip Enable VDD 1uF VOUT VIN VOUT 10uF Chip Enable VDD VOUT VIN 10uF VIN VOUT CDummy R1 VOUT 10uF RT9018A/B EN VDD GND ADJ PGOOD 100k RT9018A/B EN VDD GND ADJ PGOOD R2 100k VOUT 1uF Figure 1. Fixed Voltage Regulator Figure 2. Adjustable Voltage Regulator Function Block Diagram VIN OCP VOUT Driver Error Amplifier OTP + - EN VDD POR 0.8V 0.72V + Mode ADJ PGOOD GND www.richtek.com 2 DS9018A/B-04 September 2007 RT9018A/B Absolute Maximum Ratings (Note 1) Supply Voltage, VIN --------------------------------------------------------------------------------------------------- 1V to 6V Control Voltage, VDD -------------------------------------------------------------------------------------------------- 3V to 6V Output Voltage, VOUT ------------------------------------------------------------------------------------------------- 0.8 to 6V Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) ----------------------------------------------------------------------------------------------- 1.33W WDFN-10L 3x3 --------------------------------------------------------------------------------------------------------- 1.67W Package Thermal Resistance (Note 4) SOP-8 (Exposed Pad), θJA ------------------------------------------------------------------------------------------ 75°C/W SOP-8 (Exposed Pad), θJC ----------------------------------------------------------------------------------------- 15°C/W WDFN-10L 3x3, θJA --------------------------------------------------------------------------------------------------- 60°C/W Junction Temperature ------------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 2) HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions (Note 3) Supply Voltage, VIN --------------------------------------------------------------------------------------------------- 1.4V to 5.5V Control Voltage, VDD -------------------------------------------------------------------------------------------------- 3.6V to 5.5V Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics Parameter VDD Operation Voltage Range POR Threshold POR Hysteresis Adjustable Pin Threshold Fixed Output Voltage Range Line Regulation (VIN) Load Regulation (Note 7) (VIN = VOUT + 500mV, VEN = VDD = 5V, CIN = COUT = 10uF, TA = TJ = 25°C, unless otherwise specified) Symbol VDD Test Conditions VDD Input Range Min 3.6 2.4 0.15 Typ -2.7 0.2 0.2 0.8 0 0.2 0.2 150 210 0.6 4.5 1.8 0.6 150 Max 5.5 3 -0.4 0.812 +1.5 0.6 1 250 350 1.2 ---- Units V V V V V % % % mV mV mA A A A VTH_ADJ ΔVOUT ΔVLINE_IN ΔVLOAD VDROP IQ ILIM IOUT = 1mA IOUT = 1mA VIN = VOUT + 0.5V to 5V, IOUT = 1mA VIN = VOUT + 1V, IOUT = 1mA to 3A IOUT = 2A IOUT = 3A VDD = 5.5V -0.788 −1.5 -----3.2 Reference Voltage (ADJ Pin Voltage) VADJ Dropout Voltage (Note 5) Quiescent Current (Note 6) Current Limit Short Circuit Current In-rush Current VOUT Pull Low Resistance DS9018A/B-04 September 2007 VOUT < 0.2V COUT = 10uF, Enable Start-up VEN = 0V 0.5 --- -Ω To be continued www.richtek.com 3 RT9018A/B Parameter Chip Enable EN Input Bias Current VDD Shutdown RT9018A Current EN Threshold Power Good PGOOD Rising Threshold PGOOD Hysteresis PGOOD Sink Capability PGOOD Delay Thermal Protection Thermal Shutdown Temperature Thermal Shutdown Hysteresis Thermal Shutdown Temperature Fold-back TSD ΔTSD VOUT < 0.4V ---160 30 110 ---°C °C °C IPGOOD = 10mA -3 -0.5 90 10 0.2 1.5 93 -0.4 5 % % V ms RT9018B IEN ISHDN VEN = 0V VEN = 0V VDD = 5V VDD = 5V ----1.2 12 10 ----20 1 0.2 -μA μA V Symbol Test Conditions Min Typ Max Units Logic-Low Voltage VENL Logic-High Voltage VENH Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity test board (4 Layers, 2S2P) of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for SOP-8 (Exposed Pad) package. Note 5. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) - 100mV. Note 6. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN - IOUT under no load condition (IOUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 7. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for load regulation in the load range from 1mA to 3A. www.richtek.com 4 DS9018A/B-04 September 2007 RT9018A/B Typical Operating Characteristics Load Transient Response VDD = 5V, VIN = 1.8V, VOUT = 1.2V Load Transient Response VDD = 5V, VIN = 1.8V, VOUT = 1.2V VOUT (20mV/Div) VOUT (20mV/Div) IOUT (1A/Div) Time (2.5ms/Div) IOUT (1A/Div) Time (2.5ms/Div) VIN Line Transient Response VDD = 5V, VOUT = 1.2V, IOUT = 0A VIN Line Transient Response VDD = 5V, VOUT = 1.2V, IOUT = 2A 3 3 VIN 2 VIN 2 VOUT (20mV/Div) VOUT (20mV/Div) Time (250μs/Div) Time (250μs/Div) VDD Line Transient Response VIN = 1.8V, VOUT = 1.2V, IOUT = 0A VDD Line Transient Response VIN = 1.8V, VOUT = 1.2V, IOUT = 2A VDD 5 4 VDD 5 4 VOUT (20mV/Div) VOUT (20mV/Div) Time (250μs/Div) Time (250μs/Div) DS9018A/B-04 September 2007 www.richtek.com 5 RT9018A/B Dropout Voltage vs. Load Current 400 Start Up from Enable IOUT = 3A 350 125°C Dropout Voltage (mV) 300 250 200 150 100 50 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 25°C EN (1V/Div) VOUT (1V/Div) -40°C PGOOD (1V/Div) I IN (2A/Div) Time (500μs/Div) Load Current (A) Start Up from VIN IOUT = 3A IOUT = 3A Start Up from VDD VIN (1V/Div) VOUT (1V/Div) PGOOD (1V/Div) I IN (2A/Div) Time (1ms/Div) VDD (5V/Div) VOUT (1V/Div) PGOOD (1V/Div) I IN (2A/Div) Time (500μs/Div) Short Circuit Protection 2.6 Short Circuit Current vs. Temperature Short Circuit Current Ishort (A) 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 VDD = 5V, VIN = 1.8V, VOUT = 1.2V IOUT (1A/Div) Time (100μs/Div) -40 -20 0 20 40 60 80 100 Temperature (°C) www.richtek.com 6 DS9018A/B-04 September 2007 RT9018A/B VDD Standby Current vs. Temperature 32 Quiescent Current vs. Temperature 1200 1.2 1100 1.1 1000 1.0 900 0.9 800 0.8 700 0.7 600 0.6 500 0.5 400 0.4 300 0.3 200 0.2 100 0.1 0 0 -40 -25 -10 VIN = 3.3V, VEN = 0V, VDD = 5V VIN = 1.8V, VOUT = 1.2V, IOUT = 0A VDD Standby Current (uA)1 28 24 20 16 12 8 4 0 -4 -50 -25 0 25 50 75 100 125 RT9018A RT9018B Quiescent Current (mA) Quiescent Current (uA) 5 20 35 50 65 80 95 110 125 Temperature (°C) Temperature (°C) Reference Voltage vs. Temperature 0.84 0.83 Output Voltage vs. Temperature 1.25 VIN = 1.8V, VADJ = 0V, IOUT = 0A 1.24 1.23 Reference Voltage (V) Output Voltage (V) -40 -25 -10 5 20 35 50 65 80 95 110 125 0.82 0.81 0.80 0.79 0.78 0.77 0.76 1.22 1.21 1.20 1.19 1.18 1.17 1.16 1.15 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) Temperature (°C) VDD POR Threshold Voltage vs. Temperature 3.00 2.95 2.90 2.85 ADJ Threshold Voltage vs. Temperature 0.30 ADJ Threshold Voltage Range (V) 50 65 80 95 110 125 0.28 0.26 0.24 0.22 0.20 0.18 0.16 0.14 0.12 0.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 POR Voltage (V) 2.80 2.75 2.70 2.65 2.60 2.55 2.50 2.45 2.40 -40 -25 -10 5 Rising Falling 20 35 Temperature (°C) Temperature (°C) DS9018A/B-04 September 2007 www.richtek.com 7 RT9018A/B Over Current Protection Fold Back 3 VIN = VEN = 3.3V, VDD = 5V Output Voltage VOUT (V) 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Loading Current I OUT (A) www.richtek.com 8 DS9018A/B-04 September 2007 RT9018A/B Application Information Adjustable Mode Operation The output voltage of RT9018A/B is adjustable from 0.8V to VIN by external voltage divider resisters as shown in Typical Application Circuit (Figure 2). The value of resisters R1 and R2 should be more than 10kΩ to reduce the power loss. Enable The RT9018A/B goes into shutdown mode when the EN pin is in the logic low condition. During this condition, the pass transistor, error amplifier, and band gap are turned off, reducing the supply current to 10uA typical. The RT9018A/B goes into operation mode when the EN pin is in the logic high condition. If the EN pin is floating, NOTE that the RT9018A/B internal initial logic level. For RT9018A, the EN pin function pulls high level internally. So the regulator will be turn on when EN pin is floating. For RT9018B, the EN pin function pulls low level internally. So the regulator will be turn off when EN pin is floating. Output Capacitor The RT9018A/B is specifically designed to employ ceramic output capacitors as low as 10uF. The ceramic capacitors offer significant cost and space savings, along with high frequency noise filtering. Input Capacitor Good bypassing is recommended from input to ground to help improve AC performance. A 10uF input capacitor or greater located as close as possible to the IC is recommended. Current Limit The RT9018A/B contains an independent current limit and the short circuit current protection to prevent unexpected applications. The current limit monitors and controls the pass transistor’ s gate voltage, limiting the output current to higher than 4.5A typical. When the output voltage is less than 0.4V, the short circuit current protection starts the current fold back function and maintains the loading current 1.8A. The output can be shorted to ground indefinitely without damaging the part. Power Good The power good function is an open-drain output. Connects 100kΩ pull up resistor to VOUT to obtain an output voltage. The PGOOD pin will output high immediately after the output voltage arrives 90% of normal output voltage. The PGOOD pin will output high with typical 1.5ms delay time. Thermal-Shutdown Protection Thermal protection limits power dissipation to prevent IC over temperature in RT9018A/B. When the operation junction temperature exceeds 160°C, the over-temperature protection circuit starts the thermal shutdown function and turns the pass transistor off. The pass transistor turn on again after the junction temperature cools by 30°C. RT9018A/B lowers its OTP trip level from 160°C to 110°C when output short circuit occurs (VOUT < 0.4V). It limits IC case temperature under 100°C and provides maximum safety to customer while output short circuit occurring. Power Dissipation For continuous operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is: PD = (VIN − VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junctions to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) − TA ) / θJA Where T J(MAX) i s the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT9018A/B, where TJ (MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance for SOP-8 (Exposed Pad) package is 75°C/W on the standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The copper thickness is 2oz. The maximum power dissipation at TA = 25°C can be calculated by following formula: www.richtek.com 9 DS9018A/B-04 September 2007 RT9018A/B PD (MAX) = (125°C − 25°C) / (75°C/W) = 1.33W (SOP-8 Exposed Pad on the minimum layout) Layout Considerations The thermal resistance θJA of SOP-8 (Exposed Pad) is determined by the package design and the PCB design. However, the package design had been designed. If possible, it’ s useful to increase thermal performance by the PCB design. The thermal resistance θJA can be decreased by adding a copper under the exposed pad of SOP-8 (Exposed Pad) package. As shown in Figure 3, the amount of copper area to which the SOP-8 (Exposed Pad) is mounted affects thermal performance. When mounted to the standard SOP-8 (Exposed Pad) pad (Figure 3.a), θJA is 75°C/W. Adding copper area of pad under the SOP-8 (Exposed Pad) Figure 3.b) reduces the θJA to 64°C/W. Even further, increasing the copper area of pad to 70mm2 (Figure 3.e) reduces the θJA to 49°C/W. Figure 3 (d). Copper Area = 50mm2, θJA = 51°C/W Figure 3 (e). Copper Area = 70mm2, θJA = 49°C/W Figure 3. Thermal Resistance vs. Different Cooper Area Layout Design The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA . For RT9018A/B packages, the Figure 4 of de-rating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Figure 3 (a). Minimum Footprint, θJA = 75°C/W 2.2 2 Copper Area 70mm2 50mm2 30mm2 10mm2 Minimum Layout Power Dissipation (W) 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 Figure 3 (b). Copper Area = 10mm2, θJA = 64°C/W JEDEC 4-Layers PCB 0 20 40 60 80 100 120 140 Ambient Temperature (°C) Figure 4. De-rating Curves Figure 3 (c). Copper Area = 30mm2, θJA = 54°C/W www.richtek.com 10 DS9018A/B-04 September 2007 RT9018A/B Outline Dimension A H M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol A B C D F H I J M O ption 1 X Y X O ption 2 Y M in 4.801 3.810 1.346 0.330 1.194 0.170 0.000 5.791 0.406 2.000 2.000 2.100 3.000 Max 5.004 4.000 1.753 0.510 1.346 0.254 0.152 6.200 1.270 2.300 2.300 2.500 3.500 Dimensions In Inches Min 0.189 0.150 0.053 0.013 0.047 0.007 0.000 0.228 0.016 0.079 0.079 0.083 0.118 Max 0.197 0.157 0.069 0.020 0.053 0.010 0.006 0.244 0.050 0.091 0.091 0.098 0.138 8-Lead SOP (Exposed Pad) Plastic Package DS9018A/B-04 September 2007 www.richtek.com 11 RT9018A/B D D2 L E E2 SEE DETAIL A 1 e A A1 A3 b 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.180 2.950 2.300 2.950 1.500 0.500 0.350 0.450 Max 0.800 0.050 0.250 0.300 3.050 2.650 3.050 1.750 Dimensions In Inches Min 0.028 0.000 0.007 0.007 0.116 0.091 0.116 0.059 0.020 0.014 0.018 Max 0.031 0.002 0.010 0.012 0.120 0.104 0.120 0.069 W-Type 10L DFN 3x3 Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com www.richtek.com 12 DS9018A/B-04 September 2007