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BR25H128FVT-2ACE2

BR25H128FVT-2ACE2

  • 厂商:

    ROHM(罗姆)

  • 封装:

    TSSOP8

  • 描述:

    IC EEPROM 128KBIT SPI 8TSSOPB

  • 数据手册
  • 价格&库存
BR25H128FVT-2ACE2 数据手册
Datasheet Serial EEPROM Series Automotive EEPROM 125°C Operation SPI BUS EEPROM BR25H128-2AC General Description BR25H128-2AC is a 128Kbit Serial EEPROM of SPI BUS interface method. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Packages W(Typ) x D(Typ) x H(Max) SPI BUS interface (CPOL, CPHA)=(0,0), (1,1) Voltage Range : 2.5V to 5.5V Operating Range : -40°C to +125°C Clock Frequency : 10MHz(Max) Write Time : 4ms(Max) Page Size : 64bytes Bit Format : 16384 x 8bit 64bytes Write Lockable Identification Page (ID Page) Address Auto Increment Function at Read Operation Auto Erase and Auto End Function at Data Rewrite Write Protect Block Setting by Software Memory Array 1/4, 1/2, Whole HOLD Function by HOLDB Pin Low Supply Current Write Operation (5V) : 1.0mA (Typ) Read Operation (5V) : 1.2mA (Typ) Standby State(5V) : 0.1µA (Typ) Prevention of Write Mistake Write prohibition at Power On Write prohibition by WPB Pin Write prohibition Block Setting Prevention of Write Mistake at Low Voltage Write Cycles : 1,000,000 Write Cycles (Ta≤85°C) : 500,000 Write Cycles (Ta≤105°C) : 300,000 Write Cycles (Ta≤125°C) Data Retention : 100 Years (Ta≤25°C) : 60 Years (Ta≤105°C) : 50 Years (Ta≤125°C) Data at Shipment Memory Array :FFh ID Page First 3 Addresses :2Fh, 00h, 0Eh Other Addresses :FFh Status Register WPEN, BP1, BP0 :0, 0, 0 LS :0 Lock Status TSSOP-B8, SOP8, SOP-J8 Packages AEC-Q100 Qualified 〇Product structure : Silicon monolithic integrated circuit www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 TSSOP-B8 SOP8 3.00mm x 6.40mm x 1.20mm 5.00mm x 6.20mm x 1.71mm SOP-J8 4.90mm x 6.00mm x 1.65mm 〇This product has no designed protection against radioactive rays 1/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Absolute Maximum Ratings (Ta=25°C) Parameter Symbol Rating Unit Vcc -0.3 to +6.5 V Supply Voltage 0.41 (TSSOP-B8) Power Dissipation Pd 0.56 (SOP8) (Note1) (Note2) W 0.56 (SOP-J8) (Note3) Storage Temperature Range Tstg -65 to +150 °C Operating Temperature Range Topr -40 to +125 °C - -0.3 to Vcc+0.3 V VESD -6000 to +6000 V Terminal Voltage Electrostatic Discharge Voltage (Human Body Model) (Note1) Derate by 3.3mW/°C when operating above Ta=25°C. (Note2) Derate by 4.5mW/°C when operating above Ta=25°C. (Note3) Derate by 4.5mW/°C when operating above Ta=25°C. Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Memory Cell Characteristics (Vcc=2.5V to 5.5V) Limit Parameter Write Cycles (Note4, 5) Unit Condition Min Typ Max 1,000,000 - - Cycles Ta≤85°C 500,000 - - Cycles Ta≤105°C 300,000 - - Cycles Ta≤125°C 100 - - Years Ta≤25°C 60 - - Years Ta≤105°C 50 - - Years Ta≤125°C Data Retention (Note4) (Note4) Not 100% TESTED (Note5) The Write Cycles is defined for unit of 4 data bytes with the same address bits of A13 to A2. Recommended Operating Ratings Parameter Symbol Rating Unit Supply Voltage Vcc 2.5 to 5.5 V Input Voltage VIN 0 to Vcc V Input / Output Capacitance (Ta=25°C, Frequency=5MHz) Parameter Input Capacitance (Note6) Output Capacitance (Note6) Symbol Conditions Min Max Unit CIN VIN=GND - 8 pF COUT VOUT=GND - 8 pF (Note6) Not 100% TESTED www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC DC Characteristics (Unless otherwise specified, Ta=-40°C to +125°C, Vcc=2.5V to 5.5V) Limit Parameter Symbol Unit Min Typ Max Conditions Input High Voltage VIH 0.7 Vcc - Vcc+0.3 V 2.5V≤Vcc≤5.5V Input Low Voltage VIL -0.3 - 0.3 Vcc V 2.5V≤Vcc≤5.5V Output Low Voltage VOL 0 - 0.4 V IOL=2.1mA Output High Voltage VOH 0.8 Vcc - Vcc V IOH=-2.0mA ILI -2 - +2 µA VIN=0V to Vcc ILO -2 - +2 µA VOUT=0V to Vcc, CSB=Vcc ICC1 - - 2.5 mA Vcc=2.5V, fSCK=5MHz, tE/W =4ms VIH/VIL=0.9Vcc/0.1Vcc, SO=OPEN ICC2 - - 5.5 mA Vcc=5.5V, fSCK=5 or 10 MHz, tE/W =4ms VIH/VIL=0.9Vcc/0.1Vcc, SO=OPEN ICC3 - - 1.5 mA Vcc=2.5V, fSCK=5MHz VIH/VIL=0.9Vcc/0.1Vcc, SO=OPEN ICC4 - - 2.0 mA Vcc=5.5V, fSCK=5MHz VIH/VIL=0.9Vcc/0.1Vcc, SO=OPEN ICC5 - - 4.0 mA Vcc=5.5V, fSCK=10MHz VIH/VIL=0.9Vcc/0.1Vcc, SO=OPEN ISB - - 10 µA Vcc=5.5V CSB=HOLDB=WPB=Vcc, SCK=SI=Vcc or 0V, SO=OPEN Input Leakage Current Output Leakage Current Supply Current (WRITE) Supply Current (READ) Standby Current www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC AC Characteristics (Ta=-40°C to +125°C, unless otherwise specified, load capacitance CL1=100pF) 2.5V≤Vcc≤5.5V Parameter 4.5V≤Vcc≤5.5V Symbol Unit Min Typ Max Min Typ Max SCK Frequency fSCK 0.01 - 5 0.01 - 10 MHz SCK High Time tSCKWH 85 - - 40 - - ns SCK Low Time tSCKWL 85 - - 40 - - ns CSB High Time tCS 85 - - 40 - - ns CSB Setup Time tCSS 90 - - 30 - - ns CSB Hold Time tCSH 85 - - 30 - - ns SCK Setup Time tSCKS 90 - - 30 - - ns SCK Hold Time tSCKH 90 - - 30 - - ns SI Setup Time tDIS 20 - - 10 - - ns SI Hold Time tDIH 30 - - 10 - - ns Data Output Delay Time1 tPD1 - - 60 - - 40 ns Data Output Delay Time2 (CL2=30pF) tPD2 - - 50 - - 30 ns Output Hold Time tOH 0 - - 0 - - ns Output Disable Time tOZ - - 100 - - 40 ns tHFS 0 - - 0 - - ns tHFH 40 - - 30 - - ns tHRS 0 - - 0 - - ns tHRH 70 - - 30 - - ns tHOZ - - 100 - - 40 ns tHPD - - 60 - - 40 ns tRC - - 2 - - 2 µs tFC - - 2 - - 2 µs tRO - - 40 - - 20 ns tFO - - 40 - - 20 ns tE/W - - 4 - - 4 ms HOLDB Setting Setup Time HOLDB Setting Hold Time HOLDB Release Setup Time HOLDB Release Hold Time Time from HOLDB to Output High-Z Time from HOLDB to Output Change SCK Rise Time SCK Fall Time (Note1) (Note1) Output Rise Time Output Fall Time (Note1) (Note1) Write Time (Note1) NOT 100% TESTED AC Measurement Conditions Parameter Limit Symbol Unit Min Typ Max Input Voltage 入力電圧 Load Capacitance1 CL1 - - 100 pF Load Capacitance2 CL2 - - 30 pF Input Rise Time - - - 50 ns Input Fall Time - - - 50 ns Input Voltage - 0.2 Vcc / 0.8 Vcc V Input / Output Judgment Voltage - 0.3 Vcc / 0.7 Vcc V 入出力判定電圧 Input / Output Voltage 0.8Vcc 0.7Vcc 0.3Vcc www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/35 0.2Vcc Figure 1. Input / Output Judgment Voltage TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Serial Input / Output Timing tCSS tCS CSB tSCKS tSCKWL tRC tSCKWH tFC SCK tDIS tDIH SI High-Z SO Figure 2. Input Timing SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the Most Significant Bit MSB. tCS tCSH tSCKH CSB SCK SI tPD tRO,tFO tOH tOZ High-Z SO Figure 3. Input / Output Timing SO is output in sync with data fall edge of SCK. Data is output from the Most Significant Bit MSB. "H" CSB "L" tHFS tHFH tHRS tHRH SCK tDIS SI n n+1 tHOZ SO n-1 tHPD High-Z Dn+1 Dn Dn Dn-1 HOLDB Figure 4. HOLD Timing www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Block Diagram VOLTAGE CSB INSTRUCTION DECODE DETECTION CONTROL CLOCK SCK GENERATION SI WRITE HIGH VOLTAGE INHIBITION GENERATOR INSTRUCTION IDENTIFICATION PAGE REGISTER HOLDB STATUS REGISTER ADDRESS REGISTER ADDRESS 14bit DECODER 14bit 128Kbit EEPROM DATA WPB READ/WRITE REGISTER 8bit 8bit AMP SO Figure 5. Block Diagram Pin Configuration Vcc HOLDB SCK SI BR25H128-2AC CSB SO WPB GND Figure 6. Pin Assignment Diagram Pin Description Pin Number Pin Name Input / Output 1 CSB Input Chip Select Input 2 SO Output Serial Data Output 3 WPB Input 4 GND - 5 SI Input Serial Data Input Start Bit, Instruction Code, Address and Data Input 6 SCK Input Serial Clock Input 7 HOLDB Input Hold Input Serial Communications may be suspended temporarily (HOLD State). 8 Vcc - www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 Function Write Protect Input Write Status Register Command is prohibited. All Input / Output Reference Voltage, 0V Supply Voltage 6/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Typical Performance Curves 6.0 6.0 Ta= -40°C Ta= 25°C Ta= 125°C 5.0 INPUT LOW VOLTAGE : VIL[V] INPUT HIGH VOLTAGE : VIH [V] Ta= -40°C Ta= 25°C Ta= 125°C 4.0 3.0 SPEC 2.0 1.0 0.0 5.0 4.0 3.0 2.0 SPEC 1.0 0.0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 0 Figure 7. Input High Voltage VIH (CSB, SCK, SI, HOLDB, WPB) 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 Figure 8. Input Low Voltage VIL (CSB, SCK, SI, HOLDB, WPB) 1.0 3.0 OUTPUT HIGH VOLTAGE : VOH [V] Ta= -40°C Ta= 25°C Ta= 125°C OUTPUT LOW VOLTAGE : VOL [V] 1 0.8 0.6 SPEC 0.4 0.2 2.5 SPEC 2.0 1.5 1.0 0.5 Ta= -40°C Ta= 25°C Ta= 125°C 0.0 0.0 0 1 2 3 4 5 OUTPUT LOW CURRENT : IOL[mA] Figure 9. Output Low Voltage www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 -6 6 VOL, IOL (Vcc=2.5V) -5 -4 -3 -2 -1 OUTPUT HIGH CURRENT : IOH [m A] Figure 10. Output High Voltage 7/35 0 VOH, IOH (Vcc=2.5V) TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Typical Performance Curves - continued 3.0 Ta= -40°C Ta= 25°C Ta= 125°C OUTPUT LEAKAGE CURRENT: I LO[µA] INPUT LEAKAGE CURRENT: I LI [µA] 3.0 2.5 SPEC 2.0 1.5 1.0 0.5 0.0 Ta= -40°C Ta= 25°C Ta= 125°C 2.5 SPEC 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 0 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 12. Output Leakage Current (SO) Figure 11. Input Leakage Current ILI (CSB, SCK, SI, HOLDB, WPB) 5 6 ILO 2.5 6.0 SPEC Ta= -40°C Ta= 25°C Ta= 125°C SUPPLY CURRENT (READ) : I cc3, 4 [mA] SUPPLY CURRENT (WRITE) : I cc1, 2 [mA] 1 5.0 4.0 3.0 SPEC 2.0 1.0 Ta= -40°C Ta= 25°C Ta= 125°C SPEC 2.0 SPEC 1.5 1.0 0.5 0.0 0.0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 13. Supply Current (WRITE) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 5 0 6 ICC1,2 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 14. Supply Current (READ) 8/35 5 6 ICC3,4 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Typical Performance Curves - continued 12 Ta= -40°C Ta= 25°C Ta= 125°C Ta= -40°C Ta= 25°C Ta= 125°C 5.0 SPEC 10 STANDBY CURRENT : I SB [µA] SUPPLY CURRENT (READ) : I cc5 [mA] 6.0 SPEC 4.0 3.0 2.0 8 6 4 1.0 2 0.0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 Figure 15. Supply Current (READ) 6 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 16. Standby Current ICC5 5 6 ISB 100 100 80 SCK HIGH TIME : t SCKWH [ns] SCK FREQUENCY : f SCK [MHz] SPEC SPEC 10 SPEC 1 Ta= -40°C Ta= 25°C Ta= 125°C 60 SPEC 40 20 Ta= -40°C Ta= 25°C Ta= 125°C 0 0.1 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 17. SCK Frequency www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 5 0 6 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 18. SCK High Time fSCK 9/35 5 6 tSCKWH TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Typical Performance Curves - continued 100 100 SPEC SPEC 80 CSB HIGH TIME : t CS [ns] SCK LOW TIME : t SCKWL [ns] 80 Ta= -40°C Ta= 25°C Ta= 125°C 60 SPEC 40 Ta= -40°C Ta= 25°C Ta= 125°C 60 20 20 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 SPEC 40 6 0 1 Figure 19. SCK Low Time tSCKWL 2 3 4 SUPPLY VOLTAGE : Vcc[V] 6 Figure 20. CSB High Time tCS 100 100 SPEC SPEC 80 80 CSB HOLD TIME : t CSH [ns] CSB SETUP TIME : t CSS [ns] 5 Ta= -40°C Ta= 25°C Ta= 125°C 60 40 SPEC Ta= -40°C Ta= 25°C Ta= 125°C 60 40 SPEC 20 20 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 0 Figure 21. CSB Setup Time tCSS www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] Figure 22. CSB Hold Time 10/35 5 6 tCSH TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Typical Performance Curves - continued 50 50 Ta= -40°C Ta= 25°C Ta= 125°C Ta= -40°C Ta= 25°C Ta= 125°C 40 SI HOLD TIME : t DIH [ns] SI SETUP TIME : t DIS [ns] 40 30 SPEC 30 SPEC 20 20 SPEC 10 10 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 SPEC 0 1 Figure 23. SI Setup Time tDIS Figure 24. SI Hold Time 5 6 tDIH 100 100 Ta= -40°C Ta= 25°C Ta= 125°C DATA OUTPUT DELAY TIME2 : t PD2 [ns] DATA OUTPUT DELAY TIME1 : t PD1 [ns] 2 3 4 SUPPLY VOLTAGE : Vcc[V] 80 SPEC 60 SPEC 40 20 Ta= -40°C Ta= 25°C Ta= 125°C 80 60 SPEC 40 SPEC 20 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 0 6 Figure 25. Data Output Delay Time1 tPD1 (CL1=100pF) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 Figure 26. Data Output Delay Time2 tPD2 (CL2=30pF) 11/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Typical Performance Curves - continued 50 OUTPUT DISABLE TIME : t OZ [ns] Ta= -40°C Ta= 25°C Ta= 125°C HOLDB SETTING HOLD TIME : t HFH [ns] 120 SPEC 100 80 60 SPEC 40 20 Ta= -40°C Ta= 25°C Ta= 125°C SPEC 40 SPEC 30 20 10 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 0 6 Figure 27. Output Disable Time tOZ 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 Figure 28. HOLDB Setting Hold Time tHFH 120 TIME FROM HOLDB TO OUTPUT High-Z : t HOZ [ns] 100 HOLDB RELEASE HOLD TIME : t HRH [ns] 1 Ta= -40°C Ta= 25°C Ta= 125°C SPEC 60 40 SPEC 20 0 1 SPEC 100 80 0 Ta= -40°C Ta= 25°C Ta= 125°C 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 60 SPEC 40 20 0 0 Figure 29. HOLDB Release Hold Time tHRH www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 80 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 Figure 30. Time from HOLDB to Output High-Z tHOZ 12/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC 100 100 Ta= -40°C Ta= 25°C Ta= 125°C Ta= -40°C Ta= 25°C Ta= 125°C 80 OUTPUT RISE TIME : t RO [ns] TIME FROM HOLDB TO OUTPUT CHANGE : tHPD [ns] Typical Performance Curves - continued SPEC 60 SPEC 40 20 80 60 SPEC 40 SPEC 20 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 0 Figure 31. Time from HOLDB to Output Change tHPD 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 Figure 32. Output Rise Time tRO 8 100 Ta= -40°C Ta= 25°C Ta= 125°C Ta= -40°C Ta= 25°C Ta= 125°C 6 WRITE TIME : t E/W [ms] OUTPUT FALL TIME : t FO [ns] 80 60 SPEC 40 2 SPEC 20 SPEC 4 0 0 0 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 0 6 Figure 33. Output Fall Time tFO www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 1 2 3 4 SUPPLY VOLTAGE : Vcc[V] 5 6 Figure 34. Write Time tE/W 13/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC 1. Features (1) Status Register This IC has the Status Registers. Status Registers are of 8 bits and express the following parameters. WPEN, BP0 and BP1 can be set by Write Status Register command. These 3 bits are memorized into the EEPROM, therefore are valid even when supply voltage is turned off. Write Cycles and Data Retention of Status Registers are same as characteristics of the EEPROM. WEN can be set by Write Enable command and Write Disable command. WEN becomes write disable status when ―― supply voltage is turned off. R /B is for write confirmation, therefore cannot be set externally. The values of Status Register can be read by Read Status Register command. Table 1. Status Register D7 D6 D5 WPEN 0 0 D4 0 Table 2. Function of Status Register Memory bit Location WPEN D3 D2 BP1 BP0 D1 WEN WPEN=0=Invalid, W PEN=1=Valid BP1 BP0 EEPROM WEN Register R /B Function Pin Enable / Disable designation bit for WPB pin EEPROM D0 ―― EEPROM Write Disable Block designation bit Content WPEN bit enables / disables the function of WPB pin. BP1 and BP0 bits designate the Write Disable Block of EEPROM. Refer Table 3. Write Disable Block Setting. Write Enable/Write Disable Confirmation bit WEN bit indicates the status of write enable or for WRITE, WRSR, WRID and LID write disable for WRITE, WRSR, WRID, LID. WEN=0=Prohibited, W EN=1=Permitted ――――――― ―― R /B Register Write Cycle Status(READY/BUSY) Confirmation bit ―― ―― R /B=0=READY , R /B=1=BUSY ―― R /B bit indicates the status of READY or BUSY of the write cycle. Table 3. Write Disable Block Setting Status Register Protected Block Protected Addresses 0 None None 0 1 Upper 1/4 3000h to 3FFFh 1 0 Upper 1/2 2000h to 3FFFh 1 1 Whole Memory 0000h to 3FFFh, ID Page BP1 BP0 0 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 14/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (2) Write Protect Mode by WPB pin By setting WPB = Low with WPEN = 1, Write Status Register command is disabled. Only when WPEN bit is set “1”, the WPB pin functions become valid. However, when write cycle is in execution, no interruption can be made. Table 4. Write Protect Mode Instruction WPEN bit WPB pin 0 X 1 1 Writable Writable 1 0 Write Protected Writable WRSR WRITE/WRID/LID Writable Writable WPB is normally fixed to High or Low for use, but when WPB is controlled so as to cancel Write Status Register command, pay attention to the following WPB Valid Timing. Write Status Register command is executed, by setting WPB = Low in cancel valid area, command can be cancelled. The Data area (from 7th fall of SCK to 16th rise of SCK) becomes the cancel valid area. However, once write is started, any input cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes invalid. CSB SCK Instruction Write Protect 6 7 15 Instruction Code Data Invalid Valid 16 tE/W Data Write Time Invalid Figure 35. WPB Valid Timing (WRSR) (3) Hold Mode by HOLDB pin By the HOLDB pin, serial communication can be stopped temporarily (HOLD status). HOLDB pin carries out serial communications normally when it is High. To get in HOLD status, at serial communication, when SCK = Low, set the HOLDB pin Low. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release the HOLD status, set the HOLDB pin High when SCK = Low. After that, communication can be restarted from the point before the HOLD status. For example, when HOLD status is made after A5 address input at Read command, after release of HOLD status, by starting A4 address input, Read command can be restarted. When in HOLD status, leave CSB = Low. When it is set CSB = High in HOLD status, the IC is reset, therefore communication after that cannot be restarted. SCK HOLDB HOLD Status HOLD Status Figure 36. HOLD Status www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 15/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (4) ID Page This IC has 64 bytes Write lockable Identification Page (ID Page) in addition to Memory Array. The data in the first 3 addresses are for device identification. These data are over written by Write ID Page command. Table 5. Data in the first 3 addresses ID Page Address Data 00h 2Fh 01h 00h 02h 0Eh Content Manufacturer Code (ROHM) Interface Method (SPI) Memory Density (128Kbit) By setting Lock Status (LS) bit to “1” with Lock ID Page command, it is prohibited to write to ID page permanently. It is not reversible to set from ID Page Lock Status (LS=”1”) to ID Page Lock Release status (LS=”0”). Table 6. Function of Lock Status Memory bit Function Location ID Page Lock/ Lock Release Status designation bit LS EEPROM LS=0=ID Page Lock Release LS=1=ID Page Lock Content LS bit can set Lock Status to ID Page. (5) ECC Function This IC has ECC bits for Error Correction to each 4 data bytes with the same address bits of A13 to A2. In the Read operation, even if there is 1 bit data error in the 4 bytes, IC corrects to correct data by ECC function and outputs data corrected. Even if write operation is started with only 1 byte data input, this IC rewrites the data of 4 bytes with the same address bits of A13 to A2 and the data of ECC bits added to these 4 bytes data. In order to maximize Write Cycles specified, it is recommended to write with data input of each 4 bytes with the same address bits of A13 to A2. Table 7. Example of 4 data bytes with the same address bits of A13 to A2 (Address 0000h,0001h,0002h,0003h) NonSame Address Bits from A13 to A2 Common Address A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000h 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0001h 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0002h 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0003h www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 16/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC 2. Instruction Mode After setting CSB pin from High to Low, to execute each command, input Instruction Code, Address and Data from the Most Significant Bit MSB. Table 8. Instruction Mode Instruction Content Instruction Code (8bit) Address(MSB) / Data (8bit) Address (LSB) (8bit) Data (8bit) WREN Write Enable 0000 0110 - - - WRDI Write Disable 0000 0100 - - - READ Read 0000 0011 A15 to A8 (Note1) A7 to A0 D7 to D0 Output WRITE Write 0000 0010 A15 to A8 (Note1) A7 to A0 D7 to D0 Input RDSR Read Status Register 0000 0101 D7 to D0 Output - - WRSR Write Status Register 0000 0001 D7 to D0 Input - - RDID Read ID Page 1000 0011 0000 0000 00A5 to A0 D7 to D0 Output WRID Write ID Page 1000 0010 0000 0000 00A5 to A0 D7 to D0 Input RDLS Read Lock Status 1000 0011 0000 0100 0000 0000 LID Lock ID page 1000 0010 0000 0100 0000 0000 (Note2) (Note2) D7 to D0 Output (Note3) D7 to D0 Input (Note3) (Note1) Address bit A15, A14 = Don’t Care (Note2) Refer Figure 43. , Figure 44.. (Note3) Refer Figure 47. , Figure 48.. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 17/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC 3. Timing Chart (1) Write Enable Command (WREN) It is set to write enable status by Write Enable command. As for this command, set CSB to Low, and then input the Instruction Code of Write Enable command. This command is accepted at the 7th rise of SCK. Even with input over 7 clocks, command becomes valid. Before carrying out Write command, Write Status Register command, Write ID Page command and Lock ID Page command, it is necessary to set write enable status by the Write Enable command. CSB 0 SCK SI SO 0 1 0 2 0 3 0 4 0 5 1 6 1 7 0 High-Z Figure 37. Write Enable Command (2) Write Disable Command (WRDI) It is set to write disable status, WEN bit becomes to “0”, by Write Disable command. As for this command, set CSB to Low, and then input the Instruction Code of Write Disable command. This command is accepted at the 7th rise of SCK. Even with input over 7 clocks, command becomes valid. If Write command, Write Status Register command, Write ID Page command or Lock ID Page command is input in the write disable status, commands are cancelled. And even in the write enable status, once Write command, Write Status Register command, Write ID Page command or Lock ID Page is executed, it gets in the write disable status. After power on, this IC is in write disable status. CSB SCK SI SO 0 0 1 0 2 0 3 0 4 0 5 1 6 0 7 0 High-Z Figure 38. Write Disable Command www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 18/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (3) Read Command (READ) By Read command, data of EEPROM can be read. As for this command, set CSB to Low, then input address after Instruction Code of Read command. This IC starts data output of the designated address. Data output is started from SCK fall of 23 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, data of the next address can be read. Increment read can read all the addresses of EEPROM Array. After reading data of the most significant address, by continuing increment read, data of the least significant address is read. ~ ~ ~ ~ CSB ~ 0 1 2 3 4 5 6 7 8 9 0 0 0 0 0 11 23 0 1 X 1 X ~ ~ SI 10 24 30 31 Address Input (16bit) ~ ~ Instruction Code(8bit) ~ ~ SCK A13 A12 A1 A0 second byte D7 D7 ~ ~ Data Outputs of first byte (8bit) ~ SO High-Z D6 D2 D1 D0 X =Don’t Care Figure 39. Read Command (4) Write Command (WRITE) By Write command, data of EEPROM can be written. As for this command, set CSB to Low, then input address and data after Instruction Code of Write command. Then, by making CSB to High, the IC starts write operation. The write time of EEPROM requires time of tE/W (Max 4ms). To start write operation, set CSB Low to High after taking the last data (D0), and before the next SCK clock starts. At other timing, Write command is not executed, and this Write command is cancelled. During write operation, other than Read Status Register command is not accepted. This IC has Page Write function, and after input of data for 1 byte (8bits), by continuing data input without setting CSB High to Low, data up to 64 bytes can be written for one tE/W . In Page Write, the addressed lower 6 address bits are incremented internally at every time when data of 1 byte is inputted and data is written to respective addresses. When the data input exceeds the last address byte of the page, address rolls over to the first address byte of the same page. It is not recommended to input data over 64 bytes, it is recommended to input data in 64 bytes. In case of the data input over 64 bytes, it is explained in Table 10. 0 1 2 3 4 5 6 7 8 9 0 0 0 0 0 23 24 1 X 0 X A13 A12 30 31 32 Data Input (8bit) A1 A0 D7 D6 D2 D1 D0 ~ ~ SO 0 ~ ~ ~ ~ SI 11 10 Address Input (16bit) ~ ~ ~ ~ Instruction Code (8bit) CSB ri sing v alid ti ming to start write operation ~ ~ SCK ~ ~ ~ ~ ~ ~ CSB High-Z X=Don't Care Figure 40. Write Command (Byte Write) 2 3 4 5 6 7 8 9 0 0 Addres s Input (16bit) 1 0 X X A13 A12 25 (8n+24)-8(8n+24)-7 (8n+24)-2 (8n+24)-1 8n+24 30 31 32 33 ~ ~ 0 24 Data Input of first byte (8bit) A1 A0 D7 D6 ~ ~ D1 D0 D7 D6 Data Input of nth byte D7 D6 D1 D0 ~ ~ SO 0 23 ~ ~ SI 0 11 ~ ~ ~ ~ Instruction Code (8bit) 0 10 ~ ~ 1 CSB ri sing valid timing to start write operation ~ ~ 0 ~ ~ SCK ~ ~ ~ ~ ~ ~ CSB High-Z X=Don’t care Figure 41. Write Command (Page Write) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 19/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (a) Page Write Function 64 bytes of Page Page 0 Page 1 Page 2 ・ ・ Page 254 Page 255 Column 0 0000h 0040h 0080h ・ ・ 3F80h 3FC0h Column 1 0001h 0041h 0081h ・ ・ 3F81h 3FC1h Column 2 0002h 0042h 0082h ・ ・ 3F82h 3FC2h Column 62 003Eh 007Eh 00BEh ・ ・ 3FBEh 3FFEh ・・・ ・・・ ・・・ ・・・ ・ ・ ・・・ ・・・ Column 63 003Fh 007Fh 00BFh ・ ・ 3FBFh 3FFFh These column addresses are These column addresses are the first address of each pages. the last address of each pages. Figure 42. EEPROM physical address for Page Write command (64Byte) ● In case of Page Write command with lower than 64 bytes data input Table 9. Example of Page Write with 2 bytes data input 4 bytes group Group 0 Group 15 ・・・ ・・・ Addresses of Page 0 0000h 0001h 0002h 0003h 0004h ・・・ 003Ch 003Dh 003Eh 003Fh ① Previous Data 00h 01h 02h 03h 04h ・・・ 3Ch 3Dh 3Eh 3Fh ② Input data for Page Write (2 bytes) AAh 55h - - - ・・・ - - - - ③ The Data after Write operation AAh 55h 02h 03h 04h ・・・ 3Ch 3Dh 3Eh 3Fh No. No.① :These data are EEPROM data before Write operation. No.② :Inputted 2 bytes data AAh, 55h from address 0000h. No.③ :If Write operation is executed with the data of No.②, the data are changed from the data of No.① to the data of No.③. The data of address 0000h, 0001h are changed to data AAh, 55h, the data of address 0002h, 0003h, the 4 bytes group of Group 0, are over-written to data 02h, 03h. When Write command is cancelled, EEPROM data keep No.①. ● In case of Page Write command with more than 64 bytes data input Table 10. Example of Page Write with 66 bytes data input 4 bytes group Group 0 Group 15 ・・・ ・・・ Addresses of Page 0 0000h 0001h 0002h 0003h 0004h ・・・ 003Ch 003Dh 003Eh 003Fh ① Previous Data 00h 01h 02h 03h 04h ・・・ 3Ch 3Dh 3Eh 3Fh Input data for Page Write (66 bytes) 55h AAh 55h AAh 55h ・・・ 55h AAh 55h AAh ② FFh 00h - - - ・・・ - - - - ③ The Data after Write operation FFh 00h 02h 03h 55h ・・・ 55h AAh 55h AAh No. No.① :These data are EEPROM data before Write operation. No.② :Inputted 66 bytes data 55h, AAh, ・・・・, 55h, AAh, FFh, 00h from address 0000h. The data of address 0000h, 0001h are set to data 55h, AAh first. The data of address 0002h, 0003h are set to data 55h, AAh. After inputting data to Maximum byte (003Fh), the data address 0000h, 0001h are set to data FFh, 00h again. No data input to address 0002h, 0003h again. No.③ :If Write operation is executed with the data of No.②, the data are changed from the data of No.① to the data of No.③. The data of address 0000h, 0001h are changed to FFh, 00h inputted data later, not to 55h, AAh inputted data first. The data of address 0002h, 0003h, the 4 bytes group of Group 0, are over-written to 02h, 03h of Previous Data, not to 55h, AAh inputted data first. The data of other addresses are changed to 55h, AAh・・・・, 55h, AAh. When Write command is cancelled, EEPROM data keep No.①. ● Roll Over In Page Write command, when data is set to the last address of a page (e.g. address “003Fh” of page 0), the next data will be set to the first address of the same page (e.g. address “0000h” of page 0). This is why Page Write address increment is available in the same page. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 20/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (5) Read Status Register Command (RDSR) By Read Status register command, data of status register can be read. As for this command, set CSB to Low, then input Instruction Code of Read Status Register command. This IC starts data output of the status register. Data output is started from SCK fall of 7 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, this IC repeats to output data of the status register. Even if in write operation, Read Status Register command can be executed. CSB SCK 0 1 2 3 4 5 6 7 8 9 10 12 11 13 14 15 Instruction Code (8bit) SI 0 0 0 0 0 1 0 1 Data Output (8bi t) High-Z SO D7 D6 D5 D4 D3 D2 D1 D0 W PEN 0 0 0 BP1 BP0 WEN R/B Figure 43. Read Status Register Command (6) Write Status Register Command (WRSR) Write Status Register command can write status register data. The data can be written by this command are 3 bits, that is, WPEN (D7), BP1 (D3) and BP0 (D2) among 8 bits of status register. As for this command, set CSB to Low, and input Instruction Code of Write Status Register command, and input data. Then, by making CSB to High, this IC starts write operation. Write Time requires time of tE/W as same as Write command. As for CSB rise, start CSB after taking the last data bit (D0), and before the next SCK clock starts. At other timing, command is cancelled. To the write disabled block, write cannot be made, and only read can be made. During write operation, other than Read Status Register command is not accepted. CSB 0 SCK 1 2 3 4 5 6 7 8 9 In st ru ct io n C ode (8 bit) D7 SI SO 0 0 0 0 0 0 0 1 W PEN D6 * 10 11 12 13 Da ta Ou tput (8b it) D5 D4 D3 * * BP1 14 15 D2 D1 D0 BP0 * * High-Z X=Don't care Figure 44. Write Status Register Command www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 21/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (7) Read ID Page Command (RDID) By Read ID Page command, data of ID Page can be read. As for this command, set CSB to Low, then input address after Instruction Code of Read ID Page command. Input address bit A10 as “0”, other upper address bits A13 to A6 as “0”. By inputting lower address bits A5 to A0, it is possible to address to 64 bytes ID Page. Data output is started from SCK fall of 23 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, data of the next address can be read. After reading data of the most significant address of ID Page, by continuing increment read, data of the least significant address of ID Page is read. ~ ~ ~ CSB ~ ~ 0 1 2 3 4 5 6 7 8 9 1 0 0 0 0 11 23 0 1 1 0 A13 A12 0 ~ ~ SI 10 24 30 31 Address Input (16bit) ~ ~ Instruction Code(8bit) ~ ~ SCK A1 A0 second byte D7 D7 ~ ~ Data Outputs of first byte (8bit) ~ ~ High-Z SO D6 D2 D1 D0 Figure 45. Read ID Page Command (8) Write ID Page Command (WRID) By Write ID Page command, data of ID Page can be written. As for this command, set CSB to Low, then input address and data after Instruction Code of Write ID Page command. Input address bit A10 as “0”, other upper address bits A13 to A6 as “0”. By inputting lower address bits A5 to A0, it is possible to address to 64 bytes ID Page. Then, by making CSB to High, the IC starts write operation. To start write operation, set CSB Low to High after taking the last data (D0), and before the next SCK clock starts. At other timing, Write ID Page command is not executed, and this Write ID Page command is cancelled. The write time of EEPROM requires time of tE/W (Max 4ms). During write operation, other than Read Status Register command is not accepted. In case of Lock Status (LS) bit “1”, Write ID Page command can’t be executed. Write ID Page command has Page Write Function same as Write command. 0 1 2 3 4 5 6 7 8 9 0 0 0 0 0 23 24 1 0 0 0 A13 A12 A1 30 31 32 Data Input (8bit) A0 D7 D6 D2 D1 D0 ~ ~ SO 1 11 ~ ~ ~ ~ SI 10 Address Input (16bit) ~ ~ ~ ~ Instruction Code (8bit) CSB ri sing v alid ti ming to start write operation ~ ~ SCK ~ ~ ~ ~ ~ ~ CSB High-Z Figure 46. Write ID Page Command www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 22/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC (9) Read Lock Status Command (RDLS) By Read Lock Status command, data of Lock Status can be read. As for this command, set CSB to Low, then input address after Instruction Code of Read Lock Status command. Input address bit A10 as “1”, other address bits A13 to A0 as “0”. Data output is started from SCK fall of 23 clock, and from D7 to D0 sequentially. The data D0 indicates Lock Status bit. The data D7 to D1 are Don’t Care. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input of SCK, this IC repeats to output data of the Lock Status byte. In case of Lock Status (LS) bit “1”, ID Page is locked, Write ID Page command can’t be executed. In case of LS bit “0”, ID Page is released to lock, Write ID Page command can be executed. ~ ~ ~ ~ CSB ~ 0 1 2 3 4 5 6 7 8 9 1 0 0 0 0 11 23 0 1 1 0 0 ~ ~ SI 10 24 30 31 Address Input (16bit) ~ ~ Instruction Code(8bit) ~ ~ SCK A13 A12 A1 A0 D6 X X ~ ~ ~ SO D7 ~ ~ Data Outputs of first byte (8bit) High-Z X D2 D1 D0 X X LS second byte X =D on’t Care Figure 47. Read Lock Status Command (10) Lock ID Page Command (LID) By Lock ID Page command, data of Lock Status can be written. In case of Lock Status (LS) bit “1”, Lock ID Page command can’t be executed permanently. As for this command, set CSB to Low, then input address and data after Instruction Code of Lock ID Page command. Input address bit A10 as “1”, other address bits A13 to A0 as “0”. The data D1 is for LS bit, other data bits are Don’t Care. Then, by making CSB to High, the IC starts write operation. To start write operation, set CSB Low to High after taking the last data (D0), and before the next SCK clock starts. At other timing, Lock ID Page command is not executed, and this Lock ID Page command is cancelled. The write time of EEPROM requires time of tE/W (Max 4ms). During write operation, other than Read Status Register command is not accepted. 0 1 2 3 4 5 6 7 8 0 0 0 0 0 11 23 24 1 0 0 0 A13 A12 A1 30 31 32 Data Input (8bit) A0 D7 D6 X X X D2 D1 D0 X LS X ~ ~ SO 1 10 ~ ~ ~ ~ SI 9 Address Input (16bit) ~ ~ ~ ~ Instruction Code (8bit) CSB ri sing v alid ti ming to start write operation ~ ~ SCK ~ ~ ~ ~ ~ ~ CSB High-Z X=Don’t Care Figure 48. Lock ID Page Command At Standby State 1. Standby Current Set CSB = High, and be sure to set SCK, SI, WPB and HOLDB inputs = Low or High. Do not input intermediate electric potential. 2. Timing As shown in Figure.49, at standby, when SCK is High, even if CSB is fallen, SI status is not read at fall edge. SI status is read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB = High status. Even if CSB is fallen at SCK=SI=”H”, SI status is not read at that edge. CSB Command start here. SI is read. SCK 0 1 2 SI Figure 49. Operating Timing www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 23/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Method to cancel each command 1. READ, RDID, RDLS ・Method to cancel : cancel by CSB = High Instruction Code Address Data 8bits 16bits 8bits Cancel available in all areas of read modes Figure 50. READ, RDID, RDLS Cancel Valid Timing 2. RDSR ・Method to cancel : cancel by CSB = High Instruction Code Data 8 bits 8 bits Cancel available in all areas of RDSR Figure 51. RDSR Cancel Valid Timing 3. WRITE, WRID, LID a:Instruction Code, Address Input Area Cancellation is available by CSB = High. b:Data Input Area (D7 to D1 input area) Cancellation is available by CSB = High. c:Data Input Area (D0 area) When CSB is started, write starts. After CSB rise, cancellation cannot be made by any means. d:tE/W Area Cancellation is available by CSB = High. However, when write starts (CSB is started) in the area c, cancellation cannot be made by any means. And by inputting on SCK clock, cancellation cannot be made. In page write mode, there is write enable area at every 8 clocks Instruction Code Address Data 8 bits 16 bits 8 bits a t E/ W b d c SCK SI D7 D6 D5 D4 D3 D2 D1 D0 c b Figure 52. WRITE, WRID, LID Cancel Valid Timing Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again. Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable, therefore, it is recommended to fall in SCK = Low area. As for SCK rise, assure timing of tCSS / tCSH or higher. 4. WRSR a:From Instruction code to 15th rising of SCK Cancel by CSB = High. b:From 15th rising of SCK to 16th rising of SCK (write enable area) When CSB is started, write starts. c: After 16th rising of SCK Cancel by CSB = High. However, when write starts (CSB is started) in the area b, cancellation cannot be made by any means. And, by inputting on SCK clock, cancellation cannot be made. 14 SCK D1 SI a Instruction Code 15 16 D0 b c t E/W Data 8 bits 17 8 bits a c b Figure 53. WRSR Cancel Valid Timing Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again. Note 2) If CSB is started at the same timing as that of the SCK rise, write execution / cancel becomes unstable, therefore, it is recommended to fall in SCK = Low area. As for SCK rise, assure timing of tCSS / tCSH or higher. 5. WREN/WRDI a:From instruction code to 7th rising of SCK Cancel by CSB = High. b:Cancellation is not available when CSB is started after 7th clock. SCK 6 7 8 Instruction Code 8 bits a b Figure 54. WREN/WRDI Cancel Valid Timing www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 24/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC High Speed Operation In order to realize stable high speed operations, pay attention to the following input / output pin conditions. 1. Pull Up, Pull Down Resistance for Input Pins When to attach pull up, pull down resistance to EEPROM input pins, select an appropriate value for the microcontroller VOL, IOL from VIL characteristics of this IC. 2. Pull Up Resistance VCC -VOLM IOLM VOLM ≤VILE RPU ≥ Microcontroller IO LM RP U EEPROM VO LM VI LE Low Output ・・・① ・・・② Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA, from the equation ①, Low Input RPU ≥ ・VILE : VIL specifications of EEPROM ・VOLM : VOL specifications of Microcontroller ・IOLM : IOL specifications of Microcontroller 5 - 0.4 2 × 10 -3 ∴RPU ≤ 2.3 [ kΩ ] With the value of RPU to satisfy the above equation, VOLM becomes 0.4V or lower, and with VILE (=1.5V), the equation ② is also satisfied. And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make CSB pull up. Figure 55. Pull Up Resistance 3. Pull Down Resistance Microcontroller VO HM High Output VOHM IOHM VOHM ≥VIHE RPD ≥ EEPROM VI HE IOHM RP D High Input ・・・③ ・・・④ Example) When VCC=5V, VOHM=VCC-0.5V, IOHM=0.4mA, VIHE=VCC×0.7V, from the equation ③ ・VIHE : VIH specifications of EEPROM ・VOHM : VOH specifications of Microcontroller ・IOHM : IOH specifications of Microcontroller RPD ≥ 5 - 0. 5 0.4 × 10 -3 ∴RPU ≥ 11.3 [ kΩ ] Figure 56. Pull Down Resistance Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude of Vcc / GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of 0.8Vcc / 0.2Vcc (Note1) is input, operation speed becomes slow. In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as possible, and make the amplitude of signal input to EEPROM close to the amplitude of Vcc / GND level. (Note1) At this moment, operating timing guaranteed value is guaranteed. tPD - VIL Characteristic 80 70 Spec tPD [ns] 60 50 40 30 Vcc=2.5V 20 Ta=25 °C VIH=Vcc C L=100pF 10 0 0 0.2 0.4 0.6 0.8 1 VIL [V] Figure 57. VIL dependency of Data Output Delay Time tPD 4. SO Load Capacitance Condition Load capacitance of SO Pin affects upon delay characteristic of SO output. (Data Output Delay Time, Time from HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacitance small. In concrete, “Do not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and so forth. 5. Other Cautions Make the wire length from the Microcontroller to EEPROM input signal same length, in order to prevent setup / hold violation to EEPROM, owing to difference of wire length of each input. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 25/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC I/O Equivalence Circuit 1. Output Circuit SO OEint. Figure 58. SO Output Equivalent Circuit 2. Input Circuit RESETint. CSB Figure 59. CSB Input Equivalent Circuit SI SCK Figure 61. SI Input Equivalent Circuit Figure 60. SCK Input Equivalent Circuit WPB HOLDB Figure 63. WPB Input Equivalent Circuit Figure 62. HOLDB Input Equivalent Circuit www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 26/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Power-Up/Down Conditions 1. At power ON/OFF, set CSB = High (=Vcc). When CSB is Low, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may cause malfunction, mistake write or so. To prevent these, at power ON, set CSB = High. (When CSB is in High status, all inputs are canceled.) Vcc Vcc GND Vcc CSB GND Good Bad Example Example Figure 64. CSB Timing at power ON / OFF (Good example) CSB Pin is pulled up to Vcc. At power OFF, take 10ms or higher before supply. If power is turned on without observing this condition, the IC internal circuit may not be reset, which please note. (Bad example) CSB Pin is Low at power ON/OFF. In this case, CSB always becomes Low (active status), and EEPROM may have malfunction, mistake write owing to noises and the likes. Even when CSB input is High-Z, the status becomes like this case, which please note. 2. POR Circuit This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR , it gets in write disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to noises and the likes. Table 11. Recommended conditions of tR, tOFF, Vbot tR Vcc tOFF Vbot 0 tR tOFF Vbot 10ms or below 10ms or higher 0.3V or below 100ms or below 10ms or higher 0.2V or below Figure 65. Rise Waveform 3. LVCC Circuit LVCC (VCC-Lockout) circuit prevents data rewrite operation at low supply voltage, and prevents wrong write. At LVCC voltage (Typ. =1.9V) or below, it prevent data rewrite. Noise Countermeasures 1. Vcc Noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a bypass capacitor (0.1µF) between IC Vcc and GND. At that moment, attach it as close to IC as possible. And, it is also recommended to attach a bypass capacitor between board Vcc and GND. 2. SCK Noise When the rise time (tRC) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set about 0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time (tRC) of SCK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures. Make the clock rise, fall time as small as possible. 3. WPB Noise During execution of Write Status Register command, if there exist noises on WPB pin, mistake in recognition may occur and forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input. In the same manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 27/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the Pd rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 28/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Operational Notes – continued 11. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. 12. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 29/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Part Numbering B R 2 5 H 1 2 8 x x x - 2 A C x x BUS Type 25 : SPI Operating Temperature / Voltage o o H : -40 C to +125 C / 2.5V to 5.5V Capacity 128 : 128Kbit Package FVT : TSSOP-B8, F : SOP8, FJ : SOP-J8 2 A C : Process Code : Revision : For Automotive Application Packaging and Forming Specification E2 : Embossed tape and reel Lineup Package Capacity 128Kbit Orderable Part Number Type Quantity TSSOP-B8 Reel of 3000 BR25H128FVT -2ACE2 SOP8 Reel of 2500 BR25H128F -2ACE2 SOP-J8 Reel of 2500 BR25H128FJ -2ACE2 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 30/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Physical Dimension, Tape and Reel Information Package Name TSSOP-B8 Tape Embossed carrier tape Quantity 3000pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand 1pin Reel www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 ) Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 31/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Physical Dimensions, Tape and Reel Information - continued Package Name SOP8 (Max 5.35 (include.BURR) Tape Embossed carrier tape Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand Direction of feed 1pin Reel www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 ) ∗ Order quantity needs to be multiple of the minimum quantity. 32/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Physical Dimensions, Tape and Reel Information - continued Package Name SOP-J8 Tape Embossed carrier tape Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand Direction of feed 1pin Reel www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 ) ∗ Order quantity needs to be multiple of the minimum quantity. 33/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Marking Diagrams (TOP VIEW) TSSOP-B8 (TOP VIEW) Part Number Marking SOP8 (TOP VIEW) H 1 2 8 A Part Number Marking H 1 2 8 A LOT Number LOT Number 1PIN MARK 1PIN MARK SOP-J8 (TOP VIEW) Part Number Marking H 1 2 8 A LOT Number 1PIN MARK www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 34/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Datasheet BR25H128-2AC Revision History Date Revision 18.Aug.2014 001 Changes New Release www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・ 15・ 001 35/35 TSZ02201-0R1R0G100190-1-2 18.Aug.2014 Rev.001 Notice Precaution on using ROHM Products 1. (Note 1) If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment , aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PAA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PAA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.003 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2015 ROHM Co., Ltd. All rights reserved. Rev.001
BR25H128FVT-2ACE2 价格&库存

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BR25H128FVT-2ACE2
    •  国内价格 香港价格
    • 1+10.352811+1.25538
    • 10+8.4859110+1.02900
    • 50+7.0715950+0.85750
    • 100+6.71599100+0.81438
    • 500+6.26341500+0.75950
    • 1000+6.045201000+0.73304
    • 2000+5.624952000+0.68208
    • 4000+5.560294000+0.67424

    库存:31