BU21024GUL-ME2

Touch Screen Controller ICs Resistive Type Touch Screen Controller ICs BU21023GUL, BU21023MUV, BU21024FV-M No.11105EAT01 ●Description Unlike most resistive touch screen controllers, the BU21023/ BU21024 4-wire resistive touch screen controllers enable dual-touch detection and gesture recognition. These intelligent controllers expose a set of registers to a host processor and are software configurable. The controllers can detect single point coordinates, dual coordinates, pinch, spread, rotate left and rotate right gestures, enabling pan and zoom operations in applications that previously had to rely exclusively on capacitive touch technology. Resistive touch does not require custom panel development which reduces development cost and results in faster time to market across a family of products. ●Features 1) Enables single touch, dual touch & gesture recognition using standard 4-wire resistive touch panels 2) Adjustable touch detection threshold allows fine tuning of pressure sensitivity for an application 3) Enables measurement of single point touch pressure 2 4) SPI and I C like interface for interfacing to host processor 5) Programmable interrupt polarity 6) 10-bit ADC provides sufficient resolution for finger or stylus inputs 7) Firmware for internal CPU may be downloaded from Host processor or from an EEPROM 8) Includes filtering options to eliminate false coordinates 9) Built in support for intelligent calibration 10) Easy to swap X & Y coordinates or adapt to different touch panel connections 11) Single 3V power supply 12) Available in a range of small package sizes and temperature ranges 13) Ideally suited for large volume automotive, consumer and industrial applications ●Application ・Products with a LCD that can benefit from pan and zoom operations. ・Smart phones, Digital Cameras, Video Cameras, GPS Receivers, Printers, Copiers, automotive navigation panels, touch kiosks ・Tablet PCs , Notebook computers, LCD displays (with USB interface) ●Line up matrix Parameter Screen Maximum detection point Integrated Filter process Gesture Detection Supplied Voltage Range(V) Temperature Range(℃) Host I/F PKG BU21023GUL 4-wire resistive touch screen 2 Yes Yes 2.7 － 3.6 -20 － 85 4-wire SPI 2-wire serial VCSP50L2 BU21023MUV 4-wire resistive touch screen 2 Yes Yes 2.7 － 3.6 -20 － 85 4-wire SPI 2-wire serial VQFN028V5050 BU21024FV-M 4-wire resistive touch screens 2 Yes Yes 2.7 － 3.6 -40 － 85 4-wire SPI 2-wire serial SSOP-B28 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●Absolute Maximum Ratings Parameter Power supply voltage Input voltage BU21023GUL Power dissipation BU21023MUV BU21024FV-M Storage temperature range Tstg Pd Symbol VDD VIN Ratings -0.3 ～ 4.5 VSS-0.3 ～ VDD+0.3 830 *1 Technical Note Unit V V mW mW mW ℃ Condition 704 *2 850 *3 -50 ～ 125 *1 Derate by 7.04 mW /℃ centigrade when ambient temperature exceeds 25℃. Measured using Epoxy-Glass PCB measuring 50x58x1.75 mm *2 Derate by 8.30mW /℃ centigrade when ambient temperature exceeds 25℃. Measured using Epoxy-Glass PCB measuring 50x58x1.75mm *3 Derate by 8.50mW /℃ centigrade when ambient temperature exceeds 25℃. Measured using Epoxy-Glass PCB measuring 50x58x1.75mm ●Recommended Operating Conditions Parameter Power supply voltage Digital core power supply Operating temperature range BU21023GUL BU21023MUV BU21024FV-M Symbol VDD DVDD Ratings Min. 2.70 1.62 -20 Topr -40 25 85 ℃ Typ. 3.00 1.80 25 Max. 3.60 1.98 85 Unit V V ℃ DVDD_EXT=H Condition Note: The BU21023/BU21024 controllers can be operated with a single 3V VDD supply. It is also possible to supply 1.8V DVDD from an external source if the DVDD_EXT pin is connected to logic high. ●Electrical Characteristics (Ta=25℃, VDD=3.00V) Parameter Low-level input voltage High-level input voltage Low-level output voltage High-level output voltage Standby current Sleep current1 Sleep current2 Operating current Oscillation frequency Resolution Differential non-linearity error Integral non-linearity error Symbol VIL VIH VOL VOH Ist Icc1 Icc2 Idd Freq Ad DNL INL -3.0 -3.0 Limits Min. VSS-0.5 0.8×VDD VDD-0.4 18 Typ. 60 10 4 20 1024×1024 +3.0 +3.0 Max. 0.2×VDD VDD+0.5 VSS+0.4 1 100 20 6 22 Unit V V V V µA µA µA mA MHz Bit LSB LSB RSTB=L DVDD_EXT=L DVDD_EXT=H No load Condition www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●HOST-I/F mode (4-wire SPI) (SCK=SCL_SCK, SI=SDA_SI, CSB=SEL_CSB, SO=SO) Technical Note Condition : VDD = 3.0V Ta=25℃ Parameter CSB setup time SCK "H" level period SCK "L" level period SI setup time SI holding time CSB holding time CSB "H" level time Data output delay time SCK frequency Symbol t1 t2 t3 t4 t5 t6 t7 t8 t9 Limits Min. 30 30 30 20 20 20 50 Typ. Max. 15 15 Unit ns ns ns ns ns ns ns ns MHz Condition Note: SPI interface is selected by tying IFSEL pin to logic low. IFSEL= logic high selects the 2-wire interface www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●HOST-I/F mode (2-wire serial) (SCL=SCL_SCK, SDA=SDA_SI) Technical Note 2 The 2-wire serial mode presents an I C like interface for all practical purposes, but it is not a complete implementation 2 2 conforming to the I C specification. The BU21023MUV/ BU21023GUL / BU21024FV-M devices can co-exist with other I C devices on the same bus. The slave address for 2-wire serial communication is 5Ch or 5Dh. This is determined by the SEL_CSB pin. SEL_CSB = “L” SEL_CSB = “H” : Slave address = 5Ch : Slave address = 5Dh tHD;STA SDA tSU;STO tSU;DAT SCL SCL Address ACK Data ACK Data tHD;DAT ACK Parameter SCL clock frequency START condition hold time SCL “L” SCL “H” Data hold time Data setup time STOP condition setup time Symbol fSCL tHD:STA tLOW tHIGH tHD:DAT tSU:DAT tSU:STO Limits Min. 0 0.6 1.3 0.6 0.1 0.1 0.6 Typ. Max. 400 - Unit kHz µs µs µs µs µs µs Condition ・Write protocol S SLAVE ADDRESS W A REGISTER ADDRESS 8bit A WRITE DATA 8bit A P 7bit = 5Ch or 5Dh ・Read protocol S SLAVE ADDRESS 7bit = 5Ch or 5Dh W A REGISTER ADDRESS 8bit from master to slave from slave to master A S SLAVE ADDRESS R S P R W A N A READ DATA N P 7bit = 5Ch or 5Dh 8bit = START condition = STOP condition = data direction READ (SDA HIGH) = data direction WRITE (SDA LOW) = acknowledge (SDA LOW) = not acknowledge (SDA HIGH) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●EEPROM I/F BU21023/BU21024 controllers include an EEPROM interface for firmware download. Device address of EEPROM is set via register 0x51(EEPROM_ADDR). Timing chart Technical Note tHD;STA tSU;STO SDA tSU;DAT tHD;DAT SCL Address Read /Write ACK Data ACK Data ACK Parameter SCL clock frequency START hold time SCL ”L” width SCL ”H” width Data hold time Data setup time STOP setup time Symbol fSCL tHD:STA tLOW tHIGH tHD:DAT tSU:DAT tSU:STO Limits Min. 270 0.7 1.4 1.4 0.7 0.7 0.7 Typ. 310 Max. 350 0.9 1.8 1.8 0.9 0.9 0.9 Unit kHz µs µs µs µs µs µs Condition Protocol *IC does not support the write command. *IC supports the following read command. Start S SLAVE ADDRESS WA 1st WORD ADDRESS A 2nd WORD ADDRESS A DATA(0) A DATA(n-3) A DATA(n-2) A DATA(n-1) A DATA(n) N Stop P www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M Technical Note ●Background Information A resistive touch panel is made up of a multilayer sandwich of resistive films and protective coatings all sitting on top of an LCD display. Resistive touch panels work by direct contact of a stylus or a finger flexing a pair of resistive films, hence any blunt pointing instrument or a gloved finger may be used. Touch panel resolution The resolution of a touch panel is typically measured in dots per inch (dpi) and is a function of the physical size of the touch panel and the ADC used in the conversion circuitry. For example, a 3”x5” panel used with the BU21023/BU21024 devices can provide a theoretical resolution of 1024 /5 = 204 dpi. In the case of resistive touch panels, the direct contact nature of its operation and finger thickness often impose an upper limit on the effective system resolution that may be achieved, regardless of the resolution of the ADC itself. ●Functional Description The BU21023/BU21024 devices connect to a standard 4-wire resistive touch screen on one side and to a host processor on the other side. The BU21024 includes four additional sense terminals allowing it to be used with either 4-wire or 8-wire resistive touch screens. The BU21023/BU21024 include the analog and digital circuitry to process and provide dual touch coordinate data and pinch, spread, rotate-right and rotate-left gesture information to the host CPU. The BU21023/BU21024 devices include an internal CPU and provide a high degree of programmability by exposing a set of 2 registers that can be accessed by a host CPU through SPI or I C like serial interfaces. The IFSEL pin determines whether 2 SPI or I C like interface is selected, The BU21023/BU21024 devices include an INT pin whose polarity can be programmed via registers. When an interrupt occurs, for example, due to touch detection, the host processor is required to read an interrupt status register to determine the cause of the interrupt and take appropriate action. The program memory of the internal CPU may be initialized via the host interface or via an external EEPROM. This is selected by a register setting. The BU21023/BU21024 devices support two sensing modes; continuous and interval sensing modes, that are register selectable. In the continuous sensing mode, the embedded CPU reads Z, X & Y coordinates continuously when a touch is detected. The interval sensing mode allows a delay to be inserted between each cycle. The continuous sensing mode is used more often though the interval sensing mode minimizes power consumption. The continuous sensing mode typically completes a sampling cycle consisting of Z, X & Y measurements in approximately 2.3 mS. The BU21023/BU21024 devices enable optimization of touch detection threshold for a given panel. They also include several sophisticated calibration algorithms. This document includes a description of the registers followed by flow charts that describe specific steps that a host processor must follow. Often, a flow chart requires other flow charts to explain the steps in finer detail. The document also includes information on touch screen parameters that one should to look for while selecting resistive touch panels for multi-touch. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●Block Diagram / Description of each block 【BU21023GUL / BU21023MUV】 Work Memory XP XN YP YN Filter EEPROM I/F Technical Note ECL EDA Panel I/F ADC (10bit) CPU (8bit) Program Memory SEL_CSB CLK_EXT OSC Clock Generator Register Host I/F SCL_SCK SDA_SI SO INT IFSEL DVDD_EXT RSTB T2 T3 AVDD PVDD DVDD VDD VSS T1 T4 Regulator Screen I/F ADC OSC Regulator Clock Generator CPU Core Work memory Program Memory EEPROM I/F Host I/F 4-wire resistive touch screen interface 10bit A/D converter Internal 20MHz oscillator block with optional external clock input Internal regulator provides 1.8V DVDD supply. DVDD can also be supplied from an external source if DVDD_EXT pin is tied high. System clock and timing generation (10MHz CPU clock) For dual touch processing, programmability and host interface Data memory for CPU Program memory for CPU. Code can be downloaded by host processor or from an external EEPROM To connect to external EEPROM if downloading program memory from EEPROM. Use of external EEPROM is optional. 4-wire SPI or 2-wire I2C like interface provides access to registers www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M Technical Note 【BU21024FV-M】 XP XN YP YN XPM XNM YPM YNM Filter Panel I/F ADC (10bit) Work memory EEPROM I/F ECL EDA CPU (8bit) Program memory SEL_CSB CLK_EXT Osc Clock generator register Host I/F SCL_SCK SDA_SI SO INT IFSEL DVDD_EXT DVDD PVDD AVDD RSTB Regulator VDD VSS T1 T2 T3 Screen I/F ADC OSC Regulator Clock Generator CPU Core Work memory Program Memory EEPROM I/F Host I/F 4-wire or 8-wire resistive touch screen interface 10bit A/D converter Internal 20MHz oscillator block with optional external clock input Internal regulator provides 1.8V DVDD supply. DVDD can also be supplied from an external source if DVDD_EXT pin is tied high. System clock and timing generation (10MHz CPU clock) For dual touch processing, programmability and host interface Data memory for CPU Program memory for CPU. Code can be downloaded by host processor or from an external EEPROM To connect to external EEPROM if downloading program memory from EEPROM. Use of external EEPROM is optional. 4-wire SPI or 2-wire I2C like interface provides access to registers www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. T4 8/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●Pin Description 【BU21023GUL】 No. Pin name D1 C1 C2 B1 A1 A2 B3 A3 B4 A4 A5 C3 B5 C4 C5 D4 D5 D3 E5 D2 E4 E3 E2 E1 1. 2. 3. Technical Note I/O I/O I/O I/O I/O I/O O O I/O I I I I I I I O O I I/O I I/O O Panel interface Panel interface Panel interface Panel interface Test pin Function Fig. E E E E E E E A A A A A Slave address select Serial data in-out Serial clock input F C C C C C C YN XN YP XP T4 PVDD AVDD DVDD DVDD_EXT VDD VSS RSTB CLK_EXT T1 T2 T3 IFSEL SO INT SEL_CSB SDA_SI SCL_SCK EDA ECL Regulator output (for supply panel voltage) Regulator output (for supply analog block) Regulator output (for supply digital block) or supply digital voltage (DVDD_EXT="H") Digital voltage enable (H=Hi-z , L=DVDD Enable) Supply voltage Ground H/W reset Supply external clock for debug Test pin Test pin Test pin Intereface select pin (L=SPI, H=2wire serial) SPI SPI SPI SPI Serila data output Chip select Serial data input Serial clock input 2wire 2wire 2wire 2wire Interrupt output EEPROM SDA EEPROM SCL 4. 5. 6. 7. 8. Please use 1.0uF capacitors between AVDD and DVDD to GND, and leave PVDD terminal open. If DVDD_EXT=”H “, the DVDD pin can be connected to an external 1.8V power source. Please pull up the ECL, EDA, and INT pins using 10k ohm resistors as shown in the application diagram at the end of this document. ECL and EDA pins may be directly connected to GND if an external EEPROM is not being used. Please connect a 0.1uF capacitor between T4 and GND. T1, T2 & T3 pins should be connected to GND. When using the 2 wire serial interface, please pull up the SCL_SCK, SDA_SI pins via 10k ohms and leave SO unconnected. Please note that the values of resistors and capacitors mentioned here are only recommended values. RSTB should be held low until supply voltage VDD has ramped up and has reached a stable level. The polarity of INT pin is programmable via register 0x30 Connect CLK_EXT to GND for normal use T4 PVDD DVDD VDD VSS ECL EDA SCL_SCK SDA_SI INT A XP AVDD DVDD_EXT CLK_EXT E YN SEL_CSB SO T3 IFSEL B XN YP RSTB T1 T2 D XN YP RSTB T1 T2 C YN SEL_CSB SO T3 IFSEL C XP AVDD DVDD_EXT CLK_EXT D ECL EDA SCL_SCK SDA_SI INT B T4 PVDD DVDD VDD VSS E A 1 2 3 4 5 1 2 3 4 5 TOP VIEW (BALL SIDE DOWN) BOTTOM VIEW (BALL SIDE UP) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M 【BU21023MUV】 No. Pin name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1. 2. 3. Technical Note I/O I/O I/O I/O I/O I/O O O I/O I I I I I I I O O I I/O I I/O O Panel interface Panel interface Panel interface Panel interface Test pin Function - fig E E E E E E E A A A A A Slave address select Serial data in-out Serial clock input F C C C C C C NC NC NC YN XN YP XP T4 PVDD AVDD DVDD DVDD_EXT VDD VSS RSTB CLK_EXT T1 T2 T3 IFSEL SO INT SEL_CSB SDA_SI SCL_SCK EDA ECL NC Regulator output (for supply panel voltage) Regulator output (for supply analog block) Regulator output (for supply digital block) or supply digital voltage (DVDD_EXT="H") Digital voltage enable (H=Hi-Z , L=DVDD enable) Supply voltage Ground H/W reset Supply external clock for debug Test pin Test pin Test pin Intereface select pin (L=SPI, H=2wire serial) SPI SPI SPI SPI Serila data output Chip select Serial data input Serial clock input 2wire 2wire 2wire 2wire Interrupt output EEPROM SDA EEPROM SCL - - 4. 5. 6. 7. 8. Please use 1.0uF capacitors between AVDD and DVDD to GND, and leave PVDD terminal open. If DVDD_EXT=”H “, the DVDD pin can be connected to an external 1.8V power source. Please pull up the ECL, EDA, and INT pins using 10k ohm resistors as shown in the application diagram at the end of this document. ECL and EDA pins may be directly connected to GND if an external EEPROM is not being used. Please connect a 0.1uF capacitor between T4 and GND. T1, T2 & T3 pins should be connected to GND. When using the 2 wire serial interface, please pull up the SCL_SCK, SDA_SI pins via 10k ohms and leave SO unconnected. Please note that the values of resistors and capacitors mentioned here are only recommended values. RSTB should be held low until supply voltage VDD has ramped up and has reached a stable level. The polarity of INT pin is programmable via register 0x30 Connect CLK_EXT to GND for normal use 16 CLK_EXT IFSEL RSTB SO NC NC NC YN XN 17 15 19 21 20 18 1 3 5 6 YP 2 INT SEL_CSB SDA_SI SCL_SCK EDA ECL NC 22 23 24 25 26 27 28 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VSS VDD DVDD_EXT DVDD AVDD PVDD T4 NC ECL EDA SCL_SCK SDA_SI SEL_CSB INT 28 27 26 25 24 23 22 18 20 21 19 17 16 15 4 7 8 9 10 11 12 13 14 XP T3 T2 T1 T4 PVDD AVDD DVDD DVDD_EXT VDD VSS NC NC XN NC YN YP XP SO T3 T1 IFSEL TOP VIEW (LEAD SIDE DOWN) BOTTOM VIEW (LEAD SIDE UP) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. CLK_EXT RSTB T2 10/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M 【BU21024FV-M】 No. Pin name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1. 2. 3. Technical Note I/O I/O O I/O I/O I/O I/O I/O I/O I/O I/O I/O O O I/O I I I I I I I O O I I/O I EEPROM SDA EEPROM SCL Panel interface (Test input) Panel interface (Test input) Panel interface (Test input) Panel interface (Test input) Panel interface Panel interface Panel interface Panel interface Test pin Function fig C C E E E E E E E E E E E A A A A A Slave address select Serial data in-out Serial clock input F C C C C EDA ECL YNM XNM YPM XPM YN XN YP XP T4 PVDD AVDD DVDD DVDD_EXT VDD VSS RSTB CLK_EXT T1 T2 T3 IFSEL SO INT SEL_CSB SDA_SI SCL_SCK Regulator output (for supply panel voltage) Regulator output (for supply analog block) Regulator output (for supply digital block) or supply digital voltage (DVDD_EXT="H") Digital voltage enable (H=Hi-Z , L=DVDD enable) Supply voltage Ground H/W reset Supply external clock for debug Test pin Test pin Test pin Intereface select pin (L=SPI, H=2wire serial) SPI SPI SPI SPI Serila data output Chip select Serial data input Serial clock input 2wire 2wire 2wire 2wire Interrupt output 4. 5. 6. 7. 8. 9. Please use 1.0uF capacitors between AVDD and DVDD to GND, and leave PVDD terminal open. If DVDD_EXT=”H “, the DVDD pin can be connected to an external 1.8V power source. Please pull up the ECL, EDA, and INT pins using 10k ohm resistors as shown in the application diagram at the end of this document. ECL and EDA pins may be directly connected to GND if an external EEPROM is not being used. Please connect a 0.1uF capacitor between T4 and GND. T1, T2 & T3 pins should be connected to GND. When using the 2 wire serial interface, please pull up the SCL_SCK, SDA_SI pins via 10k ohms and leave SO unconnected. Please note that the values of resistors and capacitors mentioned here are only recommended values. RSTB should be held low until supply voltage VDD has ramped up and has reached a stable level. The polarity of INT pin is programmable via register 0x30 Connect CLK_EXT to GND for normal use Please leave the XPM, XNM, YPM, YNM terminals open if using a 4-wire touch screen. These pins should be connected to the reference leads of an 8-wire touch screen if one is being used. SDA_SI DVDD_EXT 15 SCL_SCK SEL_CSB CLK_EXT IFSEL RSTB VDD 16 VSS 17 INT SO T3 T2 21 28 27 26 25 24 23 22 20 T1 19 18 10 11 12 13 ECL PVDD XPM YPM TOP VIEW www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. DVDD AVDD XNM YNM EDA XN YN XP YP T4 14 1 2 3 4 5 6 7 8 9 TOP VIEW 11/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M Technical Note PAD PAD Fig. A Fig. B PAD PAD Fig. D Fig. C PAD CIN PAD Fig. E Fig. F ●Fig. BU21023GUL / BU21023MUV / BU21024FV-M I/O equivalent circuit www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 12/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●Application Circuit 【BU21023GUL/BU21023MUV】 BU21023GUL/MUV support 2 host interfaces (4-wire SPI and 2-wire serial bus). The figures below are shown application circuit when each interface is used. (Although BU21023GUL is CSP package, it is shown in similar figure for comparing.) *Please connect the terminal of ECL/EDA with VSS, when firmware is download form HOST. *Please insert TVS diode each sensor line from the perspective that enhances resistance to ESD. *In 4-wire SPI using case, pull up INT terminal to VDD or host IO voltage (max4.5V). If no using, connect to GND. VDD Technical Note EEPROM 10kohm Host VDD 10kohm SCL_SCK SEL_CSB 10kohm SDA_SI ECL EDA INT SO IFSEL (10kohm) panel YN XN YP XP DVDD_EXT T3 BU21023 T2 T1 EXT_CLK RSTB PVDD AVDD DVDD TVS diode 0.1uF 1.0uF 1.0uF Example 1 : BU21023GUL/MUV application circuit(4-wireSPI) In 2-wire serial interface using case, please pull up INT, SCL_SCK, SDA_SI terminal to VDD or host IO voltage(max4.5V). VDD VDD VSS T4 VDD EEPROM 10kohm Host 10kohm VDD 10kohm 10kohm SCL_SCK SEL_CSB SDA_SI 10kohm ECL EDA INT SO IFSEL panel YN XN YP XP DVDD_EXT T3 BU21023 T2 T1 EXT_CLK RSTB PVDD AVDD DVDD TVS diode 0.1uF 1.0uF 1.0uF Example 2 : BU21023GUL/MUV application circuit(2-wire Serial bus) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. VDD VSS T4 VDD 13/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M 【BU21024FV-M】 BU21024FV-M support 2 host interfaces (4-wire SPI and 2-wire serial bus). The figures below are shown Application Circuit when each interface is used. (Although BU21023GUL is CSP package, it is shown in similar figure for comparing.) *Please connect the terminal of ECL/EDA with VSS, when Firmware is download form HOST. *Please insert TVS diode each sensor line from the perspective that enhances resistance to ESD. *In 4-wire SPI using case, pull up INT terminal to VDD or host IO voltage(max4.5V). If no using, connect to GND. VDD VDD VDD Technical Note 10kohm 10kohm 10kohm 1 EDA SCL_SCK SDA_SI 28 27 26 25 24 (10kohm) EEPROM 2 3 4 5 6 7 8 ECL Host YNM XNM YPM SEL_CSB INT SO XPM YN IFSEL 23 22 21 20 19 T3 BU21024FV-M XN T2 YP T1 panel 9 10 11 0.1uF TVS diode XP T4 CLK_EXT RSTB 18 VSS 12 13 1.0uF PVDD 17 16 15 VDD AVDD VDD 14 1.0uF DVDD DVDD_EXT Example 3 : BU21024FV-M Application Circuit(4-wireSPI) VDD VDD VDD 10kohm 10kohm 10kohm 1 EDA SCL_SCK SDA_SI 28 27 26 25 24 23 22 21 20 19 VDD EEPROM 2 3 4 5 6 7 8 ECL Host YNM XNM YPM SEL_CSB INT SO XPM YN IFSEL T3 BU21024FV-M XN T2 YP T1 panel 9 10 11 0.1uF TVS diode XP T4 CLK_EXT RSTB 18 VSS 12 13 1.0uF PVDD 17 16 15 VDD AVDD VDD 14 1.0uF DVDD DVDD_EXT Example 4 : BU21024FV-M Application Circuit(2-wire Serial bus) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M Technical Note BU21024FV-M has the other pins for debug except for 4-wire resistive touch screen interface (XP, YP, XN, YN). When debug, there are 4 monitor pins corresponding to four past terminals. (In 4-wire, supply and detect voltage of screen on 4 pins. When debug, if this function is enable, it is possible to supply voltage on past 4pins and detect voltage on 4 pins with **M separately. ) To remove the noise of Screen itself, the filter is composed of discrete circuit. It is possible to ease the decrease of screen voltage's dynamic range, which is caused by wiring resistance on the PCB. Note: These debug terminals are only for debug. So, please don’t use them in normal application using. VDD VDD VDD 10kohm 10kohm 10kohm 1 EDA SCL_SCK SDA_SI 28 27 26 25 24 (10kohm) EEPROM 2 3 1nF 10 ohm ECL Host YNM XNM YPM SEL_CSB 4 1nF 10 ohm INT SO 5 1nF 10 ohm 6 1nF XPM YN IFSEL 23 22 21 20 19 7 8 T3 BU21024FV-M XN T2 YP T1 panel 9 10 11 0.1uF TVS diode XP T4 CLK_EXT RSTB 18 VSS 12 13 1.0uF PVDD 17 16 15 VDD AVDD VDD 14 1.0uF DVDD DVDD_EXT Example 5 : BU21024FV-M Application Circuit(4-wireSPI with RC filter) VDD VDD VDD 10kohm 10kohm 10kohm 1 EDA SCL_SCK SDA_SI 28 27 26 25 24 23 22 21 20 19 VDD EEPROM 2 10 ohm ECL Host 3 1nF 10 ohm YNM SEL_CSB 4 1nF 10 ohm XNM YPM INT SO 5 1nF 10 ohm 6 1nF XPM YN IFSEL 7 8 T3 BU21024FV-M XN T2 YP XP T1 CLK_EXT panel 9 10 11 0.1uF TVS diode T4 RSTB 18 VSS 12 13 1.0uF PVDD 17 16 15 VDD AVDD VDD 14 1.0uF DVDD DVDD_EXT Example 6 : BU21024FV-M Application Circuit(2-wire Serial bus with RC filter) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M Technical Note ●Notes for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC's power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (12) Rush current The IC with some power supplies has a capable of rush current due to procedure and delay at power-on. Pay attention to the capacitance of the coupling condensers and the wiring pattern width and routing of the power supply and the GND lines. (13) Others In case of use this LSI, please peruse some other detail documents, we called, Technical note, Functional description, Application note. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 16/17 2011.08 - Rev.A BU21023GUL,BU21023MUV,BU21024FV-M ●Ordering part number Technical Note B Part No. U 2 Part No. 21023 21024 1 0 2 4 F V - M E 2 Package GUL : VCSP50L2 MUV: VQFN028V5050 FV : SSOP-B28 Packaging and forming specification E2: Embossed tape and reel UCSP50L1 (BD82103GWL) 1PIN MARK 1.5±0.05 Tape Quantity 0.55MAX 0.1±0.05 Embossed carrier tape 3000pcs E2 The direction is the 1pin of product is at the upper left when you hold 1.8±0.05 Direction of feed S ( reel on the left hand and you pull out the tape on the right hand ) 11-φ0.2±0.05 0.05 A B (φ0.15)INDEX POST C B A B 1 2 3 4 P=0.4×2 A 0.35±0.05 0.08 S 0.3±0.05 P=0.4×3 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. VQFN028V5050 5.0±0.1 5.0±0.1 Tape Quantity Direction of feed S 0.02 +0.03 -0.02 (0.22) Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 1.0MAX 1PIN MARK ( reel on the left hand and you pull out the tape on the right hand ) 0.08 S C0.2 1 28 2.7±0.1 7 8 0.4±0.1 22 21 15 14 2.7±0.1 1.0 0.5 +0.05 0.25 -0.04 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. SSOP-B28 10 ± 0.2 (MAX 10.35 include BURR) 28 15 Tape Quantity Direction of feed 0.3Min. Embossed carrier tape 2000pcs E2 The direction is the 1pin of product is at the upper left when you hold 7.6 ± 0.3 5.6 ± 0.2 ( reel on the left hand and you pull out the tape on the right hand ) 1 14 1.15 ± 0.1 0.15 ± 0.1 0.1 0.1 0.65 0.22 ± 0.1 1pin (Unit : mm) Direction of feed Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 17/17 2011.08 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A