Contact Image Sensor Heads for narrow-width scanners
LSH2004-AA20A
Compatible with A6 size media, feature a dual-arch structure, allowing straight pass reading (both-directions). In addition, they are compact, measuring only 119.5mm in length. Applications Check readers, card scanners, and a variety of other image input devices. Features 1) Signal amplifier integrated into each sensor IC in order to eliminate external noise ; compatible with 3.3V interface. 2) LED light source mounted on the same substrate as the sensor chip itself, resulting in a more compact, lightweight package. 3) Proprietary prism maintains a uniform output signal. 4) Ceramic substrate used, ensuring excellent dimensional and thermal stability.
Dimensions (Unit : mm)
5.5±0.3
119.5±0.3
2.5
109.6 (Effectiv Reading Width :104.6)
3.96±0.5
5±0.1 φ2±0.05 (Depth 1)
Paper Feed Direction
C L No.1 Pixel
17.5±0.25
12.5±0.05
60±0.3 A
29.75±0.3
10.7±0.4
25±1
Max. 1.5
15.5±1
(12.9)
(3.8)
No.9
No.1
(NOTE 1) Deflection at the top of glass:0-0.25 Projection to platen is positive. (NOTE 2) Socket Housing:IL-Z-9S-S125C3(JAE) Socket Contact:IL-Z-C3-A-15000(JAE)
Pin No. No.1 No.2 No.3 No.4 No.5 No.6
Signal CLK SP VDD GND Ao RLED
Max.2
Pin No. No.7 No.8 No.9
Signal GLED BLED VLED
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c ○ 2011 ROHM Co., Ltd. All rights reserved.
1/4
2011.03 - Rev.B
LSH2004-AA20A
Characteristics
Parameter Effective scanning width Primary scan dot density Total dot number Power supply voltage Scanning speed Clock frequency Maximum dynamic range Minimum dynamic range Dark output Operating temperature Symbol
− − −
Data Sheet
Typ. 104.6 200 864 3.3 0.125×3 8 0.5 0.25 0.8±0.2 5 to 45
Unit mm dpi dots V ms / line MHz V V V °C
VDD SLT CLK VRMax. VRMin. Vod
−
Pin assignments
No. 1 2 3 4 5 6 7 8 9 Circuit CLK SP VDD GND Ao RLED GLED BLED VLED I/O I I I I O I I I I Functions Clock Start Pulse Power Supply Ground Analog Output LED ground LED ground LED ground LED power supply
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c ○ 2011 ROHM Co., Ltd. All rights reserved.
2/4
2011.03 - Rev.B
LSH2004-AA20A
Timing chart (a) CLK Timing Chart
1/fCLK twCLK twCLK
Data Sheet
50%
50%
50%
50%
C LK
ts 50% 50%
SP
tSETUP tHOLD
Ao
1pixel 2pixel
(b) Data Output Timing Chart After turning on the SP pulse, the analog output shape starts from the setting up point of 65 clock pulse.
1
2
64
65
66
CLK SP
Ao
VREF Output Period (64pixels) 1 to 64 pixels
Analog Output Period 1 to 864pixels
Note) Output blank part cannot be used as the analog output standard level.
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c ○ 2011 ROHM Co., Ltd. All rights reserved.
3/4
2011.03 - Rev.B
LSH2004-AA20A
Inner circuit
VDD
Data Sheet
1μF x 4
GND SP
ANALOG MEMORY CIRCUIT 1 864 1μF
680Ω
VDD
220Ω
CLK
Ao
VREF 100kΩ
1μF
VLED
RGND GGND BGND
Peripheral circuit
8
7
6
9
5
3
2
1
C2
4
R2 C1
B G R VDD SP CLK
R1
C3
C4
LED GND VLED Ao GND
∗ R1=R2=100Ω C1=47μF, C2=100pF C3=100μF, C4=0.1μF
∗ Please adjust the value of resistance to fit your interface circuit.
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c ○ 2011 ROHM Co., Ltd. All rights reserved.
4/4
2011.03 - Rev.B
Notice
Notes
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved.
R1120A
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