ML9473TBZ03A

Dear customer LAPIS Semiconductor Co., Ltd. ("LAPIS Semiconductor"), on the 1st day of October, 2020, implemented the incorporation-type company split (shinsetsu-bunkatsu) in which LAPIS established a new company, LAPIS Technology Co., Ltd. (“LAPIS Technology”) and LAPIS Technology succeeded LAPIS Semiconductor’s LSI business. Therefore, all references to "LAPIS Semiconductor Co., Ltd.", "LAPIS Semiconductor" and/or "LAPIS" in this document shall be replaced with "LAPIS Technology Co., Ltd." Furthermore, there are no changes to the documents relating to our products other than the company name, the company trademark, logo, etc. Thank you for your understanding. LAPIS Technology Co., Ltd. October 1, 2020 Semiconductor ML9473 FEDL9473-01 Issue Date: Aug. 21, 2008 1/3, 1/4, 1/5 Duty 60 Output LCD Driver GENERAL DESCRIPTION The ML9473 is a LCD driver for dynamic display providing 3-duty-switchable pins (1/3, 1/4, 1/5 duty). It can directly drive LCDs of up to 300, 240 and 180 segments when 1/5, 1/4 and 1/3 duty are selected respectively. FEATURES • Operating range Supply voltage : 3.0 to 5.5 V Operating temperature range : 40 to + 105C • Segment output : 60 pins 1/5 duty : Up to 300 segments can be displayed. 1/4 duty : Up to 240 segments can be displayed. 1/3 duty : Up to 180 segments can be displayed. • Serial transfer clock frequency : 4 MHz • Serical interface with CPU :Through three input pins (DATA_IN, LOAD, and CLOCK) • Built-in oscillator circuit for COMMON signals • One-to-one correspondence between input data and output data When input data is at “H” level : Display goes on. When input data is at “L” level : Display goes off. • The entire display can be turned off. (BLANK pin) • Package options 80-pin plastic TQFP (TQFP80-P-1212-0.50-K) (Product name: ML9473TB) 1/20 FEDL9473-01 LAPIS Semiconductor ML9473 BLOCK DIAGRAM SEG1 SEG60 60-Dot Segment Driver BLANK 60-Ch Data Selector LOAD 60 60 60 60 60 60-Bit Latch 5 60-Bit Latch 4 60-Bit Latch 3 60-Bit Latch 2 60-Bit Latch 1 Latch Selector 60 DATA_IN 68-Stage Shift Register CLOCK OSC_OUT OSC_OUT OSC_IN OSC VLC1 Timing Generator VLC2 VLC3 DSEL1 DSEL2 Common Driver COM1 COM2 COM3 COM4 VDD COM5 GND 2/20 FEDL9473-01 LAPIS Semiconductor ML9473 SEG25 SEG24 SEG23 SEG22 SEG21 64 63 62 61 SEG26 66 65 SEG28 SEG27 67 69 68 SEG30 SEG29 70 SEG32 SEG31 71 73 72 SEG34 SEG33 74 SEG36 77 SEG35 SEG37 78 75 SEG38 79 76 SEG40 SEG39 80 PIN CONFIGURATION (TOP VIEW) SEG7 SEG55 15 46 SEG6 SEG56 16 45 SEG5 SEG57 17 44 SEG4 SEG58 18 43 SEG3 SEG59 19 42 SEG2 SEG60 20 41 SEG1 40 47 COM1 14 39 SEG8 SEG54 38 48 COM3 13 COM2 SEG9 SEG53 37 49 COM4 12 36 SEG10 SEG52 35 50 VLC1 11 COM5 SEG11 SEG51 34 51 33 10 VLC2 SEG12 SEG50 VLC3 52 32 9 31 SEG13 SEG49 GND 53 OSC_IN 8 30 SEG14 SEG48 29 54 OSC_OUT 7 OSC_OUT SEG15 SEG47 28 55 27 6 DSEL2 SEG16 SEG46 DSEL1 56 26 5 BLANK SEG17 SEG45 25 57 DATA_IN 4 24 SEG18 SEG44 23 58 LOAD 3 CLOCK SEG19 SEG43 22 SEG20 59 21 60 2 NC 1 SEG42 VDD SEG41 80-Pin Plastic TQFP 3/20 FEDL9473-01 LAPIS Semiconductor ML9473 PIN DESCRIPTION Symbol Type Description OSC_IN OSC_OUT OSC_OUT I O O Pins for oscillation. The oscillator circuit is configured by externally connecting two resistors and a capacitor. Make the wiring length as short as possible, because the resistor connected to the OSC_IN pin has a higher value and the circuit is susceptible to external noise. DATA_IN I Serial data input pin. The display goes on when input data is at a “H” level, and it goes off when input data is at a “L” level. CLOCK I Shift clock input pin. Data from the DATA_IN pin is transferred in synchronization with the rising edge of the shift clock. LOAD I Load signal input pin. Serially input data is transferred to the 60-bit latch at “H” level of this load signal, then held at “L” level. BLANK l Input pin that turns off all segments. The entire display goes off when “L” level is applied to this pin. The display returns to the previous state when “H” level is applied. DSEL1 DSEL2 I I Input pins to select 1/3, 1/4, or 1/5 duty. Following shows how each duty is selected. DSEL2 DSEL1 Duty selected L L 1/3 L H 1/4 H X 1/5 X: Don’t care COM1 to COM5 O Display output pins for LCD. These pins are connected to the COMMON side of the LCD panel. SEG1 to SEG60 O Display output pins for LCD. Theses pins are connected to the SEGMENT side of the LCD panel. For the correspondence between the output of these pins and input data, see the “Data Structure” Section. VLC1, VLC2, VLC3 — Bias pins for LCD driver. Through these pins, bias voltages for the LCD are externally supplied. The bias potential must meet the following condition: VDD > VLC1  VLC2 > VLC3 =GND VDD, GND — Supply voltage pin and ground pin. Note: Built-in schmitt circuit is used for all input pins. 4/20 FEDL9473-01 LAPIS Semiconductor ML9473 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit VDD Ta = 25°C –0.3 to 6.5 V VI Ta = 25°C –0.3 to VDD+0.3 V TSTG — –55 to 150 °C Power Dissipation PD Ta < 105°C 650 mW Output Current IO — –2.0 to 2.0 mA Supply Voltage Input Voltage Storage Temperature RECOMMENDED OPERATING CONDITIONS Symbol Condition Range Unit Supply Voltage Parameter VDD VLC3 = GND 3.0 to 5.5 V CLOCK Frequency fCP — 0.75 to 4 MHz Operating Temperature Ta — –40 to 105 °C Oscillator Circuit Parameter Symbol Applicable pin Condition Min. Max. Unit Oscillator Resistance R0 OSC_OUT — 20 120 k Oscillator Capacitance C0 OSC_OUT — 0.00047 0.01 F Current Limiting Resistance R1 OSC_IN — 62 360 k 25 250 Hz Common Signal Frequency fCOM COM1 to COM5 — Note: See Section, “Reference Data”, for the resistor and capacitor values in the table. RC Values in Oscillator Circuit Symbol Applicable pin 1/3 duty 1/4 duty 1/5 duty Unit Oscillator Resistance Parameter R0 OSC_OUT 68 51 43 k Oscillator Capacitance C0 OSC_OUT 0.001 0.001 0.001 F Current Limiting Resistance R1 OSC_IN 220 160 130 k Example of an oscillator circuit: 5/20 FEDL9473-01 LAPIS Semiconductor ML9473 ELECTRICAL CHARACTERISTICS DC Characteristics (VDD = 3.0 to 5.5 V, Ta = –40 to +105°C, unless otherwise specified) Parameter Symbol Applicable pin Condition Min. Max. Unit “H” Input Voltage 1 VIH1 CLOCK, OSC_IN — 0.85 VDD VDD V “L” Input Voltage 1 VIL1 CLOCK, OSC_IN — GND 0.15 VDD V “H” Input Voltage 2 VIH2 *1 — 0.8 VDD VDD V “L” Input Voltage 2 VIL2 *1 — GND 0.2 VDD V “H” Input Current IIH All input pins VDD = 5.5 V, VI = VDD — 10 A IIL All input pins VDD = 5.5 V, VI = 0 V “L” Input Current IO = 100 A VOC0a COMMON Output Voltage Supply Current *1 *2 *3 *4 *5 — A — V IO = 100 A *3 VLC1 1 VLC1 +1 V VOC2 IO = 100 A *4 VLC2 1 VLC2 +1 V VOC3 IO = +100 A *5 — VLC3 +1 V VDD 1 — V VOC1 COM1 - COM5 VDD = 3.0 V IO = 10 A VOS0 Segment Output Voltage 10 VDD 1 IO = 10 A *3 VLC1 1 VLC1 +1 V VOS2 IO = 10 A *4 VLC2 1 VLC2 +1 V VOS3 IO = +10 A *5 — VLC3 +1 V — 0.5 mA VOS1 IDD SEG1 - SEG60, VDD VDD = 3.0 V VDD = 5.0 V, no load. *2 Applies to all input pins excluding CLOCK and OSC_IN. R0 = 51 k R1 = 160 k C0 = 0.001 F VLC1 = 2.0V VLC2 = 1.0V VLC3 = 0V 6/20 FEDL9473-01 LAPIS Semiconductor ML9473 AC Characteristics (VDD =3.0 to 5.5V, Ta = –40 to +105°C, unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit Clock “H” Time tWHC — 70 — — ns Clock “L” Time tWLC — 70 — — ns Data Set-up Time tDS — 50 — — ns Data Hold Time tDH — 50 — — ns Load “H” Time tWHL — 100 — — ns Clock-to-load Time tCL — 100 — — ns Load-to-Clock Time tLC — 100 — — ns Clock Rise time, Fall time tR1, tF1 — — — 50 ns OSC_IN Input Frequency fOSC — — — 20 kHz OSC_IN “H” Time tWHO — 20 — — s OSC_IN “L” Time tWLO — 20 — — s tR2, tF2 — — — 100 ns OSC_IN Rise time, Fall time 7/20 FEDL9473-01 LAPIS Semiconductor ML9473 POWER-ON/OFF TIMING * VLC1, VLC2 are applied when VDD is applied to external bias resistor. INITIAL SIGNAL TIMING VDD BLANK * Once VDD is applied, BLANK should be applied to ‘L’ level to make all SEGMENTs off until first group of display data is latched. 8/20 FEDL9473-01 LAPIS Semiconductor ML9473 FUNCTIONAL DESCRIPTION Operation As shown in “Data Structure”, the display data consists of the data field corresponding to the output for turning the segments on or off and the select field that selects field that selects the input block of data. Data input to the DATA_IN pin is loaded into the 68-bit shift register, transferred to the 60-bit latch while the load signal is at “H” level, and then output via the 60-dot segment driver. D1 D60 DM1 DM2 DM3 C1 C2 C3 C5 C4 DATA_IN 1 60 61 62 63 64 65 66 67 68 CLOCK LOAD Data in display latch Old data New data Data Structure Input data First bit End bit C5 Corresponds to SEG1 C4 C3 C2 C1 DM3 DM2 DM1 D60 Dummy bit (3 bits) Select bit (5 bits) D59 Corresponds to SEG60 D5 D4 D3 D2 D1 LCD display data (60 bits) Correspondence between select bits and COM1 to COM5 C5 C4 C3 C2 C1 Description 0 0 0 0 1 Display data corresponding to COM1 0 0 0 1 0 Display data corresponding to COM2 0 0 1 0 0 Display data corresponding to COM3 0 1 0 0 0 Display data corresponding to COM4 0 0 0 0 Display data corresponding to COM5 1 Notes: 1. 2. Arbitrary data can be set for the dummy bits. Select bit, C1 to C5, selects 60-bit latches that correspond to COM1 to COM5, respectively. Therefore, if “1” is set for more than one select bit, data is set to all the corresponding 60-bit latches. Example: If “1” is set to all the select bits C1 to C5, the display data of D1 to D60 is set to all the 60-bit latches that correspond to COM1 to COM5. 9/20 FEDL9473-01 LAPIS Semiconductor ML9473 COM1 – COM5 Timing Chart: VDD COM1 VLC1 VLC2 VLC3 VDD COM2 VLC1 VLC2 VLC3 VDD VLC1 COM3 VLC2 VLC3 1/3 DUTY COM TIMING 10/20 FEDL9473-01 LAPIS Semiconductor ML9473 SEGn True Value Table: LATCH1 LATCH2 LATCH3 LATCH4 LATCH5 COM1 COM2 COM3 COM4 COM5 SEGn 0 0 0 0 1 “H” “L” “M2” “M1” “M2” “M1” “M2” “M1” “M2” “M1” “M1” “M2” “M2” “M1” “H” “L” “M2” “M1” “M2” “M1” “M2” “M1” “M1” “M2” “M2” “M1” “M2” “M1” “H” “L” “M2” “M1” “M2” “M1” “M1” “M2” “M2” “M1” “M2” “M1” “M2” “M1” “H” “L” “M2” “M1” “M1” “M2” “M2” “M1” “M2” “M1” “M2” “M1” “M2” “M1” “H” “L” “L” “H” *Note: “H” = VDD; “M1” = VLC1; “M2” = VLC2; “L” = VLC3=GND 11/20 FEDL9473-01 LAPIS Semiconductor ML9473 Timing Chart FOR 1/3 DUTY DRIVE MODE: 12/20 FEDL9473-01 LAPIS Semiconductor ML9473 Timing Chart FOR 1/4 DUTY DRIVE MODE: VDD COM1 VLC1 VLC2 VLC3 COM1 COM2 COM3 COM4 VDD VLC1 COM2 VLC2 VLC3 VDD VLC1 COM3 VLC2 VLC3 VDD VLC1 COM4 VLC2 VLC3 VDD VLC1 SEG1 VLC2 VLC3 VDD SEG2 VLC1 VLC2 VLC3 13/20 FEDL9473-01 LAPIS Semiconductor ML9473 VDD COM1 VLC1 VLC2 VLC3 SEG2 SEG1 Timing Chart FOR 1/5 DUTY DRIVE MODE: COM1 COM2 COM3 COM4 COM5 VDD VLC1 COM2 VLC2 VLC3 VDD VLC1 COM3 VLC2 VLC3 VDD VLC1 COM4 VLC2 VLC3 VDD VLC1 COM5 VLC2 VLC3 VDD VLC1 SEG1 VLC2 VLC3 VDD SEG2 VLC1 VLC2 VLC3 14/20 FEDL9473-01 LAPIS Semiconductor ML9473 APPLICATION CIRCUITS (For 1/4 duty) 1/4 DUTY 240-SEGMENT LCD PANEL CPU DATA_IN P O R T SEG1 SEG60 COM1 CLOCK LOAD COM2 BLANK COM4 VDD COM5 COM3 R1 Open ML9473 OSC_IN C0 OSC_OUT R0 OSC_OUT DSEL1 DSEL2 VSS VLC1 VLC2 VLC3 +5V BIAS CIRCUIT 15/20 FEDL9473-01 LAPIS Semiconductor ML9473 REFERENCE DATA The data shown in this section is for reference (a metal film resistor and a film capacitor are used). Resistor and capacitor values must be determined based on experiments. Use the following expression to convert oscillation frequency to COMMON frame frequency (or vice versa): fCOM=fOSC × Duty/16 fCOM fOSC Duty : COMMON frame frequency : Oscillation frequency : e.g., 1/4 for 1/4 duty For example, if fCOM=100Hz at 1/5 duty, the oscillation frequency is fOSC =8000Hz. Ta=25°C R0=51k R1=160k C0=0.001µF 1/4 duty I DD vs. VDD 0.7 0.6 IDD [mA] 0.5 0.4 0.3 0.2 0.1 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VDD [V] 16/20 FEDL9473-01 LAPIS Semiconductor ML9473 fOSC---R0,C0 ML9473 Oscillator Frequency Result VDD=3V 25°C fOSC[kHz] 100.00 10.00 0.00047µF | 62kΩ 0.00047µF | 360kΩ 0.01µF | 62kΩ 0.01µF | 360kΩ 1.00 0.10 0 25 50 75 100 125 150 R0[kΩ] ML9473 Oscillator Frequency Result VDD=5.5V 25°C fOSC[kHz] 100.00 10.00 0.00047µF | 62kΩ 0.00047µF | 360kΩ 0.01µF | 62kΩ 0.01µF | 360kΩ 1.00 0.10 0 25 50 75 100 125 150 R0[kΩ] 17/20 FEDL9473-01 LAPIS Semiconductor ML9473 PACKAGE DIMENSIONS (Unit: mm) TQFP80-P-1212-0.50-K 5 Package material Lead frame material Lead finish Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Sn-2Bi (Bi 2% typ.) Plating (≥5µm) 0.40 TYP. 1/Feb. 1, 2008 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 18/20 FEDL9473-01 LAPIS Semiconductor ML9473 REVISION HISTORY Document No. Date Page Previous Current Edition Edition Description PEDL9473-01 Dec. 15, 2006 – – Preliminary edition 1 PEDL9473-02 Jan. 15, 2007 – – Preliminary edition 2 PEDL9473-03 Jan. 9, 2008 – – Preliminary edition 3 FEDL9473-01 Aug. 21, 2008 – – Final edition 1 19/20 FEDL9473-01 LAPIS Semiconductor ML9473 NOTICE No copying or reproduction of this document, in part or in whole, is permitted without the consent of LAPIS Semiconductor Co., Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing LAPIS Semiconductor's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from LAPIS Semiconductor upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, LAPIS Semiconductor shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. LAPIS Semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by LAPIS Semiconductor and other parties. LAPIS Semiconductor shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While LAPIS Semiconductor always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. LAPIS Semiconductor shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). LAPIS Semiconductor shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Copyright 2008 - 2011 LAPIS Semiconductor Co., Ltd. 20/20