SSO-AD-500-TO52

SSO-AD-500-TO52 Avalanche Photodiode Special characteristics: High gain at low bias voltage Fast rise time 500 µm diameter active area low capacitance Parameters: Active area dark current (M=100) 1) Total capacitance (M=100) Break-down voltage UBR (at ID=2µA) Temperature coefficient of UBR Spectral responsivity (at 780 nm) Cut-off frequency (-3dB) Rise time Optimum gain Gain M "Excess Noise" factor (M=100) "Excess Noise" index (M=100) Noise current (M=100) N.E.P. (M=100, 880 nm) Operating temperature Storage temperature 50 - 60 min 200 1) 0,196 mm ∅ 500 µm max. 5 nA typ. 0,5 - 1 nA typ. 2,5 pF 120 - 190 V typ. 0,4 %/°C min. 0,40 A/W typ. 0,45 A/W typ. 1,3 GHz typ. 280 ps 2 Package 1 (TO52) : typ. 2,2 typ. 0,2 typ. 10 pA/Hz -13 ½ typ. 2 * 10 W/Hz -20 ... +70°C -60 ... +100°C ½ 1) measurement conditions: Setup of photo current 10nA at M=1 and irradiation by a NIR-LED (880 nm, 80 nm bandwith). Rise of the photo current up to 1 µA, (M=100) by internal multiplication due to an increasing bias voltage SSO - AD - serie Spectral Responsivity at M=1 0,600 0,500 0,400 0,300 0,200 0,100 0,000 400 500 600 700 800 900 1000 1100 60 50 40 30 20 10 0 400 500 SSO - AD - serie Spectral Responsivity at M=100 Sabs (A/W) Sabs (A/W) 600 700 800 900 1000 1100 Wavelength (nm) Wavelength (nm) SSO - AD - serie quantum efficiency for M=1 1,00 0,90 0,80 0,70 0,60 QE 0,50 0,40 0,30 0,20 0,10 0,00 400 480 560 640 720 800 880 960 1040 10 5 0 0 20 Ctot (pF) 35 30 25 20 15 40 SSO-AD 500 Ctot = f(UR) at f=100kHz wavelength (nm) 40 UR (V) 60 80 100 SSO-AD 500 LC dark current = f(UR) 1000 SSO - AD - serie (versions 500, 800, 1100, 2500) gain = f(UR/UBR) at λ=880 nm 10000 100 1000 ID (nA) 10 1 M 100 0,1 10 0,01 0 20 40 60 80 100 UR (V) 120 140 160 180 1 0 0,2 0,4 UR/UBR 0,6 0,8 1 Maximum Ratings: • • • • max. electrical power dissipation max. optical peak value, once max. continous optical operation ( Pelectr. = Popt. * Sabs * M * UR ) 100 mW at 22°C 200 mW for 1 s IPh (DC) ≤ 250 µA ≤ 1 mA for signal 50 µs "on" / 1 ms "out" Bias supply voltage Current limiting resistor Application hints: • • • • • • • Current limit is to be realized via protecting resistor or current limiting - IC inside the supply voltage. Use of low noise read-out - IC. For higher gain a regulation of bias voltage due to the temperature is to be realized. For very small signals stray light (noise source) is to be excluded by filters in order to improve the signal-noise relation. Avoid touching the window with fingers! Careful cleaning with Ethyl alcohol possible. Avoid use of pointed and scratching tools! min. 0,1 µF, closest to APD APD Diode, protective circuit Read-out circuit or f.e. 50Ω Load resistance Handling precautions: • • • Soldering temperature min. Pin - length ESD - protection Storage 260°C for max. 10 s. The device must be protected against solder flux vapour! 2mm Only small danger for the device. Standard precautionary measures are sufficient. Store devices in conductive foam. 2000/02 •