KS86P6408

KS86C6404/C6408/P6408 PRODUCT OVERVIEW 1 PRODUCT OVERVIEW SAM87RI PRODUCT FAMILY Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible programming environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating modes are included to support real-time operations. Many SAM87RI microcontrollers have an external interface that provides access to external memory and other peripheral devices. KS86C6404/C6408/P6408 MICROCONTROLLER The KS86C6404/C6408/P6408 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built around the powerful SAM87RI CPU core. Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register space, the size of the internal register file was logically expanded. The KS86C6404 has 4 K bytes of program memory on-chip and KS86C6408 has 8 K bytes. Using the SAM87RI design approach, the following peripherals were integrated with the SAM87RI core: — Five configurable I/O ports (32 pins) — 20 bit-programmable pins for external interrupts — 8-bit timer/counter with three operating modes — Low speed USB function The KS86C6404/C6408/P6408 is a versatile microcontroller that can be used in a wide range of low speed USB support general purpose applications. It is especially suitable for use as a keyboard controller and is available in a 42-pin SDIP and a 44-pin QFP package. OTP The KS86C6404/C6408 microcontroller is also available in OTP (One Time Programmable) version, KS86P6408. KS86P6408 microcontroller has an on-chip 8-Kbyte one-time-programmable EPROM instead of masked ROM. The KS86P6408 is comparable to KS86C6404/C6408, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW KS86C6404/C6408/P6408 FEATURES CPU • SAM87RI CPU core Timer/Counter • One 8-bit basic timer for watchdog function and programmable oscillation stabilization interval generation function One 8-bit timer/counter with Compare/Overflow Memory • • 4/8-Kbyte internal program memory (ROM) 208-byte RAM • Instruction Set • • 41 instructions IDLE and STOP instructions added for powerdown modes USB Serial Bus • • • Compatible to USB low speed (1.5 Mbps) device 1.0 specification. 1 Control endpoint and 2 Data endpoint Serial bus interface engine (SIE) — Packet decoding/generation — CRC generation and checking — NRZI encoding/decoding and bit-stuffing • 8 bytes each receive/transmit USB buffer Instruction Execution Time • 1.0 µs at 6 MHz fOSC Interrupts • • 25 interrupt sources with one vector, each source has its pending bit One level, one vector interrupt structure Operating Temperature Range • – 40 °C to + 85 °C Oscillation Circuit • • 6 MHz crystal/ceramic oscillator External clock source (6 MHz) Operating Voltage Range • 4.0 V to 5.25 V General I/O • Bit programmable five I/O ports (34 pins total) — (D+/PS2, D-/PS2 Included) Package Types • • 42-pin SDIP 44-pin QFP 1-2 KS86C6404/C6408/P6408 PRODUCT OVERVIEW BLOCK DIAGRAM P0.0-P0.7/INT2 P1.0-P1.7 P2.0-P2.7 / INT0 Port 0 Port 1 Port 2 SAM87RI BUS XIN OSC XOUT I/O Port And Interrupt Control Port 3 P3.0 P3.1 P3.2 P3.3/CLO Basic Timer Port 4 SAM87RI CPU P4.0 / INT1 P4.1 / INT1 P4.2 / INT1 P4.3 / INT1 D+/PS2 D-/PS2 3.3 V OUT USB TIMER 0 4/8-KB ROM 208-Byte Register 16 bytes USB Buffer Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW KS86C6404/C6408/P6408 PIN ASSIGNMENTS P3.1 P3.0 INT0 / P2.0 INT0 / P2.1 INT0 / P2.2 INT0 / P2.3 INT0 / P2.4 INT0 / P2.5 INT0 / P2.6 INT0 / P2.7 VDD VSS XOUT XIN TEST INT1 / P4.0 INT1 / P4.1 RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 P3.2 P3.3/CLO D+/PS2 D-/PS2 3.3 V OUT NC P0.0 / INT P0.1 / INT P0.2 / INT P0.3 / INT P0.4 / INT P0.5 / INT P0.6 / INT P0.7 / INT P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 KS86C6404 KS86C6408 42-SDIP (Top View) INT1 / P4.2 INT1 / P4.3 P1/7 Figure 1-2. Pin Assignment Diagram (42-Pin SDIP Package) 1-4 KS86C6404/C6408/P6408 PRODUCT OVERVIEW P0.4 /INT2 NC P0.0/INT2 P0.1/INT2 P0.2/INT2 P0.3/INT2 P0.5/INT2 25 P0.6/INT2 24 33 32 31 30 29 28 27 26 23 P0.7/INT2 NC NC 3.3 V OUT D-/PS2 D+/PS2 P3.3/CLO P3.2 P3.1 P3.0 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0 34 35 36 37 38 39 40 41 42 43 44 10 11 1 2 3 4 5 6 7 8 9 22 21 20 19 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P4.3/INT1 P4.2/INT1 RESET KS86C6404 KS86C6408 (Top View) 18 17 16 15 14 13 12 TEST XOUT VDD VSS XIN P4.0/INT1 INT0 / P2.4 INT0 / P2.5 Figure 1-3. Pin Assignment Diagram (44-Pin QFP Package) INT0 / P2.6 INT0 / P2.7 P4.1/INT1 1-5 PRODUCT OVERVIEW KS86C6404/C6408/P6408 PIN DESCRIPTIONS Table 1-1. KS86C6404/C6408/P6408 Pin Descriptions Pin Names P0.0-P0.7 Pin Type I/O Pin Description Bit-programmable I/O port for Schmitt trigger input or open-drain output. Port0 can be individually configured as external interrupt inputs. Pull-up resistors are assignable by software. Bit-programmable I/O port for Schmitt trigger input or open-drain output. Pull-up resistors are assignable by software. Bit-programmable I/O port for Schmitt trigger input or open-drain output. Port2 can be individually configured as external interrupt inputs. Pull-up resistors are assignable by software. Bit-programmable I/O port for Schmitt trigger input, open-drain or push-pull output. P3.3 can be used to system clock output(CLO) pin. Bit-programmable I/O port for Schmitt trigger input or open-drain output or push-pull output. Port4 can be individually configured as external interrupt inputs. In output mode, pull-up resistors are assignable by software. But in input mode, pull-up resistors are fixed. Programmable port for USB interface or PS2 interface. 3.3 V output from internal voltage regulator System clock input and output pin (crystal/ceramic oscillator, or external clock source) External interrupt for bit-programmable port0, port2 and port4 pins when set to input mode. Circuit Number B Pin Numbers 36-29 (30-23) Share Pins INT2 P1.0-P1.7 I/O B 28-21 (22-15) 3-10 (41-44, 1-4) – P2.0-P2.7 I/O B INT0 P3.0-P3.3 I/O C 2, 1, 42, 41 (40-37) 16, 17, 19, 20 (10, 11, 13, 14) P3.3/CLO P4.0-P4.3 I/O D INT1 D+/PS2 D-/PS2 3.3 VOUT XIN, XOUT I/O – – – – – 40-39 (36-35) 38 (34) 14, 13 (8, 7) 3-10, 16,17, 19, 20, 29-36 (30-23, 41-44, 1-4, 10, 11, 13, 14) 18 (12) 15 (9) 11 (5) 12, (6) 37 (31,32, 33) – – – INT0 INT1 INT2 I – PORT2/ PORT4/ PORT0 RESET TEST VDD VSS NC I I – – – RESET signal input pin. Input with internal pullup resistor. Test signal input pin (for factory use only; connected to VSS) Power input pin Ground input pin No connection A – – – – – – – – – NOTE: Pin numbers shown in parenthesis '( )' are for the 44-QFP package; others are for the 42-SDIP package. 1-6 KS86C6404/C6408/P6408 PRODUCT OVERVIEW PIN CIRCUITS Table 1-2. Pin Circuit Assignments for the KS86C6404/C6408/P6408 Circuit Number A B C D Circuit Type I I/O I/O I/O KS86C6404/C6408/P6408 Assignments RESET signal input Ports 0, 1, and 2 Port 3 Port 4 V DD Pull-Up Resistor VDD Pull-Up Enable PULL-UP RESISTOR Output Disable Output Data VSS Input Data D0 D1 I/O IN Noise Filter MUX Mode Output Input Input Data D0 D1 Figure 1-4. Pin Circuit Type A (RESET) Figure 1-5. Pin Circuit Type B (Ports 0, 1 and 2) 1-7 PRODUCT OVERVIEW KS86C6404/C6408/P6408 VDD Output Data Open Drain I/O Output Disable VSS Input Data MUX D0 D1 Mode Output Input Input Data D0 D1 Figure 1-6. Pin Circuit Type C (Port 3) 1-8 KS86C6404/C6408/P6408 PRODUCT OVERVIEW V DD Pull-Up Resistor Pull-Up Enable V DD Output Data Open Drain I/O Output Disable VSS Input Data MUX D0 D1 Mode Output Input Input Data D0 D1 Figure 1-7. Pin Circuit Type D (Port 4) 1-9 PRODUCT OVERVIEW KS86C6404/C6408/P6408 APPLICATION CIRCUIT 5V 5V VDD 0 Port 3 1 Port 0 2 3 Port 1 15 XIN XOUT KS86C6404 KS86C6408 KS86P6408 0 1 RESET Port 2 2 3 VSS1 NOTE: Port4 can use expend keyboard MATRIX. D+/PS2, D-/PS2 can use PS2 keyboard interface (see PS2CONINT, page 4-25). Port 4.2, 4.3 can use PS2 mouse interface. Port 3 can use LED direct drive. Figure 1-8. Keyboard Application Circuit Diagram 1-10 Port 4 H O S T DP DM D+/PS2 D-/PS2 7 KEYBOARD MATRIX KS86C6404/C6408/P6408 ELECTRICAL DATA 12 OVERVIEW ELECTRICAL DATA In this section, the following KS86C6404/C6408/P6408 electrical characteristics are presented in tables and graphs: — Absolute maximum ratings — D.C. electrical characteristics — Input/Output capacitance — A.C. electrical characteristics — Input timing for external interrupt (Ports 0, 2 and 4) D+/PS2, D-/PS2 : PS2 Mode Only — Input timing for RESET — Oscillator characteristics — Oscillation stabilization time — Clock timing measurement points at XIN — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by a reset — Stop mode release timing when initiated by an external interrupt — Characteristic curves 12-1 ELECTRICAL DATA KS86C6404/C6408/P6408 Table 12-1. Absolute Maximum Ratings (TA = 25°C) Parameter Supply Voltage Input Voltage Output Voltage Output Current High Output Current Low Symbol VDD VIN VO IOH IOL All input ports All output ports One I/O pin active All I/O pins active One I/O pin active Total pin current for ports 3 Total pin current for ports 0, 1, 2, 4 Operating Temperature Storage Temperature TA TSTG – – Conditions – Rating – 0.3 to + 6.5 – 0.3 to VDD + 0.3 – 0.3 to VDD + 0.3 – 18 – 60 + 30 + 100 + 100 – 40 to + 85 – 65 to + 150 °C °C mA Unit V V V mA 12-2 KS86C6404/C6408/P6408 ELECTRICAL DATA Table 12-2. D.C. Electrical Characteristics (TA = – 40 °C to + 85 °C, VDD = 4.0 V to 5.25 V) Parameter Operating Voltage Input High Voltage Symbol VDD VIH1 VIH2 VIH3 Input Low Voltage VIL1 VIL2 VIL2 Output High Voltage Output Low Voltage Output Low Current VOH Conditions f OSC = 6 MHz (instruction clock = 1 MHz) All input pins except VIH2 XIN RESET All input pins except VIL2 XIN RESET IOH = – 200 µA; All output ports except ports 0, 1 and 2, D+, D– IOL = 1 mA All output port except D+, D– VOL = 3V Port 3 only Input High Leakage Current ILIH1 (3) VIN = VDD All inputs except ILIH2 except D+, D– VIN = VDD XIN, XOUT, RESET VIN = 0 V All inputs except ILIL2 except D+, D– VIN = 0 V XIN, XOUT, RESET – – 3 µA VDD – 1.0 0.5VDD – – V – Min 4.0 0.8 VDD VDD – 0.5 0.5VDD – 0.2 VDD 0.4 V Typ 5.0 – Max 5.25 VDD VDD Unit V V VOL IOL – 8 – 15 0.4 23 V mA ILIH2 (3) Input Low Leakage Current ILIL1 (3) – – – – 20 –3 µA µA ILIL2 (3) – – – 20 µA 12-3 ELECTRICAL DATA KS86C6404/C6408/P6408 Table 12-2. D.C. Electrical Characteristics (continued) (TA = – 40 °C to + 85 °C, VDD = 4.0 V to 5.25 V) Parameter Output High Leakage Current Output Low Leakage Current Pull-up Resistors Symbol ILOH (1) Conditions VOUT = VDD All I/O pins and output pins except D+, D– VOUT = 0 V All I/O pins and output pins except D+, D– VIN = 0 V Ports 0, 1, 2, 4.2-3, Reset VIN = 0 V; P4.0-1 Normal operation mode 6 MHz CPU clock Idle mode; 6 MHz oscillator Stop mode – Min – Typ – Max 3 Unit µA ILOL (1) – – –3 µA RL1 RL2 25 50 2.4 5.5 2.2 180 100 kΩ Supply Current (2) IDD1 IDD2 IDD3 12 5 300 mA mA µA NOTES: 1. Except XIN and XOUT. 2. 3. Supply current does not include current drawn through internal pull-up resistors or external output current loads. When USB Mode Only in 4.2 V to 5.25 V, D+ and D– satisfy the USB spec 1.0. 12-4 KS86C6404/C6408/P6408 ELECTRICAL DATA Table 12-3. Input/Output Capacitance (TA = – 40 °C to + 85 °C, VDD = 0 V) Parameter Input Capacitance Output Capacitance I/O Capacitance Symbol CIN COUT CIO Table 12-4. A.C. Electrical Characteristics (TA = – 40 °C to + 85 °C, VDD = 4.0 V to 5.25 V) Parameter Interrupt Input High, Low Width RESET Input Low Width Symbol tINTH, tINTL tRSL Conditions P0, P2 and P4 RESET Min – 10 Typ 200 – Max – – Unit ns µs Conditions f = 1 MHz; Unmeasured pins are connected to VSS Min – Typ – Max 10 Unit pF t INTL t INTH 0.8 V DD 0.2 VDD Figure 12-1. Input timing for external interrupt (Ports 0, 2, and 4) t RSL RESET 0.5V DD Figure 12-2. Input Timing for RESET 12-5 ELECTRICAL DATA KS86C6404/C6408/P6408 Table 12-5. Oscillator Characteristics (TA = – 40°C + 85°C, VDD = 4.0 V to 5.25 V) Oscillator Main crystal Main ceramic (fOSC) Clock Circuit XIN C1 Test Condition Oscillation frequency Min – Typ 6.0 Max – Unit MHz C2 XOUT External clock XIN XOUT Oscillation frequency – 6.0 – Table 12-6. Oscillation Stabilization Time (TA = – 40°C + 85°C, VDD = 4.0 V to 5.25 V) Oscillator Main Crystal Main Ceramic Oscillator Stabilization Wait Time f OSC = 6.0 MHz (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) tWAIT stop mode release time by a reset – 216/ f OSC (note) Test Condition Min – Typ – Max 10 Unit ms – tWAIT stop mode release time by an interrupt – – NOTE: The oscillator stabilization wait time, tWAIT, is determined by the setting in the basic timer control register, BTCON. 12-6 KS86C6404/C6408/P6408 ELECTRICAL DATA Table 12-7. Data Retention Supply Voltage in Stop Mode (TA = – 40°C to + 85°C) Parameter Data Retention Supply Voltage Data Retention Supply Current Symbol VDDDR IDDDR Conditions Stop mode Stop mode; VDDDR = 2.0 V Min 2.0 – Typ – – Max 6 300 Unit V µA 1/f OSC t XL XIN t XH VDD 0.5V 0.4V Figure 12-3. Clock Timing Measurement Points at XIN 12-7 ELECTRICAL DATA KS86C6404/C6408/P6408 Internal Reset Operation ∼ ∼ Stop Mode Data Retention Mode Idle Mode (Basic Timer Active) VDD ∼ ∼ V DDDR Execution Of Stop Instruction RESET Normal Operating Mode 0.5 V DD 0.5 V DD t WAIT Figure 12-4. Stop Mode Release Timing When Initiated by a Reset Stop Mode Data Retention Mode Idle Mode (Basic Timer Active) VDD ∼ ∼ ∼ VDDDR External Interrupt Execution Of Stop Instruction Normal Operating Mode 0.8 V DD 0.2 V DD tWAIT Figure 12-5. Stop Mode Release Timing When Initiated by an External Interrupt 12-8 KS86C6404/C6408/P6408 ELECTRICAL DATA Table 12-8. Low Speed USB Electrical Characteristics (TA = – 40°C to + 85°C, Voltage Regulator Output V33out = 2.8 V to 3.5 V, typ 3,3 V) Parameter Transition Time: Rise Time Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Voltage Regulator Output Voltage Tr Tf Trfm Vcrs V33OUT CL = 50 pF CL = 350 pF CL = 50 pF CL = 350 pF (Tr/Tf) CL = 50 pF CL = 50 pF with V33OUT to GND 0.1 µF capacitor 75 – 75 – 80 1.3 2.8 – 300 – 300 120 2.0 3.5 % V V ns Symbol Conditions Min Max Unit Test Point S/W D.U.T R1 CL 2.8V R2 10% 90% 90% Measurement Points 10% Tr Tf R1 = 15 K Ω R2 = 1.5 K Ω CL = 50pF-350pF DM: S/W ON DP: S/W OFF Figure 12-6. USB Data Signal Rise and Fall Time DP Vcrs 3.3 V MAX: 2.0 V MIN: 1.3 V DM 0V Figure 12-7. USB Output Signal Crossover Point Voltage 12-9 ELECTRICAL DATA KS86C6404/C6408/P6408 NOTES 12-10 KS86C6404/C6408/P6408 MECHANICAL DATA 13 OVERVIEW 14.00 ³ 0.2 MECHANICAL DATA The KS86C6404/C6408/P6408 is available in a 42-pin SDIP package (Samsung: 42-SDIP-600) and a 44-pin QFP package (44-QFP-1010B). Package dimensions are shown in Figures 13-1 and 13-2. #42 #22 0-15 ° 40-SDIP-600 15.24 #1 #21 3.50 ± 0.2 39.10 ± 0.2 0.50 ± 0.1 (1.77) 1.00 ± 0.1 1.778 Figure 13-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600 ) 3.30 ± 0.3 0.51MIN 5.08MAX 39.50 MAX 0.25 +0.1 – 0.0 5 13-1 MECHANICAL DATA KS86C6404/C6408/P6408 13.20 ± 0.3 10.00 ± 0.2 0−8° 0.15 - 0.05 +0.10 13.20 ± 0.3 10.00 ± 0.2 44-QFP-1010B 0.10 MAX #44 0.05 MIN 2.05 ± 0.10 #1 0.80 0.35 +0.10 - 0.05 (1.00) 2.30 MAX NOTE: Dimensions are in millimeters. Figure 13-2. 44-Pin QFP Package Mechanical Data (44-QFP-1010B) 13-2 0.80 ±0.20 KS86C6404/C6408/P6408 KS86P6408 OTP 14 OVERVIEW KS86P6408 OTP The KS86P6408 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the KS86C6404/C6408 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data format. The KS86P6408 is fully compatible with the KS86C6404/C6408, both in function and in pin configuration. Because of its simple programming requirements, the KS86P6408 is ideal for use as an evaluation chip for the KS86C6404/C6408. P3.1 P3.0 INT0 / P2.0 INT0 / P2.1 INT0 / P2.2 INT0 / P2.3 INT0 / P2.4 INT0 / P2.5 SDAT/INT0 / P2.6 SCLK / INT0 / P2.7 VDD/VDD VSS /VSS XOUT/XOUT XIN /XIN TEST/TEST INT1 / P4.0 INT1 / P4.1 RESET / RESET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 P3.2 P3.3/CLO D+ D3.3 V OUT NC P0.0 / INT2 P0.1 / INT2 P0.2 / INT2 P0.3 / INT2 P0.4 / INT2 P0.5 / INT2 P0.6 / INT2 P0.7 / INT2 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 KS86P6408 42-SDIP (Top View) INT1 / P4.2 INT1 / P4.3 P1/7 Figure 14-1. KS86P6408 Pin Assignments (42-SDIP Package) 14-1 KS86P6408 OTP KS86C6404/C6408/P6408 P0.4 /INT2 NC P0.0/INT2 P0.1/INT2 P0.2/INT2 P0.3/INT2 P0.5/INT2 25 P0.6/INT2 24 33 32 31 30 29 28 27 26 23 P0.7/INT2 NC NC 3.3 V OUT D-/PS2 D+/PS2 P3.3/CLO P3.2 P3.1 P3.0 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0 34 35 36 37 38 39 40 41 42 43 44 10 11 1 2 3 4 5 6 7 8 9 22 21 20 19 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P4.3/INT1 P4.2/INT1 RESET/ RESET KS86P6408 (Top View) 18 17 16 15 14 13 12 P2.6/INT0/ SDAT P2.7/INT0/ SCLK TEST/TEST XOUT/XOUT VDD/VDD P2.4/INT0 P2.5/INT0 VSS/ VSS XIN/XIN P4.0/INT1 Figure 14-2. KS86P6408 Pin Assignments (44-QFP Package) 14-2 P4.1/INT1 KS86C6404/C6408/P6408 KS86P6408 OTP Table 14-1. Descriptions of Pins Used to Read/Write the EPROM Main Chip Pin Name P2.6 Pin Name SDAT Pin No. 9 (3) During Programming I/O I/O Function Serial DATa Pin (Output when reading, Input when writing) Input and Push-pull Output Port can be assigned Serial CLocK Pin (Input Only Pin) Chip Initialization and EPROM Cell Writing Power Supply Pin (Indicates OTP Mode Entering) When writing 12.5 V is applied and when reading. 0 V: OTP write and test mode 5 V: Operating mode Logic Power Supply Pin. P2.7 TEST SCLK TEST 10 (4) 15 (9) I/O I RESET VDD / VSS RESET VDD / VSS 18 (12) 11(5)/12(6) I – NOTE: ( ) means 44 QFP package. Table 14-2. Comparison of KS86P6408 and KS86C6404/C6408 Features Characteristic Program Memory Operating Voltage (VDD) OTP Programming Mode Pin Configuration EPROM Programmability KS86P6408 8-Kbyte EPROM 4.0 V to 5.25 V VDD = 5 V, VPP (RESET) = 12.5 V 42 SDIP/44 QFP User Program 1 time 42 SDIP/44 QFP Programmed at the factory KS86C6404/C6408 8-Kbyte mask ROM 4.0 V to 5.25 V OPERATING MODE CHARACTERISTICS When 12.5 V is supplied to the VPP (RESET) pin of the KS86P6408, the EPROM programming mode is entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table 14-3 below. Table 14-3. Operating Mode Selection Criteria VDD 5V VPP (RESET) 5V 12.5 V 12.5 V 12.5 V REG/ MEM 0 0 0 1 ADDRESS R/W 1 0 1 0 EPROM read MODE (A15-A0) 0000H 0000H 0000H 0E3FH EPROM program EPROM verify EPROM read protection NOTE: "0" means Low level; "1" means High level. 14-3 KS86P6408 OTP KS86C6404/C6408/P6408 START Address= First Location VDD =5V, V PP=12.5V x=0 Program One 1ms Pulse Increment X YES x = 10 NO FAIL Verify Byte Verify 1 Byte FAIL Last Address NO Increment Address VDD = V PP= 5 V FAIL Compare All Byte PASS Device Failed Device Passed Figure 14-3. OTP Programming Algorithm 14-4 KS86C6404/C6408/P6408 KS86P6408 OTP Table 14-4. D.C. Electrical Characteristics (TA = – 40_C to + 85_C, VDD = 4.0 V to 5.25 V) Parameter Supply Current (note) Symbol IDD1 IDD2 IDD3 Conditions Normal mode; 6 MHz CPU clock Idle mode; 6 MHz CPU clock Stop mode Min – Typ 5.5 2.2 180 Max 12 5 300 Unit mA µA NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. 14-5 KS86P6408 OTP KS86C6404/C6408/P6408 NOTES 14-6