1.5 A, 31 V, 30 kHz, Buck Converter
NR117K
Data Sheet
Description
Package
The NR117K is buck converter ICs that integrate the
power MOSFET. With the current mode control, ultra
low ESR capacitors such as ceramic capacitors can be
used. The ICs have protection functions such as the
overcurrent protection, undervoltage lockout, and thermal
shutdown. An adjustable Soft-Start by an external
capacitor prevents the excessive inrush current in startup.
The feature increasing efficiency at light loads allows the
device to be used in the energy-saving applications. The
ICs integrate phase compensation circuit which reduces
the number of external components and simplifies the
design of customer application. The IC has the EN pin
that turns the regulator on or off, and achieves low power
consumption requirements. The package of NR117K is
the HSOP8 with an exposed thermal pad on the back side.
HSOP8
Features
● Up to 87% Efficiency
(VIN = 12 V, VOUT = 5 V, IOUT = 0.3 A)
Up to 68% Efficiency at Maximum at Ligh Load
(VIN = 12 V, VOUT = 5 V, IOUT = 10 mA)
● Current mode PWM control
● Stable with Low ESR Ceramic Output Capacitors
● No External Components Required by Incorporating
Phase Compensation
● Soft-Start Function
Adjustable Soft-Start time with an External Capacitor
● External ON/OFF Function
● Frequency: 30 kHz (EMI considered)
● Protection Functions:
● Overcurrent Protection (OCP): Drooping, auto-restart
Thermal Shutdown (TSD): Auto-restart
Under Voltage Lockout (UVLO)
1
8
2
7
3
6
4
5
Not to scale
Specification
●
●
●
●
Input Voltage, VIN = 8 V to 31 V
Output Voltage, VOUT = 0.8 V to 24 V
Maximum Output Current, IOUT = 1.5 A
Operation Frequency 30 kHz
Application
● AV Equipment
● Auxiliary Power Supply
Typical Application
R2
VIN
R1
2
IN
7
C1
C2
C3
1
BS
VOUT
3
SW
EN
8
L1
U1
NR117K
R3
D1
R4
SS
GND
C6
4
ISET
FB
C4
C5
5
6
NR117K-DSE Rev.2.5
SANKEN ELCTRIC CO.,LTD.
Dec. 07, 2022
http://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2016
R5
1
NR117K
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 3
2. Recommended Operating Conditions ----------------------------------------------------------------- 3
3. Electrical Characteristics -------------------------------------------------------------------------------- 4
4. Mechanical Characteristics ----------------------------------------------------------------------------- 4
5. Typical Performance Characteristics ----------------------------------------------------------------- 5
6. Block Diagram --------------------------------------------------------------------------------------------- 7
7. Pin Configuration Definitions--------------------------------------------------------------------------- 7
8. Typical Application --------------------------------------------------------------------------------------- 8
9. Physical Dimensions -------------------------------------------------------------------------------------- 9
10. Marking Diagram --------------------------------------------------------------------------------------- 10
11. Operational Description ------------------------------------------------------------------------------- 11
11.1. PWM Output Control ---------------------------------------------------------------------------- 11
11.2. Soft Start Function -------------------------------------------------------------------------------- 12
11.3. External ON/OFF Function --------------------------------------------------------------------- 12
11.4. Overcurrent Protection -------------------------------------------------------------------------- 13
11.5. Thermal Shutdown -------------------------------------------------------------------------------- 13
12. Design Notes ---------------------------------------------------------------------------------------------- 13
12.1. External Components ---------------------------------------------------------------------------- 13
12.1.1. Choke Coil, L1 ------------------------------------------------------------------------------- 13
12.1.2. Input Capacitor, CIN ------------------------------------------------------------------------ 14
12.1.3. Output Capacitor, COUT -------------------------------------------------------------------- 15
12.1.4. Freewheel Diode, D1 ------------------------------------------------------------------------ 16
12.1.5. Output Voltage, VOUT, and Output Capacitor ----------------------------------------- 16
12.2. Allowable power dissipation -------------------------------------------------------------------- 16
12.2.1. Power Supply Stability --------------------------------------------------------------------- 17
12.2.2. Spike Noise Reduction ---------------------------------------------------------------------- 17
12.2.3. Reverse Bias Condition --------------------------------------------------------------------- 18
12.3. Pattern Layout ------------------------------------------------------------------------------------- 18
12.3.1. Large Current Trace ----------------------------------------------------------------------- 18
12.3.2. Input and Output Capacitor -------------------------------------------------------------- 18
12.3.3. FB Pin Setting (Output Voltage Setting) ------------------------------------------------ 18
13. Pattern Layout Example ------------------------------------------------------------------------------- 19
Important Notes ---------------------------------------------------------------------------------------------- 21
NR117K-DSE Rev.2.5
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NR117K
1.
Absolute Maximum Ratings
Unless otherwise specified, TA = 25 °C.
Parameter
Symbol
Conditions
Rating
Unit
DC Input Voltage
VIN
35
V
BS Pin Voltage
VBS
44
V
BS–SW Voltage
VBS-SW
SW Pin Voltage
VSW
35
V
FB Pin Voltage
VFB
5.5
V
EN Pin Voltage
VEN
35
V
SS Pin Voltage
VSS
5.5
V
1.69
W
DC
8
Pulse width ≤ 30ns
12
The IC is mounted on the
glass-epoxy board (30 ×
30 mm) with copper area
25 × 25 mm)
TJ = 150 °C (max.)
V
Power Dissipation (1)
PD
Junction Temperature (2)
TJ
−40 to 150
°C
Storage Temperature
Thermal Resistance
(junction–GND Pin)
TS
−40 to 150
°C
θJP
40
°C /W
70
°C /W
Thermal Resistance
(junction–ambient air)
2.
θJA
The IC is mounted on the
glass-epoxy board (30 ×
30 mm) with copper area
(25 × 25 mm)
Remarks
Recommended Operating Conditions
Parameter
Symbol
DC Input Voltage (1)
DC Output Current
Output Voltage
Ambient Operating
Temperature (3)
(2)(3)
Ratings
Units
Min.
Max.
VIN
8
31
V
IOUT
0
1.5
A
VOUT
0.8
24
V
TOP
−40
85
°C
Conditions
(1)
Limited by thermal shutdown.
The temperature detection of thermal shutdown is about 160 °C.
(1)
The minimum value of input voltage is taken as the larger one of either 8 V or VOUT +3 V.
When IOUT < 1 A, VIN = VOUT + 1.
Input voltage is limited by the maximum duty-cycle. VIN > VOUT / 0.9 (typ.)
(2)
See Typical Application Circuit for recommended circuit.
(3)
To be used within the allowable package power dissipation characteristics.
(2)
NR117K-DSE Rev.2.5
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3
NR117K
3.
Electrical Characteristics
Unless otherwise specified, TA = 25 °C.
Parameter
Symbol
Min.
Typ.
Max.
Unit
0.784
0.800
0.816
V
VIN = 12 V, IOUT = 0.3 A
−40 °C to +85 °C
VIN = 12 V, IOUT = 0.3 A
―
±0.05
―
mV/°C
21
30
39
kHz
VIN = 8 V to 31 V,
VOUT = 5 V, IOUT = 0.3 A
―
50
―
mV
VIN = 12 V, VOUT = 5 V,
IOUT = 0.1 A to 0.3 A
VIN = 12 V, VOUT = 5 V,
ISET = GND
VIN = 12 V, VOUT = 5 V,
IOUT = 0 A
VIN = 12 V, VOUT = 5 V,
IOUT = 0 A, VEN = 0 V
―
50
―
mV
―
2.1
―
A
―
1
―
mA
―
1
―
μA
VSS = 0 V, VIN = 12 V
6
10
14
μA
IEN
VEN = 10 V
―
20
50
μA
VC/EH
VIN = 12 V
0.7
1.4
2.1
V
DMAX
―
90
―
%
tON(MIN)
―
150
―
ns
TSD
151
165
―
°C
TSD_HYS
―
20
―
°C
RON(H)
―
150
―
mΩ
Reference Voltage
VREF
Output Voltage Temperature
Coefficient
ΔVREF/ΔT
Switching Frequency
fOSC
Line Regulation (4)
VLINE
Load Regulation (4)
VLOAD
Overcurrent Protection
Threshold
IS
Supply Current
IIN
Shutdown Supply Current
SS Pin
EN Pin
Source current at
Low Level Voltage
Sink Current
Threshold Voltage
Maximum Duty-cycle (4)
(4) (5)
Minimum On-time
Thermal Shutdown Threshold
Temperature (4)
Thermal Shutdown Restart
Hysteresis of Temperature (4)
High-side Switch On-resistance(4)
4.
IIN(OFF)
IEN/SS
Conditions
VIN = 12 V, IOUT = 0.3 A
Mechanical Characteristics
Parameter
Conditions
Package Weight
(4)
(5)
Min.
Typ.
Max.
Unit
—
0.08
—
g
Guaranteed by design.
Input/ Output conditions are controlled by the minimum on time.
NR117K-DSE Rev.2.5
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4
NR117K
5.
Typical Performance
Characteristics
NR117K EFF Vo=3.3
NR117K EFF
90
90
Efficiency, η (%)
100
80
VIN=10V
12V
15V
18V
24V
70
60
50
40
0.01
0.10
eff [%]
eff [%]η (%)
Efficiency,
100
1.00
80
VIN=10V
12V
15V
18V
24V
70
60
50
40
0.01
10.00
Vo=5.0
0.10
Io [A]IOUT (A)
Output Current,
1.00
10.00
Io [A] IOUT (A)
Output Current,
NR117K(30kHz)
Figure
5-1. UVLOVo=5V
EfficiencyL=150uH
(VOUT Ta=RT
= 3.3 V)
Figure 5-2.
Efficiency (VOUT = 5.0 V)
Output Voltage, VOUT
(V)
Output Voltage, VOUT (V)
6.0
5.0
Vo [V]
4.0
3.0
2.0
1.0
0.0
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
VIN=10V
12V
15V
18V
24V
8.0
Output Current, IOUT (A)
Input Voltage, VIN (V)
VIN[V]
Figure 5-3.
NR885K(500kHz)LoadReg.Vo=3.3V L=10uH
5.100
5.080
5.040
5.020
5.000
Iin [mA]
VIN=10V
12V
15V
18V
24V
5.060
Overcurrent Protection
NR114K/115K,NR116K,NR117K IQ
Ta=25℃
Input Current, IIN (mA)
Output Voltage,
VOUT (V)
Vo [V]
Figure 5-4.
Output Startup (Load = CR)
4.980
4.960
4.940
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
4.920
0.0
4.900
0.0
0.5
1.0
1.5
2.0
0.0
5.0
Figure 5-5.
Load Regulation
10.0
15.0
20.0
25.0
30.0
Input Voltage,
VIN (V)
VIN[V]
Io [A] IOUT (A)
Output Current,
Figure 5-6.
NR117K-DSE Rev.2.5
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IN Pin Sink Current at No Load
5
NR117K
NR110K,111K,114K,115K,116K,117K
IQ_off
NR110K focs Vo=3.3V L=10uH
0.35
40
0.30
38
0.25
36
Frequency
fosc [kHz] (kHz)
Iin [mA]I (mA)
Input Current,
IN
0.40
0.20
0.15
0.10
0.05
0.00
-0.05
-0.10
34
32
VIN=10V
12V
15V
18V
24V
30
28
26
24
22
0.0
5.0
10.0
15.0
20.0
VIN[V]
25.0
30.0
20
0.0
0.2
Input Voltage, VIN (V)
Figure 5-7.
Quiescent Current
0.4
0.6
0.8
Io [A]
1.0
1.2
1.4
1.6
Output Current, IOUT (A)
Figure 5-8.
NR117K-DSE Rev.2.5
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Operating Frequency
6
NR117K
6.
Block Diagram
2 IN
EN 7
ON/OFF
P.REG
VREF
0.8 V
Σ
Current Sense
Amp.
OCP
OSC
1 BS
Drive Reg.
ISET 6
OCP Ref.
ISET
3 SW
PWM Logic
Conpensation
Err Amp.
5 FB
OCP Ref.
0.8 V
SS
TSD
UVLO
7.
4
8
GND
SS
Pin Configuration Definitions
Pin
1
8
2
7
3
6
4
5
Name
1
BS
2
IN
3
SW
4
GND
5
FB
6
ISET
7
EN
8
SS
Descriptions
High-side boost input pin.
The power is supplied to the driver of high-side N-channel MOSFET
through the BS pin. A capacitor and a resistor are connected in series
between the SW and BS pins.
This pin is input pin. The power is supplied to the IC through the IN pin.
This pin is output pin. The power is output through the SW pin.
Connect the LC filter for the output to the this pin
A capacitor is required to be connected between the SW and BS pins to
supply the power to the high-side MOSFET.
Ground pin. The exposed pad must be connected to the GND pin.
To control constant voltage, the output voltage is input to the FB pin, and
is compared with internal reference voltage.
The feedback threshold voltage is 0.8 V.
The output voltage is set by resistors connected to the FB pin. R5 and R6
are connected between the FB pin and output line. R4 is connected
between the FB and GND pins.
OCP setting pin. This pin must be shorted to the ground.
Enable signal input pin.
When high signal is input to this pin, the internal regulator turns on.
When low signal is input to this pin, the internal regulator turns off.
Soft-start input. The soft-start period can be adjusted by the capacitor
connected between the SS and GND pins.
The soft-start operation reduces the over-shoot of the output voltage and
rush current.
NR117K-DSE Rev.2.5
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Dec. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2016
7
NR117K
8.
Typical Application
R2
VIN
2
R1
C1
C2
IN
7
C3
1
BS
VOUT
3
SW
EN
8
L1
U1
NR117K
R3
D1
R4
SS
GND
C6
4
ISET
FB
C4
C5
5
6
R5
Table 8-1 Reference Circuit Value (VOUT = 5.0 V)
Symbol
C1
C2
C3
C4
C5
C6
D1
Rating
10 μF, 25 V
10 μF, 25 V
0.1 μF
22 μF, 16 V
22 μF, 16 V
0.1 μF
40 V, 5 A, Schottky diode
Symbol
L1
R1
R2
R3
R4
R5
Rating
100 μH
100 kΩ
22 Ω
1.6 kΩ
6.8 kΩ
1.6 kΩ
NR117K-DSE Rev.2.5
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8
NR117K
9.
Physical Dimensions
● HSOP8 Pckae Dimensions
NOTES
●
●
●
●
Dimensions in milimeters.
Not to scale
Pin treatment: Pb-free (RoHS compliant)
When soldering the products, please be sure to minimize the working time,
within the following limits:
- Reflow Preheat ; 180 °C / 90 ± 30 s
Solder heating ; 250 °C / 10 ± 1 s (260 °C peak, 2 times)
● Soldering iron ; 380 ±10 °C / 3.5 ±0.5 s (1 time)
● Recommended Land Pattern
NOTES
● Dimensions in millimeters (inches)
● Not to scale
NR117K-DSE Rev.2.5
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9
NR117K
10. Marking Diagram
8
NR117K
Part Number
SK YM WW
1
Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N or D)
WW is the week of the month (01 to 05)
Control Number
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NR117K
The IC starts switching operation with minimum or
maximum duty-cycle. The high-side switching MOSFET,
M1, is for supplying output power.
At startup of IC, the SW pin becomes low status during
short time to charge the boost capacitor, C3, for M1
driving.
When M1 is on-status, the coil current is increased by
applying the voltage the SW pin and the coil. In addition,
the output of the current sense amplifier also increases.
Signal A is sum of the current sense amplifier output
and slope compensation signal. The comparator compares
the signal A with the error amplifier output. When the
signal A exceeds the output voltage of the error amplifier
(Error Amp.), the current comparator output becomes “H”
and the RS flip-flop circuit in PWM logic is reset. Then,
M1 turns off, and the regenerative current flows through
the Schottky diode, D1.
The set signal is generated in each cycle, and set the RS
flip-flop circuit.
If the signal A does not exceed the output voltage of
the error amplifier (Error Amp.), the signal of off duty
circuit sets RS flip-flop circuit.
11. Operational Description
11.1. PWM Output Control
The IC consists of total three blocks; two feedback loop
systems (current control and voltage control) and one
slope compensation. For the voltage control feedback,
divided output voltage by resistor is input to the FB pin.
The internal error amplifier compares the FB pin voltage
with the reference voltage VREF = 0.8V.
For the current control feedback, the loop makes the
coil current feedback to the PWM control. The coil
current that is branched by using sense MOSFET is
detected by the current sense amplifier. In addition, the
slope compensation is made for current control slope in
order to prevent subharmonic oscillations.
The PWM control with current control method is
achieved by calculating the voltage control feedback, the
current control feedback and the slope compensation
signals. (See Figure 11-1.)
When UVLO is released or the EN pin or the SS pin
voltage exceeds the threshold, the IC starts the switching
operation.
VIN
IN
C1
C2
2
R1
7
ON/OFF
P.REG
EN
VREF
0.8 V
Σ
Current Sense
Amp.
OCP
OSC
1
Drive Reg.
ISET
6
R2
OCP Ref.
ISET
M1
A
Comp.
BS
VOUT
C3
3
PWM Logic
SW
L1
Conpensation
Err Amp.
R3
5
OCP Ref.
0.8 V
R4
FB
C4
SS
C5
TSD
D1
R5
UVLO
4
8
GND
SS
C6
Figure 11-1.
Basic Structure of Chopper Type Regulator with PWM Control by Current Control
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NR117K
Figure 11-2 shows the SS pin internal circuit.
When capacitor, CSS, is connected to the SS pin, the IC
operates in soft start at startup.
The output voltage, VOUT, increases depending on the
charged voltage of CSS.
Delay time, tDELAY is calculated by Equation (1).
Soft start time, tSS is calculated by Equation (2).
If the soft start function is unused, the SS pin is
unconnected (open status).
t DLAY = CSS ×
0.9 (V)
ISS
(1)
SS pin voltage at open is 2.5 V. Figure 11-4 shows the
relationship between the CSS discharge time and CSS
capacitance. CSS discharge time is require time that the SS
pin voltage decreases to 0 V from 2.5 V
CSS Discharge Time (ms)
11.2. Soft Start Function
CSS Capacitance (µF)
t SS = CSS ×
1.8 (V) − 0.9 (V)
0.9 × ISS
(2)
5
IEN/SS = 10 μA
SS
8
×0.9
VREF = 0.8 V
0.9V
Error Amp.
Figure 11-2.
SS Pin Internal Circuit
t=
COUT × VOUT
IS
(3)
11.3. External ON/OFF Function
IN Pin
Voltage
6V
Time
SS Pin
Voltage
CSS Discharge Time vs. CSS Capacitance
In case the CSS is short circuit status or the CSS value is set
too small, the output capacitor is charged by the output
current that is limited by overcurrent protection threshold
current, Is.
In the case, the time constant is calculated by Equation
(3). This time constant is in no load status. When the
circuit has some load, the load current is subtracted from
Is.
FB
CSS
Figure 11-4.
2.5V
When the external signal is input to EN pin, the IC
turns on/off the output.
When the EN pin voltage is decreased to VEN/TH = 1.4
V or less by open collector switch as shown in Figure 115, the switching operation stops.
When the external on/off function is unused, pull up
the EN pin to the IN pin by resister (100 kΩ) as shown in
Figure 11-6.
1.8 V
VIN
0.9 V
Time
Output
Voltage
100 k
7
Time
tDELAY
U1
tSS
Figure 11-5.
Figure 11-3.
EN
2
IN
External ON/OFF Function
Soft Start Operation Waveform
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12
NR117K
VIN
Output
Voltage
2
IN
100 k
7 EN
TSD release
temperature
U1
TSD activation
temperature
Figure 11-6. External ON/OFF Function Disabled
Junction Temperature
11.4. Overcurrent Protection
Figure 11-8.
The IC has an overcurrent protection (OCP) circuit.
The OCP circuit detects the peak current of the switching
transistor. When the peak current exceeds the setting
current, the IC limits the current by forcibly shortening
the on-time of transistor and decreasing the output voltage
(see Figure 11-7). When the overcurrent state is released,
the output voltage automatically returns.
12. Design Notes
12.1. External Components
6.00
Take care to use properly rated, including derating as
necessary and proper type of components.
Output Voltage
5.00
4.00
Vo [V]
Output Voltage Characteristics of
Thermal Shutdown
3.00
R2
VIN
2.00
2
1.00
R1
7
0.00
0.0
0.5
1.0
Output Current
1.5
2.0
C1
C2
BS
EN
8
L1
U1
NR117K
R3
D1
R4
SS
GND
Output Voltage Characteristics at
Overcurrent
VOUT
3
SW
Io [A]
Figure 11-7.
C3
1
IN
C6
4
Figure 12-1.
ISET
6
FB
C4
C5
5
R5
The IC Peripheral Circuit
11.5. Thermal Shutdown
The thermal shutdown (TSD) circuit detects the
junction temperature of the IC. When the junction
temperature exceeds about 160 °C, TSD circuit is
activated and stops the switching of the output transistor.
Then, the output voltage decreases.
When the junction temperature decreases about 20 °C
from the TSD circuit activation temperature, the output
voltage automatically returns.
The TSD circuit protects from the heat generation for
short time such as momentary short circuit. The operation
and the reliabilities of the IC are not guaranteed under the
continuous heat generation conditions such as short
circuit for a long time.
12.1.1. Choke Coil, L1
The choke coil, L1, is the most important component
in chopper type switching regulators. In order to keep the
stabilized regulator operation, the coil must be avoided
the unsafe operation including the saturation condition or
the over-heat excessively.
If the winding resistance of the choke coil is too high,
the efficiency decreases and may not be the setting value.
The limiting current of the overcurrent protection is
about 4 A. Thus, you must consider about the self-heating
of the choke coil at the status including overload and the
momentary short circuit. The selection points of the
choke coil are as follows:
● Select choke coil for switching regulator.
It is not recommended to use the coil for noise filter,
since its power dissipation becomes high and causes
high heat generation.
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NR117K
● Avoid a sub-harmonic oscillations.
The current control that detects peak current may cause
a sub-harmonic oscillation theoretically in the
condition that the duty-cycle is over 50%.
In the sub-harmonic oscillation, coil current is
changed by the integer multiple of switching frequency.
Thus, the IC compensates the coil current in internal to
operate stably.
Therefore, the inductance must be selected properly
according to output voltage.
Figure 12-2 shows the inductance selection range to
avoid a sub-harmonic oscillation in the duty-cycle
over 50%. The value in Figure 12-2 is reference value,
since the maximum inductance is changed by some
conditions including input voltage, output voltage and
output current.
IIN
Large inductance
Small inductance
ILP
ILP
ΔIL
ΔIL
IOUT
0
Figure 12-3.
Ripple Current of Choke Coil
● Fulfill the rated current.
The rated current value of the choke coil must be set
larger than the maximum load current, which is used.
If the load current exceeds to the rated current value of
the coil, the inductance of the coil decreaes rapidly and
large current flows.
1200
● Select the low noise type.
The open magnetic circuit type core like a drum type
may generate noise in peripheral circuit due to the
magnetic flux passing outside of coil.
It is recommended to use the Coils of closed magnetic
circuit type core such as toroidal type, EI type and EE
type.
1100
Inductance (µH)
コイル（インダクタンス） [uH]
1000
900
800
700
600
Inductance
インダクタンスL
selection range
選定範囲
500
400
300
200
100
0
0
2
4
6
8
10
12
14
16
18
20
22
24
出力電圧Vo [V]
12.1.2. Input Capacitor, CIN
Output Voltage (V)
Figure 12-2. Inductance Selection Range in f = 30 kHz
ΔIL is the ripple current of the choke coil. ILP is the peak
current of the choke coil.
ΔIL and ILP are calculated by following equations.
∆IL =
(VIN − VOUT )
× VOUT
L × VIN × f
(4)
ILP =
∆IL
+ IOUT
2
(5)
As above equations, ΔIL and ILP increase according to
decreasing the inductance, L. Thus, too small inductance
setting may cause the unstable operation of the switching
regulator because the coil current ripple becomes large.
You must consider that the inductance of the choke coil
decreases in the magnetic saturation condition such as
overload and short circuit of load.
The input capacitor, CIN, shows C1 and C2.
CIN is the bypass capacitor of input circuit. It supplies
the current of short pulses to the regulator during
switching and compensates the input voltage drop. Thus,
CIN should be placed as close the IC as possible. Even if
the rectifying capacitor of an AC/DC convertor circuit is
in input circuit, CIN is required when the rectifying
capacitor is not placed near the IC.
Since large ripple current flows through CIN, CIN must
be used the capacitor for the switching regulator, which is
for high frequency and has low impedance characteristics.
The selection points of CIN are as follows:
● Fulfill the breakdown voltage rating.
● Fulfill sufficient allowable ripple current rating.
IIN
2
VIN
IN
Ripple
current
CIN
Figure 12-4.
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GND
4
Current Flow of Input Capacitor
14
NR117K
Since large ripple current flows through COUT, COUT
must be used the capacitor for the switching regulator,
which is for high frequency and has low impedance
characteristics.
If the impedance of COUT is high, the IC may be
occurred unstable switching operation in low temperature
environment.
IIN
0
IV
IP
tON
T
Figure 12-5.
D=
IL
L1
Ripple
current
Current Waveform of Input Capacitor
If the CIN voltage and ripple current is over the rating
of the breakdown voltage and the allowable ripple current,
or you does not consider derating for these rating, the
following problem may be occurred. Thus, you must
consider derating for breakdown voltage and the
allowable ripple current.
● The capacitor life time short (burst, capacitance
decreasing, equivalent impedance increasing, etc.)
● The unstable switching operation of the IC.
The ripple current of CIN increases depending on the
load current. The effective value of the ripple current,
IINR(RMS), is calculated by Equation (6).
ESR
IINR(RMS)
RL
Figure 12-6.
Current Flow of Output Capacitor
IO
∆IL
(6)
If VIN is 20 V, IOUT is 3 A, VOUT is 5 V,
IINR(RMS) ≈ 1.2 ×
IOUT
COUT
0
VOUT
≈ 1.2 ×
× IOUT
VIN
tON
T
VOUT
5 (V)
× 3 (A) = 0.9 (A)
20 (V)
In the case, you must select the capacitor that the
allowable ripple current is more than 0.9 A.
Figure 12-7.
The ripple current of COUT is same with the ripple
current of the choke coil, and does not depend on the load
current. Thus, the effective value of the ripple current,
IOR(RMS), is calculated by Equation (7).
IOR(RMS) =
12.1.3. Output Capacitor, COUT
The output capacitor, COUT, shows C4 and C5.
In the current control method, the feedback loop which
detects the inductor current is added to the voltage control
method. The stable operation is achieved without
considering the effect of the secondary delay factor of LC
filter.
Thus, the capacitance of the capacitor of the LC filter
can be reduced. The IC can achieve the stable operation
using the low ESR capacitor (ceramic capacitor).
The COUT is the rectifying capacitor of switching output,
and composes the LC low-pass filter with choke coil, L1.
The current that is same of the ripple current of choke
coil, ΔIL, flows through COUT. Therefore, you must
consider derating for breakdown voltage and the
allowable ripple current (See Section 12.1.2 Input
Capacitor).
Current Waveform of Output Capacitor
∆IL
(7)
2√3
If ΔIL is 0.5 A,
IOR(RMS) =
0.5 (A)
2√3
≈ 0.14 (A)
In the case, you must select the capacitor that the
allowable ripple current is more than 0.14 A.
The output ripple voltage of the IC, VRIP, is calculated
by Equation (8).
VRIP = ∆IL × COUT ESR
(8)
Where, ΔIL is the ripple current of the choke coil (same
of the ripple current of COUT), and COUTESR is the
equivalent series resistance (ESR) of COUT.
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From Equation (8), you should set the low ESR
capacitor in order to reduce the output ripple voltage.
In same family of the electrolytic capacitor, the larger
capacitance in same the rating voltage, or the higher
rating voltage (the larger package size) in same
capacitance is, the lower the ESR generally becomes.
If ΔIL is 0.5 A, VRIP is 40 mV,
COUT ESR =
VRIP 40(mV)
=
= 80 (mΩ)
∆IL
0.5 (A)
*When ESR is about 150 mΩ, CFB connects to between
FB pin and VOUT as shown in Figure 12-8. The value of
CFB is about 220pF to 2200pF.
VOUT
3
SW
L1
(9)
In the case, you must select the capacitor that the ESR
is less than 80 mΩ
R3
U1
R4
GND
FB
C5
5
4
In addition, the ESR depends on temperature, and
generally increases in low temperature. Thus, you should
check the ESR at the actual used temperature. The ESR
characteristic is shown in each capacitor maker.
CFB
D1
Figure 12-8.
R5
Using Electrolytic Capacitor
12.1.4. Freewheel Diode, D1
12.2. Allowable power dissipation
Flywheel diode, D1, is for discharging energy that is
charged choke coil in off-status.
External flywheel diode, D1, improves efficiency, and
must be used a Schottky-barrier diode. If the fast recovery
diode is used, the IC may be damaged by the reverse
voltage that is caused by the surge at turn-on or the
forward voltage in on-status.
Since the output voltage of the SW pin (3 pin) is nearly
same with input voltage, the reverse breakdown voltage
of D1 is required more than the input voltage.
You must not use ferrite beads for the flywheel diode.
The power dissipation of the IC must be within the
allowable power dissipation shown in Figure 12-9, and is
calculated by Equation Figure 12-9.
12.1.5. Output Voltage, VOUT, and Output
Capacitor
The output capacitor determines according to the
output voltage VOUT. In each voltage, Table 12-1 shows
the capacitance that the IC can operate stable. The values
are reference. The ESR of the electrolytic capacitor is
about 150 mΩ. See Section 12.1.1 about the inductance,
L, setting.
100
P = VOUT × IOUT × (
− 1) −VF × IOUT
ηx
VUTO
× (1 −
)
VIN
(10)
where,
VOUT is output voltage,
VIN is Input voltage,
IOUT is output curent,
VF is diode forward voltage, VF of 0.55 V (IOUT = 3 A),
and
ηx is efficiency (%).
Since the efficiency determines from the input voltage
and output current, it shall be obtained from the efficiency
curve and substituted in percent.
The heat release setting of the freewheel diode is
required separately.
Table 12-1. Output Voltage, VOUT, vs. Output Capacitor
(30 kHz)
VOUT
(V)
1.2
1.8
3.3
5
12
15
Output Capacitor
(µF)
Electrolytic Capacitor
Ceramic Capacitor
(ESR ≈ 150 mΩ)
4.7 to 180
4.7 to 120
4.7 to 1000
4.7 to 56
4.7 to 47
4.7 to 18
100 to 820*
4.7 to 12
100 to 1200*
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Allowable Power Dissipation, PD (W)
Start-up failure.
The IC is damaged by self-heating due to decreasing
the gate voltage of internal power MOSFET.
R2
1
BS
C3
U1
SW
Ambient Temperature, TA (°C)
Figure 12-10.
3
BS pin peripheral circuit
NOTES:
● Glass-epoxy board, 30 mm × 30 mm
● Copper area, 25 mm × 25 mm
● The power dissipation is calculated at the junction temperature 125 °C.
Figure 12-9.
Allowable Power Dissipation Curve
12.2.1. Power Supply Stability
The phase characteristics of a chopper type regulator
are the synthesis of follows.
The internal phase characteristics of a regulator IC, the
output capacitor, and the load resistance.
Internal phase characteristics of a regulator IC are
generally determined by the delay time of control block
and the phase characteristics of the output error amplifier.
Therefore, the phase delay due to the delay time of the
control block rarely causes problems in actual use.
The IC has phase compensation for output error
amplifier. See Section 12.1.5 about the output voltage
setting and the output current setting for stable operation.
12.2.2. Spike Noise Reduction
This section shows how to reduce spike noises.
Extra attentions should be paid when you measure
spike noises using an oscilloscope.
The ground lead of a probe should be as short as
possible, and should be connected to root of output
capacitor. When the ground lead is long, the noises may
be measured larger than actual noises because the ground
lead becomes an antenna.
● Add a resistance to the BS pin in series.
When the resister, R2, is added between the BS pin and
SW pin as shown in Figure 12-10, the turn-on
switching speed of the internal power MOSFET
becomes slow. The spike noises is reduced according
to decreasing switching speed.
The maximum value of R2 is 22 Ω.
If R2 is set too large, the following event may be
occured.
● Add a snubber circuit.
When an RC snubber (a resistor and a capacitor) is
added to the SW pin as shown in Figure 12-11, the
spike noises are reduced because the slopes of output
waveform and the recovery current waveform of the
diode become shallow.
Note that the efficiency is decreased as the swiching
loss of the internal power MOSFET increases.
SW
3
U1
About 10
GND
4
Figure 12-11.
About 1000 pF
SW pin peripheral circuit
● Note when you add bead cores
Bead cores incruding ferrite beads must not be used in
the broken line in Figure 12-12.
When you layouts the PCB trace of the switching
regurator, the parasitic inductance of PCB trace should
be as small as possible. If bead cores are added, the the
inductance of the bead cores is added to the parasitic
inductance of PCB trace. It may causes the malfunction
or break of the IC by the unstable status including
negative potential grounding due to surge voltage.
The noise reduction method should be chosen from
above method (add the BS pin resistor or the snubber
ciecuit).
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In the area, bead cores must not be used.
VIN
R2
R1
2
7
C1
C2
C3
1
IN
BS
L1
VOUT
3
SW
EN
R3
U1
8
D1
R4
SS
GND
ISET
4
6
C6
Figure 12-12.
FB
C4
C5
5
12.3.2. Input and Output Capacitor
Input capacitors (C1 and C2) and output capacitors (C4
and C5) are placed as close the IC as possible.
Even if the rectifying capacitor of an AC/DC convertor
circuit is in input circuit, input capacitors are required
when the rectifying capacitor is not placed near the IC.
The traces of these capacitors are drawn wide (see
Figure 12-15-(a), Proper Trace)
R5
Note when you add bead cores
(a) Proper Trace
12.2.3. Reverse Bias Condition
When the IN pin voltage becomes higher than the SW
pin voltage (battery charger application, etc.), the diode
for reverse bias protection must be connected between the
IN pin and SW pin as shown in Figure 12-13.
SW
3
Figure 12-13. When the IN pin voltage becomes
higher than the SW pin voltage
12.3. Pattern Layout
12.3.3. FB Pin Setting (Output Voltage
Setting)
IFB =
12.3.1. Large Current Trace
Since large current flows through the bold line in
Figure 12-14, these PCB traces must be as wide and small
loop as possible.
VFB
R5
R2
VOUT − VFB VOUT − 0.8
=
(Ω)
IFB
0.5 × 10−3
(12)
R1
2
IN
7
C1
(11)
where, VFB is 0.8 V ± 2%.
R3 + R4 =
VIN
Trace Example of Capacitors
The FB pin detects the feedback signal to control the
output voltage, and should be placed as close the output
capacitor as possible. If the FB pin is far from the output
capacitor, the unstable operation may be occurred by the
regulation decreasing and the switching ripple increasing.
The output voltage is set by the resisters connected to
the FB pin (R3, R4 and R5). The minimum current
flowing through the FB pin, IFB, should be set about
0.5 mA. The maximum value of IFB should be set
considering about the efficiency.
The output voltage, VOUT, and the value of R3, R4 and
R5 are calculated by the following equations.
2
IN
U1
Figure 12-15.
(b) Improper Trace
C2
C3
1
BS
SW
EN
R5 =
L1
U1
R3
D1
8
R4
SS
C6
VOUT
3
GND
ISET
4
Figure 12-14.
6
FB
C4
VFB
0.8
=
≈ 1.6 (kΩ)
IFB 0.5 × 10−3
(13)
C5
5
R5
Large Current Line
VOUT = (R3 + R4) ×
VFB
+ VFB
R6
(14)
If the output voltage is set to 0.8 V that is same voltage
with VFB, R5 should be connected to operate stable.
The relationship between input voltage and output
voltage is determined by the on-time of the SW pin. The
on-time is recommended to set to more than 200 ns.
The traces connected to the FB pin and the R3, R4, R5
must not be placed in parallel with the trace connected to
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the freewheel diode, because switching noise affects to
the feedback detection voltage, and may occur unstable
operations.
Especially, the trace between FB pin and R5 must be
as short as possible.
VOUT
3
SW
L1
R3
U1
D1
IFB
R4
GND
FB
C4 C5
5
4
R5
Figure 12-16.
FB pin peripheral circuit
13. Pattern Layout Example
Ground trace must be connected as short as possible to the GND pin at single point grounding. The exposed pad on the
back side of the package is connected to the ground trace. The larger copper plane can improve the heat release capability.
(a) Front Side (Components is mounted)
Figure 13-1.
(b) Back Side (Ground pattern)
Pattern Layout Example (PCB size: 40 mm × 40 mm)
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NR117K
EN
BS
D2
R3
Vin
2
VinS
R1
7
C1
C2
C6
C3
1
IN
R7
SW
BS
L1
3
Vo
SW
EN
R8
Z1
8
SS
SS
GND
4
ISET
6
C10
R2
R4
VoS
FB
FB
C11
5
R5
C4
C5
R10
R9
D1
C7
R6
C12
C9
GND
GND
Figure 13-2.
Pattern Layout Example Circuit
Table 13-1. Bill of Materials
Symbol
C1
C2
C3
C4
C5
C6*
Ratings
Ceramic, 22 μF
Ceramic, 22 μF
Ceramic, 0.1 μF
Ceramic, 220 μF
Ceramic, 220 μF
Open
Symbol
C11
C12
D1
D2*
L1
R1
C7
Ceramic, 0.1 μF
R2
Ratings
Open*
Open*
Schottky 40 V, 3.0 A
Open
150 μH
100 kΩ
Option
Symbol
R5
R6
R7
R8*
R9
R10*
Z1
Ratings
6.8 kΩ (VOUT = 5.0 V)
1.6 kΩ
Open
Open
Short
Open
Buck converter,
NR117K
C9
Short
R3
22 Ω
C10
Open
R4
1.6 kΩ
* It is necessary to be adjusted based on actual operation in the application.
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