Off-Line PWM Controllers with Integrated Power MOSFET
STR3A100 Series
Package
General Descriptions
The STR3A100 series are power ICs for switching
power supplies, incorporating a MOSFET and a current
mode PWM controller IC.
The low standby power is accomplished by the
automatic switching between the PWM operation in
normal operation and the burst-oscillation under light
load conditions. The product achieves high
cost-performance power supply systems with few
external components.
DIP8
ns
Not to Scale
Lineup
Features
STR3A1××
STR3A1××HD
rN
Products
d
de
en
m
m
ec
o
R
BR1
ot
PC1
C1
P
N
D1
S
R52
C53
C52 R53
8
7
6
U2
5
D2
R2
U1
C2
ROCP
3
650 V
100 kHz
700 V
RDS(ON)
(max.)
POUT
POUT
(Adapter)
(Open frame)
AC85
AC85
AC230V
AC230V
~265V
~265V
STR3A151
STR3A151D
STR3A152
STR3A152D
STR3A153
STR3A153D
STR3A154
4.0 Ω 29.5 W 19.5 W
37 W
23 W
3.0 Ω
33 W
23.5 W
45 W
29 W
1.9 Ω
37 W
27.5 W
53 W
35 W
1.4 Ω
41 W
31 W
60 W
40 W
1.1 Ω
45 W
35 W
65 W
44 W
STR3A161HD
4.2 Ω
25 W
20 W
36 W
24 W
STR3A162HD
3.2 Ω
28 W
23 W
40 W
28 W
STR3A163HD 2.2 Ω 32 W 25.5 W 46 W 33.5 W
* The output power is actual continues power that is measured at
50 °C ambient. The peak output power can be 120 to 140 % of
the value stated here. Core size, ON Duty, and thermal design
affect the output power. It may be less than the value stated here.
D
S/OCP VCC GND FB/OLP
2
R56
GND
STR3A100
1
R54
R51
R55
C51
D/ST D/ST D/ST
NC D/ST
C4
VOUT
R1
C5
67 kHz
Latched
shutdown
Auto restart
Auto restart
fOSC(AVG) = 100 kHz
L51
D51
650 V
fOSC(AVG) = 67 kHz
STR3A155D
T1
VAC
67 kHz
OVP
/TSD
MOSFET ON Resistance and Output Power, POUT*
STR3A155
Typical Application Circuit
VDSS
(min.)
ew
STR3A1××D
fOSC(AVG)
D
Products
fo
Universal Design (open frame)
Current Mode Type PWM Control
No Load Power Consumption < 15mW
Auto Standby Function
Normal Operation ----------------------------- PWM Mode
Standby ---------------------------- Burst Oscillation Mode
Soft Start Function
Random Switching Function
Slope Compensation Function
Leading Edge Blanking Function
Bias Assist Function
Protections
・Two Types of Overcurrent Protection (OCP);
Pulse-by-Pulse, built-in compensation circuit to
minimize OCP point variation on AC input voltage
・Overload Protection (OLP); auto-restart
・Overvoltage Protection (OVP); latched shutdown or
auto-restart
・Thermal Shutdown (TSD); latched shutdown or
auto-restart
es
ig
Electrical Characteristics
Low Thermal Resistance Package : 44 W(max.) in
Applications
4
C3
PC1
STR3A100 - DS Rev.1.5
Nov. 20, 2014
CY
Low power AC/DC adapter
White goods
Auxiliary power supply
Other SMPS
SANKEN ELECTRIC CO.,LTD.
http://www.sanken-ele.co.jp/en/
1
STR3A100 Series
CONTENTS
General Descriptions ----------------------------------------------------------------------- 1
1. Absolute Maximum Ratings --------------------------------------------------------- 3
2. Electrical Characteristics ------------------------------------------------------------ 4
ns
3. Performance Curves ------------------------------------------------------------------ 6
3.1
Derating Curves --------------------------------------------------------------- 6
3.2
MOSFET Safe Operating Area Curves ---------------------------------- 6
3.3
Ambient Temperature versus Power Dissipation Curves ------------ 8
3.4
Transient Thermal Resistance Curves ----------------------------------- 8
es
ig
4. Functional Block Diagram ---------------------------------------------------------- 10
5. Pin Configuration Definitions ------------------------------------------------------ 10
D
6. Typical Application Circuit -------------------------------------------------------- 11
ew
7. Package Outline ----------------------------------------------------------------------- 12
rN
8. Marking Diagram -------------------------------------------------------------------- 12
ec
o
m
m
en
de
d
fo
9. Operational Description ------------------------------------------------------------- 13
9.1
Startup Operation ----------------------------------------------------------- 13
Undervoltage Lockout (UVLO) ------------------------------------------- 13
9.2
9.3
Bias Assist Function --------------------------------------------------------- 13
9.4
Soft Start Function ---------------------------------------------------------- 14
9.5
Constant Output Voltage Control ---------------------------------------- 14
9.6
Leading Edge Blanking Function ---------------------------------------- 15
Random Switching Function ---------------------------------------------- 15
9.7
9.8
Automatic Standby Mode Function-------------------------------------- 15
9.9
Overcurrent Protection (OCP) ------------------------------------------- 16
9.10 Overload Protection (OLP) ------------------------------------------------ 17
9.11 Overvoltage Protection (OVP) -------------------------------------------- 17
9.12 Thermal Shutdown (TSD) ------------------------------------------------- 18
ot
R
10. Design Notes --------------------------------------------------------------------------- 18
10.1 External Components ------------------------------------------------------- 18
10.2 PCB Trace Layout and Component Placement ----------------------- 20
N
11. Pattern Layout Example ------------------------------------------------------------ 22
12. Reference Design of Power Supply ----------------------------------------------- 23
OPERATING PRECAUTIONS -------------------------------------------------------- 25
IMPORTANT NOTES ------------------------------------------------------------------- 26
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
2
STR3A100 Series
1. Absolute Maximum Ratings
The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC.
Unless otherwise specified TA = 25 °C, 5 pin = 6 pin = 7 pin = 8 pin
Parameter
Symbol
Test Conditions
Pins
Rating
Units
3A151 / 51D
/ 61HD
3A152 / 52D
/ 62HD
3.6
4
Drain Peak Current(1)
IDPEAK
4.8
8–1
Single pulse
A
5.2
ILPEAK = 2.19 A
56
ILPEAK = 2.66 A
ILPEAK = 3.05 A
ILPEAK = 1.43 A
ns
83
fo
ILPEAK = 1.58 A
8–1
rN
EAS
d
ILPEAK = 1.88 A
VCC
FB/OLP Pin Voltage
VFB
FB/OLP Pin Sink Current
IFB
m
PD1
ec
o
MOSFET Power
Dissipation(4)
(5)
3A151 / 51D
3A152 / 52D
110
3A153 / 53D
3A154
mJ
3A155 / 55D
23.8
3A161HD
29
3A162HD
41
3A163HD
1−3
− 2 to 6
V
2−3
32
V
4−3
− 0.3 to 14
V
4−3
1.0
mA
m
VCC Pin Voltage
de
VS/OCP
en
S/OCP Pin Voltage
3A155 / 55D
72
ew
ILPEAK = 2.46 A
Avalanche Energy(2)(3)
es
ig
53
3A154
D
ILPEAK = 2.13 A
1.68
8–1
1.76
W
1.81
2–3
1.3
W
TOP
―
− 40 to 115
°C
Tstg
―
− 40 to 125
°C
Channel Temperature
Tch
―
150
°C
R
PD2
ot
3A151 / 51D / 52
/ 52D / 61HD
/ 62HD
3A153 / 53D / 54
/ 63HD
3A155 / 55D
Control Part Power
Dissipation
Operating Ambient
Temperature
Storage Temperature
N
3A163HD
3A153 / 53D
6.4
7.2
Notes
VCC×ICC
(1)
Refer to 3.2 MOSFET Safe Operating Area Curves
Refer to Figure 3-2 Avalanche Energy Derating Coefficient Curve
(3)
Single pulse, VDD = 99 V, L = 20 mH
(4)
Refer to Section 3.3 Ta-PD1 Curve
(5)
When embedding this hybrid IC onto the printed circuit board (cupper area in a 15 mm × 15 mm)
(2)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
3
STR3A100 Series
2. Electrical Characteristics
The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC.
Unless otherwise specified, TA = 25 °C, VCC = 18 V, 5 pin = 6 pin = 7 pin = 8 pin
Symbol
Test
Conditions
Pins
Min.
Typ.
Max.
Units
VCC(ON)
2−3
13.8
15.3
16.8
V
VCC(OFF)
2−3
7.3
8.1
8.9
V
2−3
−
−
2.5
mA
8−3
−
40
−
2−3
− 3.9
− 2.5
− 1.1
2−3
8.5
9.5
60
67
74
90
100
110
rN
Parameter
−
5
−
−
8
−
65
74
83
77
83
89
−
350
−
−
280
−
−
17
−
−
27
−
Notes
Operation Stop Voltage
(1)
Circuit Current in Operation
ICC(ON)
Startup Circuit Operation
Voltage
VST(ON)
Startup Current
ISTARTUP
Startup Current Biasing
Threshold Voltage
VCC(BIAS)
VCC= 12V
VCC= 13.5V
8−3
fOSC(AVG)
Switching Frequency
Modulation Deviation
8−3
DMAX
de
d
Maximum ON Duty
8−3
fo
Δf
m
tBW
m
DPC
ec
o
OCP Compensation
Coefficient
en
Protection
Leading Edge Blanking Time
OCP Compensation ON Duty
ew
Average Switching
Frequency
−
−
mA
10.5
V
D
Normal Operation
V
es
ig
Operation Start Voltage
ns
Power Supply Startup Operation
kHz
3A16×HD
kHz
%
ns
3A15×
mV/μs 3A15×D
3A16×HD
−
−
36
−
%
0.69
0.78
0.87
V
VOCP(H)
1−3
0.79
0.88
0.97
V
Maximum Feedback Current
IFB(MAX)
4−3
− 110
− 70
− 35
µA
IFB(MIN)
4−3
− 30
− 15
−7
µA
N
ot
R
1−3
VCC=32V
4−3
1.09
1.21
1.33
V
0.85
0.98
1.09
OLP Threshold Voltage
VFB(OLP)
VCC= 32V
4−3
7.3
8.1
8.9
V
OLP Operation Current
ICC(OLP)
VCC= 12V
2−3
−
230
−
µA
−
54
70
86
ms
OLP Delay Time
(1)
tOLP
3A15×
3A15×D
3A16×HD
DDPC
VFB(OFF)
3A15×
3A15×D
3A16×HD
VOCP(L)
FB/OLP pin Oscillation Stop
Threshold Voltage
3A15×
3A15×D
3A16×HD
OCP Threshold Voltage at
Zero ON Duty
OCP Threshold Voltage at
36% ON Duty
Minimum Feedback Current
3A15×
3A15×D
3A151 / 51D
/ 52 / 52D / 53
/ 53D / 61HD
/ 62HD / 63HD
3A154 / 55
/ 55D
VCC(BIAS) > VCC(OFF) always.
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
4
STR3A100 Series
Parameter
Symbol
FB/OLP Pin Clamp Voltage
OVP Threshold Voltage
Thermal Shutdown Operating
Temperature
Test
Conditions
Pins
Min.
Typ.
Max.
Units
Notes
VFB(CLAMP)
4−3
11.0
12.8
14.0
V
VCC(OVP)
2−3
27.5
29.5
31.5
V
Tj(TSD)
−
135
−
−
°C
650
−
−
700
−
−
−
−
300
−
−
4.2
−
−
−
−
−
−
−
−
2.2
−
−
1.9
3A153 / 53D
−
−
1.4
3A154
−
−
1.1
3A155 / 55D
−
−
250
ns
−
−
16
°C/W
MOSFET
IDSS
RDS(ON)
IDS = 0.4A
8−1
8–1
tf
fo
Switching Time
rN
ew
On Resistance
8–1
de
θch-C
−
−
−
−
3A16×HD
μA
3A161HD
4.0
3A151 / 51D
3.2
3A162HD
3.0
Ω
3A163HD
18
°C/W
−
−
17
3A152 / 52D
3A151 / 51D
/ 52 / 52D / 53
/ 53D / 61HD
/ 62HD / 63HD
3A154
/ 55 / 55D
θch-C is thermal resistance between channel and case. Case temperature (T C) is measured at the center of the case top
surface.
N
ot
R
(2)
ec
o
m
m
Channel to Case Thermal
Resistance(2)
en
θch-F
Channel to Frame
d
Thermal Resistance
V
3A15×
3A15×D
ns
Drain Leakage Current
8–1
es
ig
VDSS
D
Drain-to-Source Breakdown
Voltage
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
5
STR3A100 Series
3. Performance Curves
Derating Curves
100
EAS Temperature Derating Coefficient (%)
40
20
0
25
50
75
100
125
40
20
0
25
150
rN
0
60
ns
60
80
D
80
ew
Safe Operating Area
Temperature Derating Coefficient (%)
100
es
ig
3.1
Channel Temperature, Tch (°C)
75
100
125
150
Channel Temperature, Tch (°C)
fo
Figure 3-1 SOA Temperature Derating Coefficient Curve
50
MOSFET Safe Operating Area Curves
en
3.2
de
d
Figure 3-2 Avalanche Energy Derating Coefficient Curve
ec
o
m
m
When the IC is used, the safe operating area curve should be multiplied by the temperature-derating coefficient
derived from Figure 3-1.
The broken line in the safe operating area curve is the drain current curve limited by on-resistance.
Unless otherwise specified, TA = 25 °C, Single pulse
STR3A151 / 51D
STR3A152 / 52D
10
0.1ms
Drain Current, ID (A)
ot
0.1ms
1
N
Drain Current, ID (A)
R
10
1ms
0.1
1
1ms
0.1
0.01
0.01
1
10
100
Drain-to-Source Voltage (V)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
1000
1
10
100
1000
Drain-to-Source Voltage (V)
SANKEN ELECTRIC CO.,LTD.
6
STR3A100 Series
STR3A153 / 53D
STR3A154
10
10
0.1ms
1ms
0.1
0.01
1
1ms
0.1
ns
1
0.01
10
100
1000
1
Drain-to-Source Voltage (V)
STR3A155 / 55D
STR3A161HD
rN
Drain Current, ID (A)
1
d
de
0.01
10
100
1ms
0.01
1
1000
m
Drain Current, ID (A)
N
1ms
0.01
10
100
Drain-to-Source Voltage (V)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
0.1ms
0.1ms
0.1
1
1000
10
R
ot
1
100
STR3A163HD
ec
o
10
10
Drain-to-Source Voltage (V)
Drain-to-Source Voltage (V)
STR3A162HD
0.1ms
0.1
m
1
1000
1
fo
1ms
en
Drain Current, ID (A)
0.1ms
0.1
100
ew
10
10
Drain Current, ID (A)
10
Drain-to-Source Voltage (V)
D
1
es
ig
Drain Current, ID (A)
Drain Current, ID (A)
0.1ms
1000
1
1ms
0.1
0.01
1
10
100
1000
Drain-to-Source Voltage (V)
SANKEN ELECTRIC CO.,LTD.
7
STR3A100 Series
Ambient Temperature versus Power Dissipation Curves
STR3A153 / 53D / 54/ 63HD
PD1 = 1.68 W
Power Dissipation, PD1 (W)
Power Dissipation, PD1 (W)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
PD1 = 1.76 W
ns
STR3A151 / 51D / 52 / 52D / 61HD / 62HD
0
150
25
75
100
125
150
D
ew
STR3A155 / 55D
de
d
fo
rN
PD1=1.81W
0
25
50
75
en
Power Dissipation, PD1 (W)
50
Ambient Temperature, TA (°C )
Ambient Temperature, TA (°C )
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
es
ig
3.3
100
125
150
3.4
ec
o
m
m
Ambient Temperature, TA (°C )
Transient Thermal Resistance Curves
R
STR3A151 / 51D / 61HD
ot
Transient Thermal Resistance
θch-c (°C/W)
10
N
1
0.1
0.01
1µ
10µ
100µ
1m
10m
100m
Time (s)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
8
STR3A100 Series
STR3A152 / 52D / 62HD
10
1
0.1
0.01
1µ
10µ
100µ
1m
10m
STR3A153 / 53D / 63HD
D
10
rN
ew
1
0.1
0.01
1µ
10µ
100µ
fo
Transient Thermal Resistance
θch-c (°C/W)
100m
es
ig
Time (s)
ns
Transient Thermal Resistance
θch-c (°C/W)
100
1m
10m
100m
1m
10m
100m
1m
10m
100m
d
Time (s)
de
STR3A154
en
m
1
m
Transient Thermal Resistance
θch-c (°C/W)
10
ec
o
0.1
1µ
10µ
100µ
Time (s)
ot
0.001
R
0.01
N
STR3A155 / 55D
Transient Thermal Resistance
θch-c (°C/W)
10
1
0.1
0.01
1µ
10µ
100µ
Time (s)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
9
STR3A100 Series
4. Functional Block Diagram
D/ST
VCC
STARTUP
2
UVLO
REG
PWM OSC
S Q
OVP
VREG
5~8
TSD
ns
DRV
es
ig
R
D
OCP
VCC
OLP
ew
Feedback
Control
Drain Peak Current
Compensation
FB/OLP
rN
4
1
GND
3
BD_STR3A100_R1
m
en
de
d
fo
Slope
Compensation
S/OCP
LEB
VCC
2
GND
3
R
1
N
ot
S/OCP
ec
o
m
5. Pin Configuration Definitions
FB/OLP
4
Pin
Name
8
D/ST
1
S/OCP
7
D/ST
2
VCC
6
D/ST
3
GND
4
FB /OLP
5
D/ST
Descriptions
MOSFET source and overcurrent protection
(OCP) signal input
Power supply voltage input for control part and
overvoltage protection (OVP) signal input
Ground
Constant voltage control signal input and over
load protection (OLP) signal input
5
6
7
D/ST
MOSFET drain and startup current input
8
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
10
STR3A100 Series
6. Typical Application Circuit
The PCB traces D/ST pins should be as wide as possible, in order to enhance thermal dissipation.
In applications having a power supply specified such that D/ST pin has large transient surge voltages, a clamp
snubber circuit of a capacitor-resistor-diode (CRD) combination should be added on the primary winding P, or a
damper snubber circuit of a capacitor (C) or a resistor-capacitor (RC) combination should be added between the
D/ST pin and the S/OCP pin.
CRD clamp snubber
VAC
L51
D51
T1
VOUT
R1
C5
C1
P
R55
C51
D1
R52
D
S
6
7
D2
D/ST D/ST D/ST
NC D/ST
C4
C2
2
3
4
C3
de
ROCP
GND
D
d
1
R56
fo
S/OCP VCC GND FB/OLP
rN
U1
STR3A100
C（RC）
Damper snubber
R2
C53
C52 R53
U2
5
ew
8
R54
R51
es
ig
PC1
ns
BR1
CY
en
PC1
N
ot
R
ec
o
m
m
Figure 6-1 Typical application circuit
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
11
STR3A100 Series
7. Package Outline
fo
rN
ew
D
es
ig
ns
DIP8
R
8
ec
o
8. Marking Diagram
m
m
en
de
d
NOTES:
1) Dimension is in millimeters
2) Pb-free. Device composition compliant with the RoHS directive
N
ot
3A1×××
1
Part Number (3A15× / 3A15×D / 3A16×H)
YMD
Lot Number
Y = Last Digit of Year (0-9)
M = Month (1-9,O,N or D)
D =Period of days (1 to 3)
1 : 1st to 10th
2 : 11th to 20th
3 : 21st to 31st
Sanken Control Number
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
12
STR3A100 Series
9. Operational Description
t START C2 ×
All of the parameter values used in these descriptions
are typical values, unless they are specified as
minimum or maximum.
With regard to current direction, "+" indicates sink
current (toward the IC) and "–" indicates source
current (from the IC).
where,
tSTART : Startup time of IC (s)
VCC(INT) : Initial voltage on VCC pin (V)
9.2
Startup Operation
Undervoltage Lockout (UVLO)
es
ig
ns
Figure 9-2 shows the relationship of VCC pin voltage
and circuit current ICC. When VCC pin voltage decreases
to VCC(OFF) = 8.1 V, the control circuit stops operation by
Undervoltage Lockout (UVLO) circuit, and reverts to
the state before startup.
rN
ew
ICC（ON）
C1
R
VAC
N
ot
5-8
D/ST
U1
VCC
2
D2
C2
GND
VCC（OFF）
VCC（ON） VCC pin
voltage
Figure 9-2 Relationship between
VCC pin voltage and ICC
9.3
T1
P
D
3
Figure 9-1 VCC pin peripheral circuit
The startup time of IC is determined by C2 capacitor
value. The approximate startup time tSTART is calculated
as follows:
STR3A100 - DS Rev.1.5
Nov. 20, 2014
Start
(1)
R2
VD
Stop
de
m
ec
o
BR1
m
⇒10.5 (V) < VCC < 27.5 (V)
en
VCC( BIAS) (max .) VCC VCC(OVP ) (min .)
D
Circuit current, ICC
d
Figure 9-1 shows the circuit around VCC pin.
The IC incorporates the startup circuit. The circuit is
connected to D/ST pin. When D/ST pin voltage reaches
to Startup Circuit Operation Voltage VST(ON) = 40 V, the
startup circuit starts operation.
During the startup process, the constant current,
ISTARTUP = − 2.5 mA, charges C2 at VCC pin. When
VCC pin voltage increases to VCC(ON) = 15.3 V, the
control circuit starts switching operation.
During the IC operation, the voltage rectified the
auxiliary winding voltage, VD, of Figure 9-1 becomes a
power source to the VCC pin. After switching operation
begins, the startup circuit turns off automatically so that
its current consumption becomes zero.
The approximate value of auxiliary winding voltage is
about 18V, taking account of the winding turns of D
winding so that VCC pin voltage becomes Equation (1)
within the specification of input and output voltage
variation of power supply.
(2)
I STRATUP
fo
9.1
VCC( ON )－VCC( INT )
Bias Assist Function
By the Bias Assist Function, the startup failure is
prevented and the latched state is kept.
The Bias Assist Function is activated, when the VCC
voltage decreases to the Startup Current Biasing
Threshold Voltage, VCC(BIAS) = 9.5 V, in either of
following condition:
the FB pin voltage is FB/OLP Pin Oscillation Stop
Threshold Voltage, VFB(OFF) or less
or the IC is in the latched state due to activating the
protection function.
When the Bias Assist Function is activated, the VCC
pin voltage is kept almost constant voltage, VCC(BIAS) by
providing the startup current, ISTARTUP, from the startup
circuit. Thus, the VCC pin voltage is kept more than
VCC(OFF).
Since the startup failure is prevented by the Bias
Assist Function, the value of C2 connected to VCC pin
can be small. Thus, the startup time and the response
time of the OVP become shorter.
The operation of the Bias Assist Function in startup is
as follows. It is necessary to check and adjust the startup
SANKEN ELECTRIC CO.,LTD.
13
STR3A100 Series
process based on actual operation in the application, so
that poor starting conditions may be avoided.
capacitor and the turn ratio of auxiliary winding D so
that the tLIM is less than tOLP = 54 ms (min.).
Figure 9-3 shows VCC pin voltage behavior during
the startup period.
After VCC pin voltage increases to VCC(ON) = 15.3 V
at startup, the IC starts the operation. Then circuit
current increases and VCC pin voltage decreases. At the
same time, the auxiliary winding voltage VD increases in
proportion to output voltage. These are all balanced to
produce VCC pin voltage.
When VCC pin voltage is decrease to VCC(OFF) = 8.1 V
in startup operation, the IC stops switching operation
and a startup failure occurs.
When the output load is light at startup, the output
voltage may become more than the target voltage due to
the delay of feedback circuit. In this case, the FB pin
voltage is decreased by the feedback control. When the
FB pin voltage decreases to VFB(OFF) or less, the IC stops
switching operation and VCC pin voltage decreases.
When VCC pin voltage decreases to VCC(BIAS), the Bias
Assist Function is activated and the startup failure is
prevented.
VCC(OFF)
Time
ns
es
ig
Limited by OCP operation
D
tLIM < tOLP (min.)
Time
rN
ew
Figure 9-4 VCC and ID behavior during startup
9.5
IC starts operation
Target operating
voltage
Increase with rising of
output voltage
Soft start period
approximately 7 ms (fixed)
D/ST pin
current, ID
Startup success
Constant Output Voltage Control
The IC achieves the constant voltage control of the
power supply output by using the current-mode control
method, which enhances the response speed and
provides the stable operation.
The FB/OLP pin voltage is internally added the slope
compensation at the feedback control (refer to Section
4.Functional Block Diagram), and the target voltage,
VSC, is generated. The IC compares the voltage, V ROCP,
of a current detection resistor with the target voltage,
VSC, by the internal FB comparator, and controls the
peak value of VROCP so that it gets close to VSC, as
shown in Figure 9-5 and Figure 9-6.
de
d
VCC(ON)
VCC(BIAS)
Bias assist period
en
VCC(OFF)
m
Startup failure
Time
ec
o
m
Figure 9-3 VCC pin voltage during startup period
9.4
tSTART
VCC(ON)
fo
VCC pin
voltage
Startup of SMPS
VCC pin Startup of IC
voltage
Normal opertion
Soft Start Function
N
ot
R
Figure 9-4 shows the behavior of VCC pin voltage
and drain current during the startup period.
The IC activates the soft start circuitry during the
startup period. Soft start time is fixed to around 7 ms.
during the soft start period, over current threshold is
increased step-wisely (5 steps). This function reduces
the voltage and the current stress of MOSFET and
secondary side rectifier diode.
Since the Leading Edge Blanking Function (refer to
Section 9.6) is deactivated during the soft start period,
there is the case that on-time is less than the leading
edge blanking time, tBW = 350 ns.
After the soft start period, D/ST pin current, ID, is
limited by the overcurrent protection (OCP), until the
output voltage increases to the target operating voltage.
This period is given as tLIM.
In case tLIM is longer than the OLP Delay Time, tOLP,
the output power is limited by the OLP operation.
Thus, it is necessary to adjust the value of output
STR3A100 - DS Rev.1.5
Nov. 20, 2014
Light load conditions
When load conditions become lighter, the output
voltage, VOUT, increases. Thus, the feedback current
from the error amplifier on the secondary-side also
increases. The feedback current is sunk at the FB/OLP
pin, transferred through a photo-coupler, PC1, and the
FB/OLP pin voltage decreases. Thus, VSC decreases,
and the peak value of VROCP is controlled to be low,
and the peak drain current of I D decreases.
This control prevents the output voltage from
increasing.
Heavy load conditions
When load conditions become greater, the IC
performs the inverse operation to that described above.
Thus, VSC increases and the peak drain current of ID
increases.
This control prevents the output voltage from
decreasing.
SANKEN ELECTRIC CO.,LTD.
14
STR3A100 Series
In order to avoid this, the IC incorporates the Slope
Compensation Function. Because the target voltage is
added a down-slope compensation signal, which reduces
the peak drain current as the on-duty gets wider relative
to the FB/OLP pin signal to compensate V SC, the
subharmonics phenomenon is suppressed.
Even if subharmonic oscillations occur when the IC
has some excess supply being out of feedback control,
such as during startup and load shorted, this does not
affect performance of normal operation.
U1
GND FB/OLP
1
3
4
PC1
ROCP
VROCP
IFB
C3
9.6
The IC uses the peak-current-mode control method
for the constant voltage control of output.
In peak-current-mode control method, there is a case
that the power MOSFET turns off due to unexpected
response of FB comparator or overcurrent protection
circuit (OCP) to the steep surge current in turning on a
power MOSFET.
In order to prevent this response to the surge voltage
in turning-on the power MOSFET, the Leading Edge
Blanking, tBW = 350 ns (STR3A16×HD for tBW = 280
ns) is built-in. During tBW, the OCP threshold voltage
becomes about 1.7 V which is higher than the normal
OCP threshold voltage (refer to Section 9.9).
es
ig
Figure 9-5 FB/OLP pin peripheral circuit
VROCP
ew
+
rN
VSC
D
Target voltage including
Slope Compensation
-
d
Drain current,
ID
fo
Voltage on both
sides of ROCP
FB Comparator
de
9.7
m
en
Figure 9-6 Drain current, ID, and FB comparator
operation in steady operation
N
ot
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ec
o
m
In the current mode control method, when the drain
current waveform becomes trapezoidal in continuous
operating mode, even if the peak current level set by the
target voltage is constant, the on-time fluctuates based
on the initial value of the drain current.
This results in the on-time fluctuating in multiples of
the fundamental operating frequency as shown in Figure
9-7. This is called the subharmonics phenomenon.
tON1
T
Target voltage
without Slope Compensation
tON2
T
T
Figure 9-7 Drain current, ID, waveform
in subharmonic oscillation
STR3A100 - DS Rev.1.5
Nov. 20, 2014
Leading Edge Blanking Function
ns
S/OCP
Random Switching Function
The IC modulates its switching frequency randomly
by superposing the modulating frequency on fOSC(AVG) in
normal operation. This function reduces the conduction
noise compared to others without this function, and
simplifies noise filtering of the input lines of power
supply.
9.8
Automatic Standby Mode Function
Automatic standby mode is activated automatically
when the drain current, ID, reduces under light load
conditions, at which ID is less than 20 % to 25 %
(STR3A154, 55 and 55D are 15 to 20 %) of the
maximum drain current (it is in the OCP state).
The operation mode becomes burst oscillation, as
shown in Figure 9-8. Burst oscillation mode reduces
switching losses and improves power supply efficiency
because of periodic non-switching intervals.
Generally, to improve efficiency under light load
conditions, the frequency of the burst oscillation mode
becomes just a few kilohertz. Because the IC suppresses
the peak drain current well during burst oscillation mode,
audible noises can be reduced.
If the VCC pin voltage decreases to VCC(BIAS) = 9.5 V
during the transition to the burst oscillation mode, the
Bias Assist Function is activated and stabilizes the
Standby mode operation, because ISTARTUP is provided to
the VCC pin so that the VCC pin voltage does not
SANKEN ELECTRIC CO.,LTD.
15
STR3A100 Series
decrease to VCC(OFF).
However, if the Bias Assist Function is always
activated during steady-state operation including
standby mode, the power loss increases. Therefore, the
VCC pin voltage should be more than VCC(BIAS), for
example, by adjusting the turns ratio of the auxiliary
winding and secondary winding and/or reducing the
value of R2 in Figure 10-2 (refer to Section 10.1).
C（RC）
Damper snubber
T1
D51
C1
5~8
D/ST
U1
Output current,
IOUT
C（RC）
Damper snubber
S/OCP
1
Burst oscillation
ns
ROCP
Figure 9-10 Damper snubber
es
ig
Below several kHz
Drain current,
ID
Normal
operation
D
Standby
operation
< Input Compensation Function >
ICs with PWM control usually have some propagation
delay time. The steeper the slope of the actual drain
current at a high AC input voltage is, the larger the
detection voltage of actual drain peak current is,
compared to VOCP. Thus, the peak current has some
variation depending on the AC input voltage in OCP
state.
In order to reduce the variation of peak current in
OCP state, the IC incorporates a built-in Input
Compensation Function.
The Input Compensation Function is the function of
correction of OCP threshold voltage depending with AC
input voltage, as shown in Figure 9-11.
When AC input voltage is low (ON Duty is broad),
the OCP threshold voltage is controlled to become high.
The difference of peak drain current become small
compared with the case where the AC input voltage is
high (ON Duty is narrow).
The compensation signal depends on ON Duty. The
relation between the ON Duty and the OCP threshold
voltage after compensation VOCP' is expressed as
Equation (3). When ON Duty is broader than 36 %, the
VOCP' becomes a constant value VOCP(H) = 0.88 V
ew
Normal
operation
rN
Figure 9-8 Auto Standby mode timing
Overcurrent Protection (OCP)
tBW
About 1.7V
VOCP’
1.0
OCP Threshold Voltage after
compensation, VOCP'
N
ot
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m
en
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d
Overcurrent Protection (OCP) detects each drain peak
current level of a power MOSFET on pulse-by-pulse
basis, and limits the output power when the current level
reaches to OCP threshold voltage.
During Leading Edge Blanking Time, the OCP
threshold voltage becomes about 1.7 V which is higher
than the normal OCP threshold voltage as shown in
Figure 9-9. Changing to this threshold voltage prevents
the IC from responding to the surge voltage in
turning-on the power MOSFET. This function operates
as protection at the condition such as output windings
shorted or unusual withstand voltage of secondary-side
rectifier diodes.
When power MOSFET turns on, the surge voltage
width of S/OCP pin should be less than tBW, as shown in
Figure 9-9. In order to prevent surge voltage, pay extra
attention to ROCP trace layout (refer to Section 10.2). In
addition, if a C (RC) damper snubber of Figure 9-10 is
used, reduce the capacitor value of damper snubber.
fo
9.9
C51
VOCP(H)
VOCP(L)
DDPC=36%
0.5
0
50
DMAX=74%
100
ON Duty (%)
Surge pulse voltage width at turning on
Figure 9-9 S/OCP pin voltage
STR3A100 - DS Rev.1.5
Nov. 20, 2014
Figure 9-11 Relationship between ON Duty and Drain
Current Limit after compensation
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16
STR3A100 Series
Non-switching interval
VCC pin voltage
VCC(ON)
VOCP ' VOCP ( L) DPC ONTime
VOCP ( L ) DPC
VCC(OFF)
ONDuty
f OSC ( AVG )
(3)
FB/OLP pin voltage
tOLP
VFB(OLP)
where,
VOCP(L): OCP Threshold Voltage at Zero ON Duty
DPC: OCP Compensation Coefficient
ONTime: On-time of power MOSFET
ONDuty: On duty of power MOSFET
fOSC(AVG): Average PWM Switching Frequency
tOLP
ns
Drain current,
ID
es
ig
Figure 9-13 OLP operational waveforms
9.10 Overload Protection (OLP)
D
9.11 Overvoltage Protection (OVP)
fo
rN
ew
When a voltage between VCC pin and GND terminal
increases to VCC(OVP) = 29.5 V or more, Overvoltage
Protection (OVP) is activated. The IC has two operation
types of OVP. One is latched shutdown. The other is
auto restart.
In case the VCC pin voltage is provided by using
auxiliary winding of transformer, the overvoltage
conditions such as output voltage detection circuit open
can be detected because the VCC pin voltage is
proportional to output voltage. The approximate value of
output voltage VOUT(OVP) in OVP condition is calculated
by using Equation (4).
ot
R
ec
o
m
m
en
de
d
Figure 9-12 shows the FB/OLP pin peripheral circuit,
and Figure 9-13 shows each waveform for Overload
Protection (OLP) operation.
When the peak drain current of ID is limited by OCP
operation, the output voltage, VOUT, decreases and the
feedback current from the secondary photo-coupler
becomes zero. Thus, the feedback current, IFB, charges
C3 connected to the FB/OLP pin and the FB/OLP pin
voltage increases. When the FB/OLP pin voltage
increases to VFB(OLP) = 8.1 V or more for the OLP delay
time, tOLP = 70 ms or more, the OLP is activated, the IC
stops switching operation.
During OLP operation, Bias Assist Function is
disabled. Thus, VCC pin voltage decreases to VCC(OFF),
the control circuit stops operation. After that, the IC
reverts to the initial state by UVLO circuit, and the IC
starts operation when VCC pin voltage increases to
VCC(ON) by startup current. Thus, the intermittent
operation by UVLO is repeated in OLP state.
This intermittent operation reduces the stress of parts
such as power MOSFET and secondary side rectifier
diode. In addition, this operation reduces power
consumption because the switching period in this
intermittent operation is short compared with oscillation
stop period. When the abnormal condition is removed,
the IC returns to normal operation automatically.
N
U1
GND
FB/OLP
4
3
VCC
2
PC1
C3
VOUT ( NORMAL )
VCC( NORMAL )
29.5 (V)
(4)
where,
VOUT(NORMAL): Output voltage in normal operation
VCC(NORMAL): VCC pin voltage in normal operation
Latched Shutdown type: STR3A1××
When the OVP is activated, the IC stops switching
operation at the latched state. In order to keep the
latched state, when VCC pin voltage decreases to
VCC(BIAS), the Bias Assist Function is activated and
VCC pin voltage is kept to over the VCC(OFF).
Releasing the latched state is done by turning off the
input voltage and by dropping the VCC pin voltage
below VCC(OFF).
D2 R2
C2
D
Figure 9-12 FB/OLP pin peripheral circuit
STR3A100 - DS Rev.1.5
Nov. 20, 2014
VOUT(OVP)
Auto Restart Type: STR3A1××D
When the OVP is activated, the IC stops switching
operation. During OVP operation, the Bias Assist
Function is disabled, the intermittent operation by
UVLO is repeated (refer to Section 9.10). When the
fault condition is removed, the IC returns to normal
operation automatically (refer to Figure 9-14).
SANKEN ELECTRIC CO.,LTD.
17
STR3A100 Series
S/OCP Pin Peripheral Circuit
In Figure 10-1, ROCP is the resistor for the current
detection. A high frequency switching current flows
to ROCP, and may cause poor operation if a high
inductance resistor is used. Choose a low inductance
and high surge-tolerant type.
VCC pin voltage
VCC(OVP)
VCC(ON)
CRD clamp snubber
VCC(OFF)
BR1
T1
VAC
Drain current,
ID
C5
C1
R1
P
8
C4
7
6
D2
5
U1
C（RC）
Damper snubber
9.12 Thermal Shutdown (TSD)
R2
D/ST D/ST D/ST
NC D/ST
es
ig
Figure 9-14 OVP operational waveforms
ns
D1
STR3A100
C2
D
D
S/OCP VCC GND FB/OLP
1
2
4
C3
PC1
rN
ROCP
3
Figure 10-1 The IC peripheral circuit
fo
VCC Pin Peripheral Circuit
The value of C2 in Figure 10-1 is generally
recommended to be 10 µF to 47 μF (refer to Section
9.1 Startup Operation, because the startup time is
determined by the value of C2)
In actual power supply circuits, there are cases in
which the VCC pin voltage fluctuates in proportion to
the output current, IOUT (see Figure 10-2), and the
Overvoltage Protection (OVP) on the VCC pin may
be activated. This happens because C2 is charged to a
peak voltage on the auxiliary winding D, which is
caused by the transient surge voltage coupled from the
primary winding when the power MOSFET turns off.
For alleviating C2 peak charging, it is effective to add
some value R2, of several tenths of ohms to several
ohms, in series with D2 (see Figure 10-1). The
optimal value of R2 should be determined using a
transformer matching what will be used in the actual
application, because the variation of the auxiliary
winding voltage is affected by the transformer
structural design.
en
de
d
Latched Shutdown type: STR3A1××
When the TSD is activated, the IC stops switching
operation at the latched state. In order to keep the
latched state, when VCC pin voltage decreases to
VCC(BIAS), the Bias Assist Function is activated and
VCC pin voltage is kept to over the VCC(OFF).
Releasing the latched state is done by turning off the
input voltage and by dropping the VCC pin voltage
below VCC(OFF).
ew
When the temperature of control circuit increases to
Tj(TSD) = 135 °C (min.) or more, Thermal Shutdown
(TSD) is activated. The IC has two operation types of
TSD. One is latched shutdown, the other is auto restart.
N
ot
R
ec
o
m
m
Auto Restart Type: STR3A1××D
When the TSD is activated, the IC stops switching
operation. During TSD operation, the Bias Assist
Function is disabled, the intermittent operation by
UVLO is repeated (refer to Section 9.10). When the
fault condition is removed and the temperature
decreases to less than Tj(TSD), the IC returns to normal
operation automatically.
10. Design Notes
10.1 External Components
VCC pin voltage
Without R2
Take care to use properly rated, including derating as
necessary and proper type of components.
Input and Output Electrolytic Capacitor
Apply proper derating to ripple current, voltage, and
temperature rise. Use of high ripple current and low
impedance types, designed for switch mode power
supplies, is recommended.
With R2
Output current, IOUT
Figure 10-2 Variation of VCC pin voltage and power
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
18
STR3A100 Series
If measures to further reduce temperature are still
necessary, the following should be considered to
increase the total surface area of the wiring:
▫ Increase the number of wires in parallel.
▫ Use litz wires.
▫ Thicken the wire gauge.
Snubber Circuit
In case the serge voltage of VDS is large, the circuit
should be added as follows (see Figure 10-1);
・ A clamp snubber circuit of a capacitor-resistordiode (CRD) combination should be added on the
primary winding P.
・ A damper snubber circuit of a capacitor (C) or a
resistor-capacitor (RC) combination should be
added between the D/ST pin and the S/OCP pin.
In case the damper snubber circuit is added, this
components should be connected near D/ST pin
and S/OCP pin.
In the following cases, the surge of VCC pin
voltage becomes high.
▫ The surge voltage of primary main winding, P, is
high (low output voltage and high output current
power supply designs)
▫ The winding structure of auxiliary winding, D, is
susceptible to the noise of winding P.
es
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fo
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ew
D
When the surge voltage of winding D is high, the
VCC pin voltage increases and the Overvoltage
Protection (OVP) may be activated. In transformer
design, the following should be considered;
▫ The coupling of the winding P and the secondary
output winding S should be maximized to reduce the
leakage inductance.
▫ The coupling of the winding D and the winding S
should be maximized.
▫ The coupling of the winding D and the winding P
should be minimized.
de
d
Phase Compensation
Figure 10-3 shows the secondary side detection circuit
with the standard shunt regulator IC (U51).
C52 and R53 are for phase compensation. The value
of C52 and R53 are recommended to be around
0.047μF to 0.47μF and 4.7 kΩ to 470 kΩ, respectively.
They should be selected based on actual operation in
the application.
ns
FB/OLP Pin Peripheral Circuit
Figure 10-1 performs high frequency noise rejection
and phase compensation, and should be connected
close to these pins. The value of C3 is recommended
to be about 2200 pF to 0.01 µF, and should be
selected based on actual operation in the application.
L51
VOUT
m
Figure 10-4 shows the winding structural examples
of two outputs.
m
PC1
R54
R51
en
D51
R55
C51
ec
o
R52
S
Margin tape
C53
Bobbin
T1
In the case of multi-output power supply, the
coupling of the secondary-side stabilized output
winding, S1, and the others (S2, S3…) should be
maximized to improve the line-regulation of those
outputs.
R
C52 R53
Margin tape
R56
Winding structural example (a)
GND
N
ot
U51
Transformer
Apply proper design margin to core temperature rise
by core loss and copper loss.
Because the switching currents contain high
frequency currents, the skin effect may become a
consideration.
Choose a suitable wire gauge in consideration of the
RMS current and a current density of 4 to 6 A/mm2.
Bobbin
Margin tape
Figure 10-3 Peripheral circuit of secondary side shunt
regulator (U51)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
P1 S1 P2 S2 D
P1 S1 D S2 S1 P2
Margin tape
Winding structural example (b)
Figure 10-4 Winding structural examples
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19
STR3A100 Series
ground of the main trace and the IC ground should
be at a single point ground (point A in Figure 10-5)
which is close to the base of ROCP.
Winding structural example (a):
S1 is sandwiched between P1 and P2 to
maximize the coupling of them for surge
reduction of P1 and P2.
D is placed far from P1 and P2 to minimize the
coupling to the primary for the surge reduction of
D.
(5) FB/OLP Trace Layout
The components connected to FB/OLP pin should be
as close to FB/OLP pin as possible. The trace
between the components and FB/OLP pin should be
as short as possible.
Winding structural example (b)
P1 and P2 are placed close to S1 to maximize the
coupling of S1 for surge reduction of P1 and P2.
D and S2 are sandwiched by S1 to maximize the
coupling of D and S1, and that of S1 and S2.
This structure reduces the surge of D, and
improves the line-regulation of outputs.
es
ig
ns
(6) Secondary Rectifier Smoothing Circuit Trace
Layout:
This is the trace of the rectifier smoothing loop,
carrying the switching current, and thus it should be
as wide trace and small loop as possible. If this trace
is thin and long, inductance resulting from the loop
may increase surge voltage at turning off the power
MOSFET. Proper rectifier smoothing trace layout
helps to increase margin against the power MOSFET
breakdown voltage, and reduces stress on the clamp
snubber circuit and losses in it.
ew
fo
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(7) Thermal Considerations
Because the power MOSFET has a positive thermal
coefficient of RDS(ON), consider it in thermal design.
Since the copper area under the IC and the D/ST pin
trace act as a heatsink, its traces should be as wide as
possible.
de
d
Since the PCB circuit trace design and the component
layout significantly affects operation, EMI noise, and
power dissipation, the high frequency PCB trace should
be low impedance with small loop and wide trace.
In addition, the ground traces affect radiated EMI
noise, and wide, short traces should be taken into
account.
Figure 10-5 shows the circuit design example.
D
10.2 PCB Trace Layout and Component
Placement
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en
(1) Main Circuit Trace Layout:
This is the main trace containing switching currents,
and thus it should be as wide trace and small loop as
possible.
If C1 and the IC are distant from each other, placing
a capacitor such as film capacitor (about 0.1 μF and
with proper voltage rating) close to the transformer
or the IC is recommended to reduce impedance of
the high frequency current loop.
N
ot
R
(2) Control Ground Trace Layout
Since the operation of IC may be affected from the
large current of the main trace that flows in control
ground trace, the control ground trace should be
separated from main trace and connected at a single
point grounding of point A in Figure 10-5 as close to
the ROCP pin as possible.
(3) VCC Trace Layout:
This is the trace for supplying power to the IC, and
thus it should be as small loop as possible. If C2 and
the IC are distant from each other, placing a
capacitor such as film capacitor Cf (about 0.1 μF to
1.0 μF) close to the VCC pin and the GND pin is
recommended.
(4) ROCP Trace Layout
ROCP should be placed as close as possible to the
S/OCP pin. The connection between the power
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
20
STR3A100 Series
(1) Main trace should be wide
trace and small loop
(6) Main trace of secondary side should
be wide trace and small loop
D51
T1
R1
C5
C1
P
(7)Trace of D/ST pin should beDST
wide for heat release
D/ST D/ST
C4
6
ns
7
S
5
D2
NC
D/ST
D/ST
es
ig
8
C51
D1
R2
STR3A100
C2
1
2
3
ew
S/OCP VCC GND FB/OLP
D
D
U1
4
ROCP
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(3) Loop of the power
supply should be small
fo
PC1
(5)The components connected to
FB/OLP pin should be as close
to FB/OLP pin as possible
d
C3
de
A
(2) Control GND trace should be connected at a
single point as close to the ROCP as possible
m
en
(4)ROCP Should be as close to S/OCP pin as
possible.
CY
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ot
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o
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Figure 10-5 Peripheral circuit example around the IC
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
21
STR3A100 Series
11. Pattern Layout Example
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ig
ns
The following show the PCB pattern layout example and the schematic of circuit using STR3A100 series. Only the
parts in the schematic are used. Other parts in PCB are leaved open.
F1
L1
C10
C2
C1
en
1
de
d
fo
Figure 11-1 PCB circuit trace layout example
D1
D2 TH1
D4
D3
m
R5
C11
3
L51
T1
CN51
D51
VOUT1
C4
R1
R54
R51
C56 R62
C3
R
ec
o
m
J1
8
7
6
D/ST
D/ST
D/ST
NC
ot
PC1
C51
R52
R53
U51
R55
C53
R57
S1
D5
C52
JW52
R56
5
GND
D/ST
JW51
U1
C8
N
P1
R4
R60
JW53
STR3A100
D6
S/OCP
VCC
1
2
D52
R2
R58
R59
L52
GND FB/OLP
3
OUT2
4
C5
D
C57 R63
C54
C55
R61
C7
R3
GND
C6
PC1
C9
CN52
Figure 11-2 Circuit schematic for PCB circuit trace layout
The above circuit symbols correspond to these of Figure 11-1.
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
22
STR3A100 Series
12. Reference Design of Power Supply
As an example, the following show the power supply specification, the circuit schematic, the bill of materials, and
the transformer specification.
Power supply specification
IC
Input voltage
Maximum output power
Output 1
Output 2
STR3A153
AC85V to AC265V
34.8 W (40.4 W peak)
8 V / 0.5 A
14 V / 2.2 A (2.6 A peak)
ns
Circuit schematic
Refer to Figure 11-2
Bill of materials
Ratings(1)
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Symbol
Part type
Recommended
Sanken Parts
Fuse
AC 250 V, 3 A
L51
Inductor
L1
(2)
CM inductor
3.3 mH
L52
Inductor
TH1
(2)
NTC thermistor
Short
D51
Schottky
90 V, 1.5 A
EK19
D1
General
600 V, 1 A
EM01A
D52
Schottky
150V, 10A
FMEN-210B
D2
General
600 V, 1 A
EM01A
C51
(2)
Electrolytic
680 μF, 25 V
D3
General
600 V, 1 A
EM01A
C52
(2)
Ceramic
0.47 μF, 50 V
C53
(2)
Electrolytic
680 μF, 25 V
Electrolytic
470 μF, 16 V
C55
(2)
Electrolytic
Open
C56
(2)
Ceramic
Open
C57
(2)
Ceramic
Open
General
Open
General
1.5 kΩ
General
100 kΩ
General
600 V, 1 A
EM01A
D5
General
800 V, 1.2 A
SARS01
Fast recovery
200 V, 1 A
AL01Z
Short
D
Short
Film, X2
0.1 μF, 275 V
C2
(2)
Electrolytic
Open
C3
Electrolytic
150 μF, 400 V
R51
C4
Ceramic
1000 pF, 2 kV
R52
C5
Electrolytic
22 μF, 50 V
R53
C6
(2)
Ceramic
0.01 μF
R54
General, 1%
Open
C7
(2)
Ceramic
Open
R55
General, 1%
Open
C8
(2)
Ceramic
15 pF / 2 kV
R56
General, 1%
10 kΩ
General
Open
General
1 kΩ
General
6.8 kΩ
General, 1%
39 kΩ
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Ceramic, Y1
2200 pF, 250 V
R57
C10
(2)
Ceramic
Open
R58
C11
(2)
Ceramic
Open
R59
R1
(3)
Metal oxide
330 kΩ, 1 W
R60
R
C9
d
C1
(2)
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D6
C54
fo
D4
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F1
Recommended
Sanken Parts
Ratings(1)
Part type
ew
Symbol
(2)
(2)
General
10 Ω
R61
General
Open
R3
(2)
General
0.47 Ω, 1/2 W
R62
(2)
General
Open
R4
(2)
General
47 Ω, 1 W
R63
(2)
General
Open
R5
(3)
N
ot
R2
(2)
Metal oxide
Open
JW51
Short
PC1
Photo-coupler
PC123 or equiv
JW52
Short
U1
IC
－
JW53
Transformer
See
the specification
Short
VREF = 2.5 V
T1
STR3A153
U51
Shunt regulator
TL431 or equiv
(1)
Unless otherwise specified, the voltage rating of capacitor is 50 V or less and the power rating of resistor is 1/8 W or less.
It is necessary to be adjusted based on actual operation in the application.
(3)
Resistors applied high DC voltage and of high resistance are recommended to select resistors designed against electromigration or use
combinations of resistors in series for that to reduce each applied voltage, according to the requirement of the application.
(2)
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
23
STR3A100 Series
Transformer specification
▫ Primary inductance, LP
▫ Core size
▫ Al-value
▫ Winding specification
：518 μH
：EER-28
：245 nH/N2 (Center gap of about 0.56 mm)
Primary winding
P1
18
φ 0.23 × 2
Primary winding
P2
28
φ 0.30
D
S1-1
S1-2
S2-1
S2-2
12
6
6
4
4
φ 0.30 × 2
φ 0.4 × 2
φ 0.4 × 2
φ 0.4 × 2
φ 0.4 × 2
D
Auxiliary winding
Output 1 winding
Output 1 winding
Output 2 winding
Output 2 winding
4mm
2mm
VDC
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P2
Drain
d
VCC
D
de
Bobbin
Core
S1-1
8V
S1-2
fo
P1
Pin side
D
S2-1 S1-1
P2
Margin tape
Margin tape
P1
S2-2 S1-2
Construction
Single-layer,
solenoid winding
Single-layer,
solenoid winding
Solenoid winding
Solenoid winding
Solenoid winding
Solenoid winding
Solenoid winding
es
ig
Number of turns (T)
ns
Wire diameter (mm)
Symbol
ew
Winding
14V
S2-1
S2-2
GND
en
GND
●: Start at this pin
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ot
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ec
o
m
m
Cross-section view
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
24
STR3A100 Series
OPERATING PRECAUTIONS
ns
In the case that you use Sanken products or design your products by using Sanken products, the reliability largely
depends on the degree of derating to be made to the rated values. Derating may be interpreted as a case that an operation
range is set by derating the load from each rated value or surge voltage or noise is considered for derating in order to
assure or improve the reliability. In general, derating factors include electric stresses such as electric voltage, electric
current, electric power etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused
due to self-heating of semiconductor products. For these stresses, instantaneous values, maximum values and minimum
values must be taken into consideration. In addition, it should be noted that since power devices or IC’s including power
devices have large self-heating value, the degree of derating of junction temperature affects the reliability significantly.
es
ig
Because reliability can be affected adversely by improper storage environments and handling methods, please
observe the following cautions.
ew
D
Cautions for Storage
Ensure that storage conditions comply with the standard temperature (5 to 35°C) and the standard relative humidity
(around 40 to 75%); avoid storage locations that experience extreme changes in temperature or humidity.
Avoid locations where dust or harmful gases are present and avoid direct sunlight.
Reinspect for rust on leads and solderability of the products that have been stored for a long time.
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Cautions for Testing and Handling
When tests are carried out during inspection testing and other standard test periods, protect the products from power
surges from the testing device, shorts between the product pins, and wrong connections. Ensure all test parameters are
within the ratings specified by Sanken for the products.
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Remarks About Using Thermal Silicone Grease
When thermal silicone grease is used, it shall be applied evenly and thinly. If more silicone grease than required is
applied, it may produce excess stress.
The thermal silicone grease that has been stored for a long period of time may cause cracks of the greases, and it
cause low radiation performance. In addition, the old grease may cause cracks in the resin mold when screwing the
products to a heatsink.
Fully consider preventing foreign materials from entering into the thermal silicone grease. When foreign material
is immixed, radiation performance may be degraded or an insulation failure may occur due to a damaged insulating
plate.
The thermal silicone greases that are recommended for the resin molded semiconductor should be used.
Our recommended thermal silicone grease is the following, and equivalent of these.
Type
Suppliers
G746
Shin-Etsu Chemical Co., Ltd.
YG6260 Momentive Performance Materials Japan LLC
SC102
Dow Corning Toray Co., Ltd.
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ot
Soldering
When soldering the products, please be sure to minimize the working time, within the following limits:
• 260 ± 5 °C
10 ± 1 s (Flow, 2 times)
• 380 ± 10 °C 3.5 ± 0.5 s (Soldering iron, 1 time)
Soldering should be at a distance of at least 1.5 mm from the body of the products.
Electrostatic Discharge
When handling the products, the operator must be grounded. Grounded wrist straps worn should have at least 1MΩ
of resistance from the operator to ground to prevent shock hazard, and it should be placed near the operator.
Workbenches where the products are handled should be grounded and be provided with conductive table and floor
mats.
When using measuring equipment such as a curve tracer, the equipment should be grounded.
When soldering the products, the head of soldering irons or the solder bath must be grounded in order to prevent
leak voltages generated by them from being applied to the products.
The products should always be stored and transported in Sanken shipping containers or conductive containers, or
be wrapped in aluminum foil.
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
25
STR3A100 Series
IMPORTANT NOTES
The contents in this document are subject to changes, for improvement and other purposes, without notice. Make
sure that this is the latest revision of the document before use.
Application examples, operation examples and recommended examples described in this document are quoted for
the sole purpose of reference for the use of the products herein and Sanken can assume no responsibility for any
infringement of industrial property rights, intellectual property rights, life, body, property or any other rights of
Sanken or any third party which may result from its use.
ns
Unless otherwise agreed in writing by Sanken, Sanken makes no warranties of any kind, whether express or
implied, as to the products, including product merchantability, and fitness for a particular purpose and special
environment, and the information, including its accuracy, usefulness, and reliability, included in this document.
D
es
ig
Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and
defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at
their own risk, preventative measures including safety design of the equipment or systems against any possible
injury, death, fires or damages to the society due to device failure or malfunction.
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Sanken products listed in this document are designed and intended for the use as components in general purpose
electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring
equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required (transportation
equipment and its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various
safety devices, etc.), and whenever long life expectancy is required even in general purpose electronic equipment
or apparatus, please contact your nearest Sanken sales representative to discuss, prior to the use of the products
herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely high
reliability is required (aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly
prohibited.
en
When using the products specified herein by either (i) combining other products or materials therewith or (ii)
physically, chemically or otherwise processing or treating the products, please duly consider all possible risks that
may result from all such uses in advance and proceed therewith at your own responsibility.
m
Anti radioactive ray design is not considered for the products listed herein.
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o
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Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation out of
Sanken’s distribution network.
N
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The contents in this document must not be transcribed or copied without Sanken’s written consent.
STR3A100 - DS Rev.1.5
Nov. 20, 2014
SANKEN ELECTRIC CO.,LTD.
26
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