LB1921

Ordering number : EN5439 Monolithic Digital IC LB1921 Three-Phase Brushless Motor Driver for OA Applications Overview The LB1921 is a single-chip motor driver circuit that provides direct PWM drive output appropriate for driving the power brushless motors used in office automation equipment. The LB1921 also provides a variety of peripheral functions, including speed control and FG amplifier circuits, on chip. Package Dimensions unit: mm 3147A-DIP28HS [LB1921] Applications • Paper feed and drum motor drivers in FAX and PPC units Functions and Features • The LB1921 is an improved output current version of the LB1824. • Three-phase bipolar brushless motor driver • Digital speed control circuit • Thermal shutdown circuit • Start/stop pin • Lock detector output • Crystal oscillator and divider circuits • FG and error amplifiers • Power supply current limiter SANYO: DIP28HS SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 53096HA (OT) No. 5439-1/10 LB1921 Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage 1 Maximum supply voltage 2 Output current Allowable power dissipation 1 Allowable power dissipation 2 Operating temperature Storage temperature Symbol VCC max VM max IO max Pd max1 Pd max2 Topr Tstg T ≤ 100 ms Independent IC With an arbitrarily large heat sink Conditions Ratings 30 30 3.5 3 20 –20 to +80 –55 to +150 Unit V V A W W °C °C Allowable Operating Ranges at Ta = 25°C Parameter Power supply voltage range 1 Power supply voltage range 2 FG Schmitt output applied voltage Fixed voltage output current 1 Fixed voltage output current 2 Fixed voltage output current 3 FG Schmitt output current Lock detector output current Symbol VCC VM VFGS IO1 IO2 IO3 IFGS ILD 7-V output 5-V output 4-V output Conditions Ratings 9.5 to 28 9 to 28 0 to +8 0 to –20 0 to –20 0 to –15 0 to +5 0 to +20 Unit V V V mA mA mA mA mA Electrical Characteristics at Ta = 25°C, VCC = VM = 24 V Parameter Current drain 1 Current drain 2 Output saturation voltage 1 Output saturation voltage 2 Output leakage current [7-V Fixed Voltage Output] Output voltage Voltage variation Load variation [5-V Fixed Voltage Output] Output voltage Voltage variation Load variation [4-V Fixed Voltage Output] Output voltage Voltage variation Load variation [Hall Amplifier] Input bias current Common mode input voltage range Hall input sensitivity Hysteresis Input voltage low → high Input voltage high → low [Oscillator] Output high-level voltage Output low-level voltage Oscillator frequency Amplitude VOH (CR) VOL (CR) f(CR) V(CR) R = 56 kΩ, C = 1000 pF 2.8 0.8 3.1 1.1 15 2.0 3.4 1.4 V V kHz Vp-p ∆VIN VSLH VSHL IHB VICM –4 1.5 60 8 14 7 –7 24 –1 5.1 µA V mVp-p mV mV mV VFG ∆VFG1 ∆VFG2 IO = –5 mA VCC = 9.5 to 28 V IO = –5 to –15 mA 3.65 4.0 40 110 4.35 200 200 V mV mV VX ∆VX1 ∆VX2 IO = –5 mA VCC = 9.5 to 28 V IO = –5 to –20 mA 4.45 4.80 50 5 5.15 200 200 V mV mV VH ∆VH1 ∆VH2 IO = –10 mA VCC = 9.5 to 28 V IO = –5 to –20 mA 6.65 7.0 50 40 7.35 200 200 V mV mV Symbol ICC1 ICC2 VO (sat)1 VO (sat)2 IO leak Stop mode IO = 1 A IO = 2 A Conditions Ratings min typ 34 8 2.0 2.7 max 50 11 3.0 4.2 100 Unit mA mA V V µA Continued on next page. No. 5439-2/10 LB1921 Continued from preceding page. Parameter [Current Limiter Operation] Limiter [Thermal Shutdown Operation] Thermal shutdown operating temperature Hysteresis [FG Amplifier] Input offset voltage Input bias current Output high-level voltage Output low-level voltage FG input sensitivity Schmitt width at next stage Operating frequency range Open-loop gain [FGS Output] Output saturation voltage Output leakage current [Speed Discriminator] Output high-level voltage Output low-level voltage [PLL Output] Output high-level voltage Output low-level voltage [Counts] [Lock Detector] Output low-level voltage Lock range [Integrator] Input bias current Output high-level voltage Output low-level voltage Open-loop gain Gain-bandwidth product Reference voltage [Crystal Oscillator] Operating frequency range [Start/Stop Pin] Input high-level voltage Input low-level voltage Pull-down resistor [Reversing Pin] Input high-level voltage Input low-level voltage Hysteresis Pull-down resistor VIH (F/R) VIL (F/R) ∆VIN RD (F/R) 30 0.5 50 70 4.0 1.5 V V V kΩ VIH (S/S) VIL (S/S) RD (S/S) 30 50 4.0 1.5 70 V V kΩ fOSC 1 10 MHz –5% IB (INT) VOH (INT) VOL (INT) 60 1.6 VX/2 +5% –0.4 3.7 4.3 0.8 1.2 +0.4 µA V V dB MHz V VOL (LD) ILD = 10 mA 0.15 6.25 0.5 V % VOH (P) VOL (P) 3.2 1.2 3.5 1.5 512 3.8 1.8 V V VOH (D) IOL (D) 4.0 4.3 0.8 1.1 V V VO (FGS) IL (FGS) IO (FGS )= 2 mA VO = 5 V 0.1 0.5 10 V µA f(FG) = 2 kHz 45 51 VIO (FG) IB (FG) VOH (FG) VOL (FG) IFG = –2 mA IFG = 2 mA Gain: 100× 3 100 180 250 2 –10 –1 5.5 6 1 1.5 +10 +1 mV µA V V mV mV kHz dB TSD ∆TSD Design target value 150 180 50 °C °C VCC-VM 0.4 0.5 0.6 V Symbol Conditions Ratings min typ max Unit No. 5439-3/10 LB1921 Pin Assignment Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Symbol 5V 7V VCC FGIN+ FGIN– FGOUT CR OUT1 OUT2 OUT3 GND2 F/R 5-V power supply 7-V power supply Power supply for all blocks other than the output block FG pulse input (4-V power supply) FG pulse input FG amplifier output PWM oscillator frequency setting Output 1 Output 2 Output 3 Output block ground Forward/reverse control Low: forward, high: reverse Start/stop control Low: start, high: stop Used both as the power supply for the output block and as output current detection. The output current can be converted to a voltage and detected by inserting the resistor Rf between this pin and VCC. Hall input for OUT1 Hall input for OUT2 Hall input for OUT3 Crystal oscillator connection. Connect a crystal oscillator element to this pin. Ground for all blocks other than the output block Lock detector This pin goes low when the motor speed is within the lock range (±6.25%). Speed discriminator output Over speed → high Integrator input Integrator output (speed control) PLL output FG amplifier output (after the Schmitt trigger circuit) Function 13 S/S 14 20, 19 18, 17 16, 15 21 22 23 VM IN1+, IN1– IN2+, IN2– IN3+, IN3– Xtal GND1 LD 24 25 26 27 28 DOUT INTIN INTOUT POUT FGSOUT No. 5439-4/10 LB1921 Truth Table Source → Sink 1 2 3 4 5 6 OUT3 → OUT2 OUT3 → OUT1 OUT2 → OUT1 OUT2 → OUT3 OUT1 → OUT3 OUT1 → OUT2 F/R = low IN1 H H H L L L IN2 H L L L H H IN3 L L H H H L IN1 L L L H H H R/R = high IN2 L H H H L L IN3 H H L L L H Note: Input high refers to the state where IN+ > IN–. The formula below gives the relationship between the oscillator frequency (fOSC) and the FG frequency (fFC). fFC (servo) = fOSC/(ECL divisor (16) × number of counts) = fOSC/8192 Crystal Oscillator External Circuit External Circuit Constants (reference values) Xtal (MHz) 3 to 4 4 to 5 5 to 7 7 to 10 C1 (pF) 39 39 39 39 C2 (pF) 82 82 47 27 R (kΩ) 0.82 1.0 1.5 2.0 Note: The crystal used must have a fundamental frequency fo impedance to 3fo impedance ratio of 1:5 or greater. Equivalent Circuit Block Diagram No. 5439-5/10 LB1921 Sample Application Circuit AC Test Circuit Diagram No. 5439-6/10 LB1921 This section describes the LB1921 and the external components used. 1. Speed Control Circuit This IC uses the combination of a speed discriminator circuit and a PLL circuit for speed control. The speed discriminator circuit outputs an error signal once every two FG periods using a charge pump technique. The PLL circuit outputs a phase error signal once every FG period, also using a charge pump technique. As compared to earlier schemes that only used a speed discriminator, the combination of a PLL circuit with a speed discriminator provides improved speed variation suppression when using a motor with large load variations. Since the following formula determines the FG servo frequency, the motor speed must be set using the number of FG pulses and the crystal oscillator frequency. fFG (servo) = fOSC/8192 fOSC: crystal oscillator frequency 2. Direct PWM Drive This IC adopts direct PWM drive to minimize power loss in the output. The output transistors are always saturated when on and the motor drive power is adjusted by changing the output on duty. Since output switching is performed by the lower side transistor, the three Schottky diodes D1, D2 and D3 must be inserted between OUT and VCC. (Note that a through current will flow at the instant the lower side transistor turns on if these diodes do not have a short reverse recovery time.) Normal rectifying diodes can be used for the diodes between OUT and ground. 3. Current Control Circuit The current control circuit applies current control at a current determined by the relation I = 0.5/Rf, i.e. peak current limitation. The control operation reduces the output on duty and thus suppresses the current. No phase compensation capacitor is required. 4. Speed Lock Range The speed lock range is ±6.25% of the fixed speed and the LD pin goes low when the motor is in the lock range. (This pin is an open-collector output.) When the motor speed goes out of the lock range, the LB1921 changes the motor drive output on duty according to the speed error to control the motor speed to be within the lock range. 5. PWM Frequency The PWM frequency is determined by the resistor and capacitor (R3 and C6) connected to the CR pin. • When R3 is connected to the 4-V fixed voltage supply fPWM ≈ 1/(1.2 × C × R) • When R3 is connected to the 7-V fixed voltage supply fPWM ≈ 1/(0.5 × C × R) R3 should not be any smaller than 30 kΩ. A PWM frequency of about 15 kHz is desirable. If the PWM frequency is too low the motor will vibrate at the PWM frequency when the motor is restrained causing disturbing audible noise. Inversely, switching loss increases if the PWM frequency is too high. 6. Ground Leading GND1 (pin 22) is the ground for circuits other than the output block. GND2 (pin 11) is the ground for the output block (emitters of the sink transistors). D4, D5 and D6 are connected to GND2. All other external components are connected to GND1. The GND1 and GND2 lines are connected to a single ground point at the connector. Since GND2 carries large currents, it should be kept as short as possible. 7. Output Parasitic Effects Parasitic effects occur when the output pin voltage falls –0.7 V (this value decreases as the temperature increases) below the GND1 and GND2 voltage. Similarly, the output pin voltage should not be allowed to exceed VCC by more than 1 V. When parasitism occurs, initially speed control is lost intermittently, but if the amount of parasitism increases the output transistors can be destroyed. Schottky diodes with a small Vf are used for D1, D2 and D3 to prevent through currents. As a result, the potential difference between the output pins and VCC is not that much of a problem. Although normal rectifying diodes can be used for D4, D5 and D6, the printed circuit board pattern must be kept as short as possible (as recommended in item 6) to prevent parasitism from occurring. No. 5439-7/10 LB1921 8. External Interface Pins • LD pin Output type: Open collector Breakdown voltage: Maximum supply voltage of 30 V Saturation voltage sample-to-sample variation (reference value) (ILD = 10 mA) 0.10 to 0.15 V • FGS pin Output type: Open collector Breakdown voltage: Maximum supply voltage of 30 V Saturation voltage sample-to-sample variation (reference value) (IFGS = 2 mA) 0.12 to 0.18 V The FGS pin outputs the FGS amplifier output converted to a pulse output by a hysteresis comparator for use in speed monitoring. The pull-up resistor is not required when this pin is not used. • Start/stop pin Input type: PNP transistor base with a 50-kΩ pull-down resistor to ground. Threshold level (typical): about 2.6 V In stop mode, the 4-V, 5-V, and 7-V fixed voltage power supplies are turned off. • F/R pin Input type: PNP transistor base with a 50-kΩ pull-down resistor to ground. Threshold level (typical): about 2.2 V (high to low), about 2.7 V (low to high) Hysteresis: about 0.5 V F/R switching must be done when stopped. 9. Fixed Voltage Power Supply Temperature Characteristics • 4-V power supply: about –0.5 mV/°C (typical) • 5-V power supply: about –0.6 mV/°C (typical) • 7-V power supply: about –2.5 mV/°C (typical) 10. FG Amplifier The resistors R1 and R2 set the FG amplifier gain, with the gain being determined by the formula G = R2/R1. The capacitors C4 and C5 determine the FG amplifier frequency characteristics, with R1 and C4 forming a high-pass filter and R2 and C5 forming a low-pass filter. Since the FG amplifier is followed by a Schmitt comparator, the values of R1, R2, C4 and C5 must be set up so that FG amplifier output is over 250 mVp-p. In particular, it is desirable that the FG amplifier output be set up to be between 1 and 3 V during steady-state rotation. 11. External Capacitors • C3 The capacitor C3 is required for FGIN+ pin fixed voltage power supply stabilization and IC internal logic initial reset pulse generation. Although the value of this capacitor can be quite small for power supply stabilization, a relatively large capacitance (about 4.7 µF) is required for reset pulse generation. The reset pulse is generated during the time the FGIN+ pin goes from 0 to about 1.3 V. If the reset does not operate, LD will turn on briefly at startup. If this phenomenon is not a problem, a capacitor of about 0.1 µF can be used for C3. After C3 is charged to 4 V, when VCC is turned off (or the motor is stopped), the charge on C3 is discharged through the IC internal resistance to ground, which is about 10 kΩ. • C1 and C2 The capacitors C1 and C2 are required for fixed voltage power supply stabilization. Since this IC adopts a direct PWM drive scheme and switches large currents in the output, noise can occur easily. Thus the power supply must be adequately stabilized so that this noise does not cause the IC to operate incorrectly. C1, C2 and C3 must be connected as close as possible to GND1. In particular, C1’s characteristics are easily influenced and thus require caution. No. 5439-8/10 LB1921 12. External Resistors • R4 and R5 The resistors R4 and R5 exist to apply a high-level input to the F/R pin. Since the F/R input has a pull-down resistor of about 50 kΩ, it is at the low level when open. Apply a voltage of over 4.0 V and under 6.3 V to input a high level. • R15 The resistor R15 exists to apply a high-level input to the S/S pin. Since the S/S input has a pull-down resistor of about 50 kΩ, it is at the low level when open. Apply a voltage of over 4.0 V and under 6.3 V for the start state high level input. Although dividing the voltage with two resistors, as is done with the F/R input, would improve the resistance to noise since a lower input impedance can be set up, when noise is not a problem the high level can be set by connecting a single resistor such as R15. A value of 180 kΩ is recommended. If VCC rises slowly (less than about 10 V/ms) when power is first applied, the motor may rotate somewhat (in stop mode). This is because the S/S pin input voltage is resistor divided and the input voltage will be under 2.6 V (the start input level) when VCC is under 12 V. If the rise rate cannot be increased and this phenomenon is a problem, it can be resolved by connecting a capacitor between VCC and the S/S pin. 13. Through Currents due to the Direct PWM Scheme In the direct PWM scheme, through currents flow in the outputs due to transistor switching in applications implemented with either discrete components or the LB1822. This is due to output transistor delays and parasitic capacitances. Previously, when this was a problem, additional capacitors were used to resolve the problem. However, since the LB1921 resolves this problem at the circuit level, no additional external components are required. During switching, whiskers of less than about 10 ns may be observed on the RF voltage waveform, but these are not a problem. 14. Oscillator Element Normally, a crystal oscillator is used with this IC. If the speed control characteristic requirements are not stringent, a ceramic oscillator could be used. To avoid problems, consult the manufacturer of the oscillator element when selecting the oscillator element and determining the values of the external resistors and capacitors. 15. Sample IC Internal Power Dissipation Calculation (calculated for VCC = 24 V and typical rated values) • Power dissipation due to current drain (ICC) Start mode: P1 = VCC × ICC1 = 24 × 34 m = 0.82 W Stop mode: P2 = VCC × ICC2 = 24 × 8 m = 0.19 W • Power dissipation when –10 mA is drawn from the 7-V fixed voltage power supply P3 = (VCC – 7) × 10 m = 17 × 10 m = 0.17 W • Power dissipation due to output drive current (when the output on duty is 100%) P4 = {(VCC – 1)2/8 k} + {(VCC – 2)2/10 k} = (232/8 k) + (222/10 k) = 0.12 W • Power dissipation in the output drive transistors (when IO = 2 A and the output on duty is 100%) P5 = VO sat2 × IO = 2.7 × 2 = 5.4 W Therefore, the total power dissipation for the whole IC is: In stop mode: P = P2 = 0.19 W In start mode: P = P1 + P3 + P4 + P5 = 6.51 W (For a output on duty of 100%) 16. IC Temperature Rise Measurement Techniques • Thermocouple measurement Attach the thermocouple to a fin on the heat sink when using a thermocouple to measure the IC temperature. This technique is simple but is subject to large measurement errors when the heat generation is not consistent. • Measurement using IC internal diode characteristics We recommend using the parasitic diode that exists between the INT.IN and ground in this IC. (According to Sanyo data, the temperature characteristic of this diode is about 1.8 V/°C for ID = 1 mA.) The external resistor must be removed during testing. No. 5439-9/10 LB1921 17. Servo Constants Since the servo constant calculation depends strongly on the motor characters and requires significant expertise, we recommend that the motor manufacturer determine the constants in normal cases. Sanyo can provide the required IC characteristics data for the servo constant calculations and frequency characteristics simulation data for the filter characteristics specified by the motor manufacturer. When the resistor (R10) inserted between DOUT and INT.IN is too small, C8 and C9 will become too large and if R10 is too large speed errors become more likely to occur due to the speed discriminator cutoff and the integrator input current. Therefore, a value of between 10 and 100 kΩ is advisable. If the resistor (R8) inserted between POUT and INT.IN is too small, the influence of the PLL system will be too large and pull-in to synchronization with the lock state will degrade. Therefore, this resistor must not be too small. We recommend a value of around 1 MΩ when R10 is 75 kΩ. First determine the constants for the speed discriminator (R9, R10, C8 and C9) and then determine the value of R8 in the PLL system. s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Œ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use:  Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 1997. Specifications and information herein are subject to change without notice. No. 5439-10/10