LC72725KM

Ordering number : ENA0503 LC72725KM, LC72725KV Overview CMOS IC RDS(RBDS) Demodulation IC The LC72725KM and LC72725KV are ICs that implement the signal processing required by the European Broadcasting Union RDS (Radio Data System) standard and by the US NRSC (National Radio System Committee) RBDS (Radio Broadcast Data System) standard. These ICs include band-pass filter, demodulator, and data buffer on chip. RDS data can be read out from this on-chip memory by external clock input in slave operation mode. Functions • Bandpass filter: Switched capacitor filter (SCF) • RDS Demodulation: 57KHz carrier and RDS data clock regeneration, biphase decode, differential decode. • Buffer: 128 bit (about 100ms) can be restored in the on-chip data buffer RAM. • Data output: Master or slave output mode can be selected. • RDS-ID: Detect RDS signal which can be reset by RST signal input. • Standby control: Crystal oscillator can be stopped. • Fully adjustment free • Low Voltage Specifications Absolute Maximum Ratings at Ta = 25°C, VSSd = VSSa = 0V Parameter Maximum supply voltage Maximum input voltage Symbol VDD max VIN1 max VIN2 max Maximum output voltage VO1 max VO2 max VO3 max Maximum output current IO1 max IO2 max Pin Name VDDd, VDDa * TEST, MODE, XIN, RDCL, RST MPXIN, CIN RDS-ID(READY) XOUT, RDDA, RDCL FLOUT XOUT, FLOUT, RDDA, RDCL RDS-ID(READY) Conditions VDDa≤VDDd+0.3V Ratings -0.3 to +6.5 -0.3 to VDDd+0.3 -0.3 to VDDa+0.3 -0.3 to +6.5 -0.3 to VDDd+0.3 -0.3 to VDDa+0.3 +2.0 +8.0 Unit V V V V V V mA mA * VDDa≤VDDd+0.3V Continued on next page. Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before usingany SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 91306HKIM 20060822-S00002,20060823-S00002 No.A0503-1/9 LC72725KM, 72725KV Continued from preceding page. Parameter Allowable power dissipation Symbol Pd max Pin Name Conditions (Ta≤85°C)MFP16 (Ta≤85°C)SSOP16 Operating temperature Topr1 Topr2 Storage temperature Tstg VDD = 2.7V to 5.5V VDD = 3.0V to 5.5V Ratings 140 100 -20 to +70 -40 to +85 -40 to +125 Unit mW mW °C °C °C Allowable Operating Ranges at Ta = -20 to +70°C, VSSd = VSSa = 0V, VDDd = VDDa = 2.7V to 5.5V Ta = -40 to +85°C, VSSd = VSSa = 0V, VDDd = VDDa = 3.0V to 5.5V Parameter Supply voltage Symbol VDD1 VDD2 Input high-level voltage VIH1 VIH2 Input low-level voltage Output voltage VIL VO1 VO2 Input amplitude VIN VXIN Guaranteed crystal oscillator frequencies Crystal oscillator operating range RDCL setup time RDCL high-level time RDCL low-level time Data output time READY output time READY low-level time tCS tCH tCL tDC tRC tRL RDCL, RDDA RDCL RDCL RDCL, RDDA RDCL, READY READY 0 0.75 0.75 0.75 0.75 107 TXtal XIN, XOUT Fo = 4.332MHz Xtal Pin Name VDDd, VDDa VDDd, VDDa TEST, MODE, RST RDCL TEST, MODE, RST, RDCL RDDA, RDCL RDS-ID(READY) MPXIN XIN XIN, XOUT CI≤120Ω f = 57±2kHz 1.6 400 4.332 ±100 Conditions min Ta = -20 to +70°C Ta = -40 to +85°C 2.7 3.0 0.7VDDd 0.7VDDd 0 Ratings typ max 5.5 5.5 6.5 VDDd 0.3VDDd VDDd 6.5 50 1500 V V V V V mVrms mVrms MHz ppm μs μs μs μs μs ms V unit No.A0503-2/9 LC72725KM, 72725KV Electrical Characteristics for the Allowable Operating Ranges Parameter Input resistance Symbol Rmpxin Rcin Internal feedback resistance Center frequency -3dB band width Gain Stop band attenuation fc BW-3dB Gain Att1 Att2 Att3 Reference voltage output Hysteresis Output low-level voltage Vref VHIS VOL1 VOL2 Output high-level voltage Input high-level current VOH IIH1 IIH2 Input low-level current IIL1 IIL2 Output off leakage current Current drain IDD VDDd+VDDa VDDd+VDDa (VDDd = VDDa = 3V) 5 IOFF FLOUT FLOUT MPXIN-FLOUT FLOUT FLOUT FLOUT Vref TEST, MODE, RST, RDCL RDDA, RDCL RDS-ID(READY) RDDA, RDCL TEST, MODE, RST, RDCL XIN TEST, MODE, RST, RDCL XIN RDS-ID(READY) VI = 0V VO = 6.5V 2.0 VI = VDDd VI = 0V 2.0 I = 2mA I = 8mA I = 2mA VI = 6.5V VDDd-0.4 5.0 11 5.0 11 5.0 f = 57kHz Δf = ±7kHz F70kHz F