LV3313PM

Ordering number : ENA1257 Bi-CMOS LSI LV3313PM Overview Features For Car Audio Systems Electronic Volume IC The LV3313PM is an electronic volume IC that implements a rich set of audio control functions including input selection switching function, an input gain, volume, loudness, balance, fader, and bass/treble control. • Zero-cross switching circuits (Input gain control block and Volume control block) can switch signal detection location automatically. • Zero-cross switching circuits (Input gain control block and Volume control block) and soft mute circuits used for low noise even when input signals are present. • Low power consumption due to the use of BiMOS process. • All functions are controlled using serial data (CCB). • Input selector : Four input signals can be selected (three single-ended inputs and one differential input). • Input gain control : The input signal can be amplified by 0dB to +18dB (1dB steps). • Loudness control : Taps are output starting at the -32dB position of the ladder resistor and a loudness function implemented with external capacitor and resistor components. • Volume control : +10dB to -79dB/-∞ (1dB steps) L/R independent control. • Bass control : +12dB to -12dB in 2dB steps • Treble control : +12dB to -12dB in 2dB steps • Fader control : The fader volume can be attenuations by one of 16 levels. Independent control each four channels. (A total of 16 settings with attenuations of 0dB to -2dB in 1dB steps, -2dB to -20dB in 2dB steps, and -30dB, -45dB, - 60dB and -∞dB settings.) • Mute • • Functions CCB is a registered trademark of SANYO Electric Co., Ltd. CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO Semiconductor for this format. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 71608 MS PC 20080625-S00005 No.A1257-1/18 LV3313PM Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0V Parameter Maximum supply voltage Maximum input voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN max Pd max Topr Tstg VDD All input pins Ta ≤ 85°C, when mounted on a printed circuit board * -40 to +85 -50 to +125 °C °C Conditions Ratings 9.5 VSS-0.3 to VDD 600 Unit V V mW * Specified circuit board : 114.3 × 76.1 × 1.6mm3 : glass epoxy board Allowable Operating Ratings at Ta = 25°C, VSS = 0V Parameter Supply voltage High-level input voltage Low-level input voltage Input voltage amplitude Input pulse width Setup time Hold time Operating frequency Rising time Falling time Symbol VDD VIH VIL VIN TφW Tsetup Thold fopg tr tf CL CL, DI, CE CL, DI, CE CL CL, DI, CE VDD CL, DI, CE CL, DI, CE Conditions min 7.0 3.0 VSS VSS 1 1 1 500 0.1/fopg Ratings typ 8.0 max 9.0 5.5 1.0 VDD V V V Vp-p μs μs μs kHz s Unit Electrical Characteristics at Ta = 25°C, VDD = 8V, VSS = 0V Parameter Input block Input resistance Minimum input gain Maximum input gain Inter-step setting error Left/Right balance Volume block Input resistance Inter-step setting error Left/Right balance Bass block Bass control range Inter-step setting error Left/Right balance Treble block Treble control range Inter-step setting error Left/Right balance Fader block Input resistance Inter-step setting error Rfed ATerr 0dB to -2dB -4dB to -20dB -30dB -45dB Left/Right balance BAL 0dB to -30dB 35 -0.5 -1.0 -2.0 -3.0 -0.5 50 65 +0.5 +1.0 +2.0 +3.0 +0.5 kΩ dB dB dB dB dB Gb max ATerr BAL max. boost/cut -10dB to +10dB ±10 -0.5 -0.5 ±12 ±14 +0.5 +0.5 dB dB dB Gb max ATerr BAL max. boost/cut -10dB to +10dB ±10 -0.5 -0.5 ±12 ±14 +0.5 +0.5 dB dB dB Rvr ATerr BAL LVRIN, RVRIN +10dB to -40dB 35 -0.5 -0.5 50 65 +0.5 +0.5 kΩ dB dB Rin Gin min Gi max ATerr BAL L1-L3, R1-R3 L1-L3, R1-R3 35 -1.0 +17 -1.0 -0.5 50 0 +18 65 +1.0 +19 +1.0 +0.5 kΩ dB dB dB dB Symbol Conditions min Ratings typ max Unit No.A1257-2/18 LV3313PM Overall Characteristics at Ta = 25°C, VDD = 8V, VSS = 0V Parameter A loss of insertion Total harmonic distortion Inter-input crosstalk Left/Right channel crosstalk Maximum attenuation Output noise voltage Current drain Input high-level current Input low-level current Maximum input voltage Common-mode rejection ratio Symbol ATT THD CT CT VO min VN IDD IIH IIL VCL CMRR CL, DI, CE, VIN = 5.5V CL, DI, CE, VIN = 0V THD = 1% RL = 10kΩ all controls flat, fIN = 1kHz VIN = 1Vrms, f = 1kHz -10 2.2 50 VIN = 1Vrms, f = 1kHz VIN = 1Vrms, f = 1kHz VIN = 1Vrms, f = 1kHz VIN = 1Vrms, f = 1kHz 80 80 80 Conditions min -1.0 0.004 88 88 88 10 16 25 23 10 Ratings typ max +1.0 0.01 dB % dB dB dB μV mA μA μA Vrms dB Unit Package Dimensions unit : mm (typ) 3148A 13.2 10.0 44 1 0.8 (1.0) 0.35 0.2 2.8max 0.1 (2.5) SANYO : QIP44M(10X10) 13.2 1.0 10.0 No.A1257-3/18 LV3313PM Pin Assignment LVROUT LSEL0 LF3C1 LF1C1 LF1C2 LF1C3 LVRIN 33 32 31 30 29 28 27 26 25 24 23 L3 L2 L1 VDD MUTE TEST PH VREF R1 R2 R3 34 35 36 37 38 39 40 41 42 43 44 Top view LFIN L4M LCT L4P 22 LFOUT 21 LROUT 20 AVSS 19 CE 18 DI LV3313PM 17 CL 16 OSC 15 VREG 14 DVSS 13 RROUT 12 RFOUT 1 R4M 2 R4P 3 RSELO 4 RVRIN 5 RCT 6 RF3C1 7 RF1C1 8 RF1C2 9 RF1C3 10 RVROUT 11 RFIN No.A1257-4/18 + + LVRIN + + LCT LVROUT LSELO LF3C1 LFIN LF1C1 LF1C2 LF1C3 Block Diagram DIFF INPUT SELECT FADER VOLUME INPUT GAIN VOLUME SOFT MUTE 2BAND EQ INPUT SELECTOR L4M L4P 32 22 31 30 29 28 27 26 25 24 23 LFOUT + 33 PA + L3 34 ZERO CROSS DET LOGIC CIRCUIT LVREF RVREF CONTROL CIRCUIT OSC ZERO CROSS DET INPUT SELECTOR INPUT GAIN VOLUME SOFT MUTE 2BAND EQ LROUT 21 + L2 FADER VOLUME + PA 35 11 10 2 3 4 5 6 7 8 9 R4P RCT RFIN RVRIN RF1C1 RF3C1 RF1C2 RF1C3 RSELO RVROUT + + + + L1 36 CCB INTERFACE FADER VOLUME FADER VOLUME AVSS 20 VDD 37 19 18 17 16 15 14 13 12 CE DI CL OSC VREG + MUTE 38 MUTE CIRCUIT μCOM 39 TEST LV3313PM + PH 40 VREF BIAS VOLTAGE CIRCUIT + 41 42 + R1 DVSS RROUT + PA + R2 43 + R3 + 44 RFOUT + DIFF INPUT SELECT PA 1 R4M No.A1257-5/18 LV3313PM Application Circuit 0.1μF 1μF 1μF 4.7kΩ 68kΩ 220pF + + + 2700pF + 1μF 31 LSELO 0.1μF 0.1μF 29 LCT 10μF 24 LVROUT 33 L4M 32 L4P 30 LVRIN 28 LF3C1 27 LF1C1 26 LF1C2 25 LF1C3 23 LFIN + 1μF + 34 L3 35 L2 36 L1 37 VDD 38 MUTE 39 TEST LFOUT 22 LROUT 21 AVSS 20 CE 19 DI 18 CL 17 OSC 16 VREG 15 DVSS 14 RROUT 13 RVROUT + 10μF 10μF + PA + PA 1μF + 1μF μCOM + 0.47μF + 40 PH 41 VREF 42 R1 43 R2 44 R3 R4M R4P 22μF + 1μF 1μF + 1μF + 10μF 10μF + PA + PA RSELO RF3C1 RF1C1 RF1C2 RF1C3 RVRIN 1 2 3 4 5 6 7 8 9 10 11 1μF + 1μF 1μF 0.1μF 0.1μF 2700pF 68kΩ 4.7kΩ 0.1μF + 220pF 10μF RFIN 1μF RFOUT 12 RCT + + No.A1257-6/18 LV3313PM Control System Timing and Data Format The LV3313PM is controlled by applying the stipulated data to the CL, DI and CE pins. The data consists of a total of 104 bits, of which 8 bits are the device address, 96 bits are the control data. CE DI CL B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D90 D91 D92 D93 D94 D95 data 1μs 1μs 1μs min min min 1μs min 1μs min CE CL DI 1μs ≤ TDEST tr CE tr CL tf DI tr, tf Send to data Address code B0 to B3, A0 to A3 Data setting (96bit) D0 to D95 Address code B0 1 B1 0 B2 0 B3 0 A0 0 A1 0 A2 0 A3 1 No.A1257-7/18 LV3313PM Data setting Input switching control D0 0 1 0 1 0 D1 0 0 1 1 0 D2 0 0 0 0 1 Operation INIT L1 (R1) L2 (R2) L3 (R3) L4 (R4) Input gain control D3 D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D4 D9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 D5 D10 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 D6 D11 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 D7 D12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 Lch Rch 0dB +1dB +2dB +3dB +4dB +5dB +6dB +7dB +8dB +9dB +10dB +11dB +12dB +13dB +14dB +15dB +16dB +17dB +18dB No.A1257-8/18 LV3313PM Volume control (10dB to -43dB) D13 D21 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D14 D22 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D15 D23 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D16 D24 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 D17 D25 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 D18 D26 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 D19 D27 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D20 D28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Lch Rch 10dB 9dB 8dB 7dB 6dB 5dB 4dB 3dB 2dB 1dB 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB No.A1257-9/18 LV3313PM Volume control (-44dB to -∞) D13 D21 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D14 D22 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 D15 D23 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D16 D24 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 D17 D25 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D18 D26 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D19 D27 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D20 D28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Lch Rch -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -∞ No.A1257-10/18 LV3313PM Tone block Treble GAIN D29 D33 0 1 0 1 0 1 0 1 0 1 0 1 0 D30 D34 1 0 0 1 1 0 0 0 1 1 0 0 1 D31 D35 1 1 1 0 0 0 0 0 0 0 1 1 1 D32 D36 1 1 1 1 1 1 0 0 0 0 0 0 0 Lch Rch +12dB +10dB +8dB +6dB +4dB +2dB 0dB -2dB -4dB -6dB -8dB -10dB -12dB Bass GAIN D37 D41 0 1 0 1 0 1 0 1 0 1 0 1 0 D38 D42 1 0 0 1 1 0 0 0 1 1 0 0 1 D39 D43 1 1 1 0 0 0 0 0 0 0 1 1 1 D40 D44 1 1 1 1 1 1 0 0 0 0 0 0 0 Lch Rch +12dB +10dB +8dB +6dB +4dB +2dB 0dB -2dB -4dB -6dB -8dB -10dB -12dB No.A1257-11/18 LV3313PM Fader block D45 D51 D57 D63 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D46 D52 D58 D64 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D47 D53 D59 D65 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D48 D54 D60 D66 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D49 D55 D61 D67 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D50 D56 D62 D68 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LFOUT LROUT RFOUT RROUT 0dB -1dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB -20dB -30dB -45dB -60dB -∞ Loudness control D69 0 1 Operation off on Zero cross control D70 0 1 Operation off on Zero cross signal detection block control D71 0 1 Operation Input gain Volume D72 0 1 Operation Manual detection Automatic detection D73 0 D74 0 Zero-cross signal detection timer overflow settings D75 0 1 0 1 D76 0 0 1 1 Operation Timer time 10ms Timer time 20ms Timer time 40ms Timer time 80ms No.A1257-12/18 LV3313PM Soft mute control D77 0 1 Operation Soft mute mode off Soft mute mode on D78 0 1 Operation mute set off mute set on D79 0 1 D80 0 0 Operation normal mode test mode Soft mute settling time select control D81 0 1 0 1 D82 0 0 1 1 Operation mute time 0.64ms mute time 5.12ms mute time 40ms mute time 80ms D83 0 D84 0 D85 0 D86 0 D87 0 Test mode block D88 0 D89 0 D90 0 D91 0 D92 0 D93 0 D94 0 D95 0 No.A1257-13/18 LV3313PM Pin Functions Pin No. 36 35 34 42 43 44 L1 L2 L3 R1 R2 R3 Pin name Function Single end input pins. Equivalent Circuit VDD + - LVref RVref 33 32 1 2 L4M L4P R4M R4P Differential input pins. VDD M VDD P LVref RVref + 31 3 LSELO RSELO Input selector output pins. VDD + - 30 4 LVRIN RVRIN Main volume input pins. VDD + - LVref RVref 29 5 LCT RCT Loudness function pins. VDD 24 10 LVROUT RVROUT Tone output pins. VDD + 23 11 LFIN RFIN Fader block input pins. Drive at low impedance. VDD 22 21 12 13 LFOUT LROUT RFOUT RROUT Fader output pins.Attenuation is possible separately for the front end and rear end. VDD + Continued on next page. No.A1257-14/18 LV3313PM Continued from preceding page. Pin No. 41 Pin name Vref Function Connect a capacitor of a few tens of uF between Vref and AVSS (VSS) as a 0.55 × VDD voltage generator, current ripple countermeasure. Equivalent Circuit VDD + LVref RVref 15 VREG Internal logic voltage pin. VDD + 37 20 38 VDD AVSS MUTE Power supply pin. Ground pin. External muting control pin. Setting this pin to VSS level sets forcibly fader volume block to -∞ level. VDD 27 26 25 7 8 9 LF1C1 LF1C2 LF1C3 RF1C1 RF1C2 RF1C3 Capacitor connection pins for configuring equalizer bass band filter. Connect a capacitor between LF1C1 (RF1C1) and LF1C2 (RF1C2), and between LF1C2 (RF1C2) and LF1C3 (RF1C3). VDD + - VDD F1C1 VDD F1C3 VDD F1C2 Vref 28 6 LF3C1 RF3C1 Capacitor connection pins for configuring equalizer treble band filter. Connect a high band compensation capacitor between LF3C1 (RF3C1) and VSS. VDD F3C1 17 18 19 CL DI CE Input pin for serial data and clock used for control. Chip enable pin.Data is written to the internal latch and the analog switches are operated when the level changes from High to Low. Data transfer is enabled when the level is High. VDD Continued on next page. No.A1257-15/18 LV3313PM Continued from preceding page. Pin No. 39 14 16 Pin name TEST DVSS OSC IC test pin. Normally this pin is OPEN. Logic system ground pin. External oscillat input pin. Normally this pin is OPEN. Function Equivalent Circuit VDD 40 PH Automatic zero cross detection pin. VDD No.A1257-16/18 LV3313PM Usage Cautions (1) Data Transmission at power on • The status of internal analog switches is unstable at power on. Therefore, perform muting or some other countermeasure until the data has been set. • At power on, initial setting data must be sent once in order to stabilize the bias of each block in a short time. (2) Description of zero cross switching circuit operation The LV3313PM have a function to switch zero cross comparator signal detection locations, enabling the selection of the optimum detection location for blocks whose data is to be updated.Basically, the switching noise can be minimized by inputting the signal immediately following the block whose data is to be updated to the zero cross comparator, so it is necessary to switch the detection location every time. Input gain Volume Switch Zero cross comparator LV3313PM zero cross detection circuit (3) Zero Cross Switching Control method The zero cross switching control method consists of setting the zero cross control bits to the zero cross detection mode, and specifying the detection blocks before transmitting the data. These control bits are latched immediately following data transfer, that is to say beforehand in sync with the falling edge of CE, so when updating data of volumes, etc., it is possible to perform mode setting and zero cross switching with one data transfer. (4) Soft mute operation The LV3313PM have a soft mute function for low switching noise, when this mute function set operation. (mute/unmute function select) The Soft mute time can be selected by send to CCB control. (0.6ms, 5ms, 40ms, 80ms) A soft mute function can be implemented by set to soft mute on. (Set to mute on/off) Soft mute time Soft mute time No.A1257-17/18 LV3313PM SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of July, 2008. Specifications and information herein are subject to change without notice. PS No.A1257-18/18