SSG4957

SSG4957 Elektronische Bauelemente -7.7A, -30V,RDS(ON) 24m Ω P-Channel Enhancement Mode Power Mos.FET RoHS Compliant Product SOP-8 Description The SSG4957 provide the designer with the best Combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. 6.20 5.80 0.25 3.80 4.00 0.40 0.90 0.19 0.25 45 o 0.375 REF 0.35 0.49 1.27Typ. 4.80 5.00 0.100.25 Features * Low on-resistance * Simple drive requirement D1 8 D1 7 D2 6 D2 5 0 o 8 o 1.35 1.75 Dimensions in millimeters D1 D1 * Dual P MOSFET Package Date Code 4957SS G1 1 S1 2 G1 3 S2 4 G2 G1 S1 S1 Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current 3 Continuous Drain Current 3 Pulsed Drain Current 1 Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg Symbol VDS VGS ID@TA=25 C ID@TA=70 C IDM PD@TA=25 C o o o Ratings -30 ±20 -7.7 - 6.1 -30 2 0.016 -55~+150 Unit V V A A A W W/ C o o C Thermal Data Parameter Thermal Resistance Junction-ambient3 (Max) Symbol Rthj-a Ratings 62.5 o Unit C /W http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 4 SSG4957 Elektronische Bauelemente -7.7A, -30V,RDS(ON) 24m Ω P-Channel Enhancement Mode Power Mos.FET Electrical Characteristics( Tj=25 C Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70 C) Static Drain-Source On-Resistance2 o o Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. -30 _ Typ. _ Max. _ _ Unit V V/ oC V nA uA uA Test Condition VGS=0V, ID=-250uA Reference to 25 C ,ID=-1mA VDS=VGS, ID=-250uA VGS=± 20V VDS=-30V,VGS=0 VDS=-24V,VGS=0 VGS=-10V, ID=-7A VGS=-4.5V, ID=-5A o -0.02 _ _ _ _ -1.0 _ _ _ _ -3.0 ±100 -1 -25 24 36 45 _ _ _ _ _ _ 2670 _ _ RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs 20 30 27 5 18 14 11 38 25 1670 530 435 12 _ _ _ _ _ _ _ _ _ _ _ mΩ Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance nC ID=-7A VDS=-24V VGS=-4.5V VDD=-15V ID=-1A nS VGS=-10V RG=3.3Ω RD=15 Ω pF VGS=0V VDS=-25V f=1.0MHz _ _ S VDS=-10V, ID=-7A Source-Drain Diode Parameter Forward On Voltage 2 Reverse Recovery Time 2 Reverse Recovery Charge Symbol VDS Trr Qrr Min. _ Typ. _ Max. -1.2 Unit V Test Condition IS=1.7A, VGS=0V. Tj=25 C Is=-7A, V GS=0V dl/dt=100A/uS o _ _ 35 34 _ _ A A Notes: 1.Pulse width limited by safe operating area. 2.Pulse width≦300us, dutycycle≦2%. 3.Surface mounted on 1 in copper pad of FR4 board; 135 OC/W when mounted on min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 2 01-Jun-2002 Rev. A Page 2 of 4 SSG4957 Elektronische Bauelemente -7.7A, -30V,RDS(ON) 24mΩ P-Channel Enhancement Mode Power Mos.FET Characteristics Curve Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Forward Characteristics of Reverse Diode http://www.SeCoSGmbH.com/ Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3of 4 SSG4957 Elektronische Bauelemente -7.7A, -30V,RDS(ON) 24m Ω P-Channel Enhancement Mode Power Mos.FET Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Transfer Characteristics Fig 12. Gate Charge Waveform http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 4