SFB95N03L

SemiWell Semiconductor SFB95N03L Logic N-Channel MOSFET Features ■ ■ ■ ■ ■ ■ Low RDS(on) (0.0085Ω )@VGS=10V Low Gate Charge (Typical 39nC) Low Crss (Typical 185pF) Improved dv/dt Capability 100% Avalanche Tested Maximum Junction Temperature Range (175°C) Symbol ● 2. Drain 1. Gate ◀ ● ● ▲ 3. Source General Description This Power MOSFET is produced using SemiWell’s advanced planar stripe, DMOS technology. This latest technology has been especially designed to minimize on-state resistance, have a low gate charge with superior switching performance, and rugged avalanche characteristics. This Power MOSFET is well suited for synchronous DC-DC Converters and Power Management in portable and battery operated products. D2-PACK (TO-263) 2 1 3 Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS dv/dt PD TSTG, TJ TL Drain to Source Voltage Continuous Drain Current(@TC = 25°C) Continuous Drain Current(@TC = 100°C) Drain Current Pulsed Gate to Source Voltage Single Pulsed Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation(@TA = 25 °C) * Total Power Dissipation(@TC = 25 °C) Derating Factor above 25 °C Operating Junction Temperature & Storage Temperature Maximum Lead Temperature for soldering purpose, 1/8 from Case for 5 seconds. (Note 2) (Note 3) (Note 1) (Note 6) Parameter Value 30 95 67.3 380 Units V A A A V mJ V/ns W W W/°C °C °C ±20 450 7.0 3.75 150 1.0 - 55 ~ 175 300 Thermal Characteristics Symbol RθJC RθJA RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Value Min. - Typ. - Max. 1.0 40 62.5 Units °C/W °C/W °C/W * When mounted on the minimum pad size recommended (PCB Mount) Octorber, 2002. Rev. 0. Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. 1/7 SFB95N03L Electrical Characteristics Symbol Off Characteristics BVDSS Δ BVDSS/ Δ TJ IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature coefficient Drain-Source Leakage Current Gate-Source Leakage, Forward Gate-Source Leakage, Reverse VGS = 0V, ID = 250uA ID = 250uA, referenced to 25 °C VDS = 30V, VGS = 0V VDS = 24V, TC = 150 °C VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VDS = VGS, ID = 250uA VGS =10 V, ID = 47.5A VGS =5 V, ID = 47.5A 30 0.023 1 10 100 -100 V V/°C uA uA nA nA ( TC = 25 °C unless otherwise noted ) Parameter Test Conditions Min Typ Max Units IGSS On Characteristics VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-state Resistance 1.0 0.0065 0.0085 3.0 0.0085 0.0115 V Ω Dynamic Characteristics Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance VGS =0 V, VDS =25V, f = 1MHz 1015 845 185 1320 1110 240 pF Dynamic Characteristics Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge(Miller Charge) VDS =24V, VGS =5V, ID =95A ※ see fig. 12. (Note 4, 5) VDD =15V, ID =95A, RG =50Ω ※ see fig. 13. (Note 4, 5) 45 165 70 140 39 13 18 100 340 150 290 51 nC ns - Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr Parameter Continuous Source Current Pulsed source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions Integral Reverse p-n Junction Diode in the MOSFET IS =95A, VGS =0V IS=95A,VGS=0V,dIF/dt=100A/us Min. - Typ. 55 65 Max. 95 380 1.5 - Unit. A V ns nC ※ NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L = 50 uH, IAS =95A, VDD = 15V, RG = 0Ω , Starting TJ = 25°C 3. ISD ≤ 95A, di/dt ≤ 300A/us, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse Width ≤ 300us, Duty Cycle ≤ 2% 5. Essentially independent of operating temperature. 6. Continuous Drain current calculated by maximum junction temperature ; limited by package 2/7 SFB95N03L Fig 1. On-State Characteristics VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V Top : Fig 2. Transfer Characteristics 10 2 ID, Drain Current [A] 10 ID, Drain Current [A] 2 10 1 175 C 25 C o o 10 0 -55 C ※ Notes : 1. VDS = 15V 2. 250µ s Pulse Test o 10 1 ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ -1 0 1 10 10 10 10 -1 0 2 4 6 8 10 12 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] Fig 3. On Resistance Variation vs. Drain Current and Gate Voltage 20 Fig 4. On State Current vs. Allowable Case Temperature RDS(ON) [mΩ ], Drain-Source On-Resistance 15 VGS = 5V VGS = 10V IDR, Reverse Drain Current[A] 10 2 10 1 10 175℃ 10 0 25℃ ※ Notes : 1. VGS = 0V 2. 250µ s Pulse Test 5 ※ Note : TJ = 25℃ 0 0 100 200 300 400 10 -1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ID, Drain Current [A] VSD, Source-Drain voltage[V] Fig 5. Capacitance Characteristics 6000 Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd Fig 6. Gate Charge Characteristics 12 VGS, Gate-Source Voltage [V] 5000 10 VDS = 15V VDS = 24V Capacitance [pF] 4000 ※ Notes : 1. VGS = 0V 2. f=1MHz 8 3000 6 Ciss 2000 4 Coss 1000 2 ※ Note : ID = 95 A Crss 0 0 5 10 15 20 25 30 35 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC] 3/7 SFB95N03L Fig 7. Breakdown Voltage Variation vs. Junction Temperature 1.2 3.0 Fig 8. On-Resistance Variation vs. Junction Temperature BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.1 RDS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.0 1.5 1.0 0.9 ※ Notes : 1. VGS = 0 V 2. ID = 250 µ A 0.5 ※ Notes : 1. VGS = 10 V 2. ID = 47.5 A 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Fig 9. Maximum Safe Operating Area 100 10 3 Fig 10. Maximum Drain Current vs. Case Temperature Limited by Package Operation in This Area is Limited by R DS(on) 10 2 1 ms 10 ms DC ID, Drain Current [A] 100 µs 80 ID, Drain Current [A] 60 10 1 40 ※ Notes : 1. TC = 25 C o 20 10 0 2. TJ = 175 C 3. Single Pulse -1 o 10 10 0 10 1 0 25 50 75 100 125 150 175 VDS, Drain-Source Voltage [V] TC, Case Temperature [℃] Fig 11. Transient Thermal Response Curve 10 0 Zθ JC Thermal Response (t), D = 0 .5 0 .2 10 -1 0 .1 0 .0 5 0 .0 2 0 .0 1 ※ N o te s : 1 . Z θ JC = 1 .0 ℃ /W M a x. (t) 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z θ JC (t) s in g le p u ls e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a ve P u ls e D u ra tio n [s e c ] 4/7 SFB95N03L Fig. 12. Gate Charge Test Circuit & Waveforms 50KΩ 12V 200nF 300nF Same Type as DUT VDS VGS Qg 5V Qgs Qgd VGS DUT 1mA Charge Charge Fig 13. Switching Time Test Circuit & Waveforms VDS RL VDD ( 0.5 rated V DS ) VDS 90% 5V Pulse Generator RG DUT Vin 10% td(on) t on tr td(off) t off tf Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms VDS ID RG L VDD BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS ID (t) 10V DUT VDD tp VDS (t) Time 5/7 SFB95N03L Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG Same Type as DUT VDD VGS • dv/dt controlled by RG • IS controlled by pulse period VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop 6/7 SFB95N03L TO-263(D2-PAK) Package Dimension Dim. A B C D E F G H I J K L mm Min. 9.8 7.9 11.2 4.3 1.25 1.0 Typ. 10 8 11.8 4.5 1.3 1.2 2.54 2.54 2.24 2.2 0.45 0.7 2.54 2.4 0.5 0.8 1.57 2.84 2.6 0.6 0.9 0.088 0.087 0.018 0.028 Max. 10.2 8.1 12.4 4.7 1.4 1.4 Min. 0.386 0.311 0.441 0.169 0.049 0.039 Inch Typ. 0.394 0.315 0.465 0.177 0.051 0.047 0.1 0.1 0.1 0.094 0.02 0.031 0.06 0.112 0.102 0.024 0.035 Max. 0.402 0.319 0.488 0.185 0.055 0.055 φ A B D E φ F C I 2 1 G 3 H J K L 1. Gate 2. Drain 3. Source 7/7