SGM4574
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
GENERAL DESCRIPTION
FEATURES
This 4-bit non-inverting translator uses two separate
● No Direction-Control Signal Needed
configurable power-supply rails. The A ports are
● Data Rates
designed to track VCCA. VCCA accepts any supply
24Mbps (Push-Pull)
voltage from 1.65V to 5.5V. VCCA must be less than or
2Mbps (Open-Drain)
equal to VCCB. The B ports are designed to track VCCB.
VCCB accepts any supply voltage from 2.3V to 5.5V.
This allows for low-voltage bidirectional translation
between any of the 1.8V, 2.5V, 3.3V and 5V voltage
● 1.65V to 5.5V on A Ports and 2.3V to 5.5V on B
Ports (VCCA ≤ VCCB)
● No Power-Supply Sequencing Required
Either VCCA or VCCB can be Ramped First
● -40℃ to +85℃ Operating Temperature Range
nodes.
When the output-enable (OE) input is low, all I/Os are
placed in the high-impedance state.
The SGM4574 is designed so that the OE input circuit
● Available in Green UTQFN-1.8×1.8-12L,
TQFN-2×2-12L and SOIC-14 Packages
is supplied by VCCA.
APPLICATIONS
To ensure the high-impedance state during power up or
Handset
power down, OE should be tied to GND through a
Smartphone
pull-down resistor; the minimum value of the resistor is
Tablet
determined by the current-sourcing capability of the
Desktop PC
driver.
The SGM4574 is available in Green UTQFN-1.8×1.8-12L,
TQFN-2×2-12L and SOIC-14 packages. It operates over
an ambient temperature range of -40℃ to +85℃.
TYPICAL APPLICATION
1.8V
3.3V
0.1μF
0.1μF
VCCA
VCCB
OE
1.8V
System
Controller
DATA
3.3V
System
Controller
SGM4574
A1
A2
A3
A4
GND
B1
B2
B3
B4
DATA
Figure 1. Typical Application Circuit
SG Micro Corp
www.sg-micro.com
JUNE 2018 – REV, A
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
PACKAGE/ORDERING INFORMATION
MODEL
SGM4574
PACKAGE
DESCRIPTION
SPECIFIED
TEMPERATURE
RANGE
ORDERING
NUMBER
UTQFN-1.8×1.8-12L
-40℃ to +85℃
SGM4574YUQN12G/TR
TQFN-2×2-12L
-40℃ to +85℃
SGM4574YTQM12G/TR
SOIC-14
-40℃ to +85℃
SGM4574YS14G/TR
PACKAGE
MARKING
4574
XXXX
4574
XXXX
SGM4574YS14
XXXXX
PACKING
OPTION
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 2500
MARKING INFORMATION
NOTE: XXXX = Date Code. XXXXX = Date Code and Vendor Code.
UTQFN-1.8×1.8-12L/TQFN-2×2-12L
SOIC-14
XXXX
XXXXX
Date Code - Week
Date Code - Year
Vendor Code
Date Code - Week
Date Code - Year
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
OVERSTRESS CAUTION
Stresses beyond those listed may cause permanent damage
to the device. Functional operation of the device at these or
any other conditions beyond those indicated in the operational
section of the specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, specification or other related things if necessary
without notice at any time.
SG Micro Corp
www.sg-micro.com
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged by ESD if you don’t
pay attention to ESD protection. SGMICRO recommends that
all integrated circuits be handled with appropriate precautions.
Failure to observe proper handling and installation procedures
can cause damage. ESD damage can range from subtle
performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage
because very small parametric changes could cause the
device not to meet its published specifications.
JUNE 2018
2
SGM4574
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Range
VCCA ................................................................... -0.3V to 6V
VCCB ................................................................... -0.3V to 6V
(1)
A Ports, B Ports, OE Input Voltage Range, VI
............................................................................. -0.3V to 6V
Voltage Range Applied to Any Output in the High- Impedance
(1)
or Power-Off State, VO
A Ports ............................................................... -0.3V to 6V
B Ports ............................................................... -0.3V to 6V
Voltage Range Applied to Any Output in the High or Low State,
(1) (2)
VO
A Ports ................................................. -0.3V to VCCA + 0.3V
B Ports ................................................. -0.3V to VCCB + 0.3V
Input Clamp Current, IIK (VI < 0) ................................... -50mA
Output Clamp Current, IOK (VO < 0).............................. -25mA
Continuous Output Current, IO .................................... ±50mA
Continuous Current through VCCA, VCCB, or GND ...... ±100mA
Junction Temperature .................................................+150℃
Storage Temperature Range......................... -65℃ to +150℃
Lead Temperature (Soldering, 10s) ............................+260℃
ESD Susceptibility
HBM ............................................................................. 4000V
MM ................................................................................. 300V
CDM ............................................................................ 1000V
RECOMMENDED OPERATING CONDITIONS
(3, 4)
(5)
Supply Voltage Range
VCCA ................................................................ 1.65V to 5.5V
VCCB .................................................................. 2.3V to 5.5V
High-Level Input Voltage, VIH
A Port I/Os (VCCA = 1.65V, VCCB = 2.3V to 5.5V)
................................................................ VCCI - 0.1V to VCCI
A Port I/Os (VCCA = 1.95V to 5.5V, VCCB = 2.3V to 5.5V)
................................................................ VCCI - 0.4V to VCCI
B Port I/Os ............................................... VCCI - 0.4V to VCCI
OE Input ................................................VCCA × 0.8V to 5.5V
Low-Level Input Voltage, VIL
A Port I/Os ......................................................... 0V to 0.15V
B Port I/Os ......................................................... 0V to 0.15V
OE Input .................................................0V to VCCA × 0.25V
Operating Temperature Range ....................... -40℃ to +85℃
NOTES:
3. VCCI is the VCC associated with the input ports.
4. VCCO is the VCC associated with the output ports.
5. VCCA must be less than or equal to VCCB, and VCCA must not
exceed 5.5V.
NOTES:
1. The input and output negative-voltage ratings may be
exceeded if the input and output current ratings are observed.
2. The value of VCCA and VCCB are provided in the
recommended operating conditions table.
SG Micro Corp
www.sg-micro.com
JUNE 2018
3
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
PIN CONFIGURATIONS
(TOP VIEW)
B1
B2
12
11
B3
10
(TOP VIEW)
B4
VCCA
VCCB
B1
12
11
10
9
VCCB
1
8
OE
VCCA
2
7
GND
3
4
5
6
A1
A2
A3
A4
A1
1
A2
2
A3
3
GND
UTQFN-1.8×1.8-12L
4
5
6
A4
GND
OE
9
B2
8
B3
7
B4
TQFN-2×2-12L
(TOP VIEW)
VCCA
1
14 VCCB
A1
2
13
B1
A2
3
12
B2
A3
4
11
B3
A4
5
10
B4
NC
6
9
NC
GND
7
8
OE
SOIC-14
PIN DESCRIPTION
TQFN2×2-12L
1
PIN
UTQFN1.8×1.8-12L
3
SOIC-14
2
4
3
5
NAME
TYPE
FUNCTION
2
A1
I/O
Input/Output A1. Referenced to VCCA.
3
A2
I/O
Input/Output A2. Referenced to VCCA.
4
A3
I/O
Input/Output A3. Referenced to VCCA.
4
6
5
A4
I/O
–
–
6, 9
NC
–
No Connection. Not internally connected.
5
7
7
GND
S
6
8
8
OE
I
7
9
10
B4
I/O
Ground
3-State Output-Mode Enable. Pull OE low to place all outputs in 3-state
mode. Referenced to VCCA.
Input/Output B4. Referenced to VCCB.
8
10
11
B3
I/O
Input/Output B3. Referenced to VCCB.
9
11
12
B2
I/O
Input/Output B2. Referenced to VCCB.
10
12
13
B1
I/O
Input/Output B1. Referenced to VCCB.
11
1
14
VCCB
S
B Ports Supply Voltage. 2.3V ≤ VCCB ≤ 5.5V.
12
Exposed
Pad
2
1
VCCA
S
–
–
GND
–
A Ports Supply Voltage. 1.65V ≤ VCCA ≤ 5.5V and VCCA ≤ VCCB.
Exposed pad should be soldered to PCB board and connected to GND
or left floating.
SG Micro Corp
www.sg-micro.com
Input/Output A4. Referenced to VCCA.
JUNE 2018
4
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
ELECTRICAL CHARACTERISTICS
(VCCA = 1.65V to 5.5V, VCCB = 2.3V to 5.5V, Full = -40℃ to +85℃, typical values are at TA = +25℃, unless otherwise noted.)
PARAMETER
CONDITIONS
TEMP
MIN
VCCA × 0.67
TYP
MAX
UNITS
ELECTRICAL CHARACTERISTICS
A Ports High Level Output Voltage (VOHA)
IOH = -20µA, VIB ≥ VCCB - 0.4V
Full
A Ports Low Level Output Voltage (VOLA)
IOL = 1mA, VIB ≤ 0.15V
Full
B Ports High Level Output Voltage (VOHB)
IOH = -20µA, VIA ≥ VCCA - 0.4V
Full
B Ports Low Level Output Voltage (VOLB)
IOL = 1mA, VIA ≤ 0.15V
Full
0.4
+25℃
±1
Full
±1.5
+25℃
±0.5
Full
±1
+25℃
±0.5
Input Leakage Current (II)
OE
A Ports
Power Off Leakage Current
(IOFF)
3-State Output Leakage
(IOZ)
B Ports
VCCA = 0V, VCCB = 0V to 5.5V
VCCA = 0V to 5.5V, VCCB = 0V
Quiescent Supply Current (ICCA)
Quiescent Supply Current (ICCB)
Quiescent Supply Current (ICCA + ICCB)
Quiescent Supply Current (ICCZA)
Quiescent Supply Current (ICCZB)
OE Input Capacitance (CI)
Input/Output Capacitance A Ports (CIO)
Input/Output Capacitance B Ports (CIO)
SG Micro Corp
www.sg-micro.com
VI = VO = OPEN,
IO = 0
VI = VO = OPEN,
IO = 0
VI = VCCI or 0V,
IO = 0, OE = 0V
VI = VCCI or 0V,
IO = 0, OE = 0V
VCCB × 0.67
V
μA
μA
Full
±1
+25℃
±0.5
Full
±1
VCCA = 1.65V to VCCB,
VCCB = 2.3V to 5.5V
Full
13
VCCA = 5.5V, VCCB = 0V
Full
13
VCCA = 0V, VCCB = 5.5V
Full
-1
VCCA = 1.65V to VCCB,
VCCB = 2.3V to 5.5V
Full
17
VCCA = 5.5V, VCCB = 0V
Full
-1
VCCA = 0V, VCCB = 5.5V
Full
8
Full
21
μA
Full
13
μA
Full
8
μA
A or B Ports OE = 0V
VI = VO = OPEN,
IO = 0
0.4
VCCA = 1.65V to VCCB,
VCCB = 2.3V to 5.5V
VCCA = 1.65V to VCCB,
VCCB = 2.3V to 5.5V
VCCA = 1.65V to VCCB,
VCCB = 2.3V to 5.5V
VCCA = 3.3V, VCCB = 3.3V
VCCA = 3.3V, VCCB = 3.3V
+25℃
6
+25℃
6
+25℃
6
μA
μA
μA
pF
pF
JUNE 2018
5
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
TIMING REQUIREMENTS
VCCB = 2.5V
VCCB = 3.3V
VCCB = 5V
TYP
TYP
TYP
Push-Pull Driving
24
24
24
Open-Drain Driving
2
2
2
PARAMETER
UNITS
(TA = +25℃, VCCA = 1.8V, unless otherwise noted.)
Data Rate
Pulse Duration (tW)
Push-Pull Driving
41
41
41
500
500
500
Push-Pull Driving
24
24
24
Open-Drain Driving
2
2
2
41
41
41
500
500
500
Push-Pull Driving
24
24
Open-Drain Driving
2
2
41
41
500
500
Open-Drain Driving
Data Inputs
Mbps
ns
(TA = +25℃, VCCA = 2.5V, unless otherwise noted.)
Data Rate
Pulse Duration (tW)
Push-Pull Driving
Open-Drain Driving
Data Inputs
Mbps
ns
(TA = +25℃, VCCA = 3.3V, unless otherwise noted.)
Data Rate
Pulse Duration (tW)
Push-Pull Driving
Open-Drain Driving
Data Inputs
Mbps
ns
(TA = +25℃, VCCA = 5V, unless otherwise noted.)
Data Rate
Pulse Duration (tW)
Push-Pull Driving
24
Open-Drain Driving
2
Push-Pull Driving
Open-Drain Driving
SG Micro Corp
www.sg-micro.com
Data Inputs
41
500
Mbps
ns
JUNE 2018
6
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
SWITCHING CHARACTERISTICS
(TA = +25℃, VCCA = 1.8V, unless otherwise noted.)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPHL
A
B
tPLH
TEST
CONDITIONS
VCCB = 3.3V
VCCB = 5V
TYP
TYP
TYP
Push-Pull Driving
3.5
3.5
5.1
Open-Drain Driving
56.2
27.0
27.9
Push-Pull Driving
5.1
4.5
4.4
142.7
119.8
92.1
Open-Drain Driving
tPHL
VCCB = 2.5V
Push-Pull Driving
3.0
2.8
3.4
Open-Drain Driving
25.6
25.3
25.4
Push-Pull Driving
3.7
3.2
2.6
Open-Drain Driving
B
A
55.1
49.4
48.0
tEN (tPZH & tPZL)
OE
A or B
28.4
24.6
22.5
tDIS (tPHZ & tPLZ)
OE
A or B
674
677
671
tPLH
trA
A Ports Rise Time
trB
B Ports Rise Time
tfA
A Ports Fall Time
tfB
B Ports Fall Time
Data Rate
Push-Pull Driving
7.2
8.1
9.1
Open-Drain Driving
12.3
11.3
10.1
Push-Pull Driving
7.2
6.1
5.4
Open-Drain Driving
99.3
72.9
36.7
Push-Pull Driving
5.7
5.9
6.9
Open-Drain Driving
3.8
3.6
3.6
Push-Pull Driving
7.9
7.8
8.4
Open-Drain Driving
3.5
8.4
5.0
Push-Pull Driving
24
24
24
Open-Drain Driving
2
2
2
VCCB = 2.5V
VCCB = 3.3V
VCCB = 5V
TYP
TYP
TYP
Push-Pull Driving
4.5
4.5
5.0
Open-Drain Driving
26.2
27.1
26.2
Push-Pull Driving
3.8
3.3
3.1
111.0
95.6
76.0
UNITS
ns
ns
ns
ns
ns
ns
ns
Mbps
SWITCHING CHARACTERISTICS (continued)
(TA = +25℃, VCCA = 2.5V, unless otherwise noted.)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPHL
A
B
tPLH
TEST
CONDITIONS
Open-Drain Driving
tPHL
Push-Pull Driving
4.2
4.0
4.1
Open-Drain Driving
25.8
25.5
25.6
Push-Pull Driving
3.7
3.5
3.6
Open-Drain Driving
B
A
52.7
50.6
49.8
tEN (tPZH & tPZL)
OE
A or B
21.6
17.4
15.5
tDIS (tPHZ & tPLZ)
OE
A or B
689
688
678
Push-Pull Driving
6.4
6.7
6.9
Open-Drain Driving
10.5
7.7
7.8
tPLH
trA
A Ports Rise Time
trB
B Ports Rise Time
tfA
A Ports Fall Time
tfB
B Ports Fall Time
Data Rate
SG Micro Corp
www.sg-micro.com
Push-Pull Driving
6.2
5.4
4.9
Open-Drain Driving
67.0
50.9
30.5
Push-Pull Driving
8.6
8.2
7.3
Open-Drain Driving
3.6
3.3
3.1
Push-Pull Driving
8.5
7.7
8.1
Open-Drain Driving
3.4
3.9
5.4
Push-Pull Driving
24
24
24
Open-Drain Driving
2
2
2
UNITS
ns
ns
ns
ns
ns
ns
ns
Mbps
JUNE 2018
7
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
SWITCHING CHARACTERISTICS (continued)
(TA = +25℃, VCCA = 3.3V, unless otherwise noted.)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
tPHL
A
B
tPLH
tPHL
VCCB = 3.3V
VCCB = 5V
TYP
TYP
Push-Pull Driving
4.4
5.0
Open-Drain Driving
25.5
27.5
Push-Pull Driving
3.5
2.7
Open-Drain Driving
52.4
51.4
Push-Pull Driving
4.1
4.4
Open-Drain Driving
25.8
54.3
Push-Pull Driving
3.1
2.8
Open-Drain Driving
B
A
50.3
49.4
tEN (tPZH & tPZL)
OE
A or B
15.9
13.8
tDIS (tPHZ & tPLZ)
OE
A or B
699
678
tPLH
trA
A Ports Rise Time
trB
B Ports Rise Time
tfA
A Ports Fall Time
tfB
B Ports Fall Time
Data Rate
Push-Pull Driving
5.2
6.2
Open-Drain Driving
6.3
6.2
Push-Pull Driving
5.3
4.7
Open-Drain Driving
8.3
6.8
Push-Pull Driving
7.3
7.6
Open-Drain Driving
3.1
3.0
Push-Pull Driving
7.7
7.3
Open-Drain Driving
3.8
4.6
Push-Pull Driving
24
24
Open-Drain Driving
2
2
UNITS
ns
ns
ns
ns
ns
ns
ns
Mbps
SWITCHING CHARACTERISTICS (continued)
(TA = +25℃, VCCA = 5V, unless otherwise noted.)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPHL
A
B
tPLH
tPHL
TEST
CONDITIONS
VCCB = 5V
TYP
Push-Pull Driving
5.3
Open-Drain Driving
27.4
Push-Pull Driving
2.4
Open-Drain Driving
50.6
Push-Pull Driving
5.0
Open-Drain Driving
26.3
Push-Pull Driving
2.2
B
A
tEN (tPZH & tPZL)
OE
A or B
22.6
tDIS (tPHZ & tPLZ)
OE
A or B
665
tPLH
Open-Drain Driving
trA
A Ports Rise Time
trB
B Ports Rise Time
tfA
A Ports Fall Time
tfB
B Ports Fall Time
Data Rate
SG Micro Corp
www.sg-micro.com
UNITS
ns
ns
49.3
Push-Pull Driving
5.3
Open-Drain Driving
5.0
Push-Pull Driving
4.9
Open-Drain Driving
6.5
Push-Pull Driving
8.5
Open-Drain Driving
2.8
Push-Pull Driving
7.7
Open-Drain Driving
4.2
Push-Pull Driving
24
Open-Drain Driving
2
ns
ns
ns
ns
ns
Mbps
JUNE 2018
8
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
FUNCTIONAL BLOCK DIAGRAM
VCCB
VCCA
OE
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
10kΩ
10kΩ
B1
A1
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
10kΩ
10kΩ
A2
B2
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
10kΩ
10kΩ
A3
B3
One-Shot
Accelerator
10kΩ
One-Shot
Accelerator
Gate Bias
A4
10kΩ
B4
Figure 2. Block Diagram
SG Micro Corp
www.sg-micro.com
JUNE 2018
9
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
PARAMETER MEASUREMENT INFORMATION
VCCI
VCCI
VCCO
VCCO
DUT
DUT
IN
IN
OUT
15pF
OUT
15pF
1MΩ
1MΩ
Data Rate (10pF), Pulse Duration (10pF),
Propagation Delay, Output Rise-Time and Fall-Time
Measurement Using An Open-Drain Driver
Data Rate, Pulse Duration, Propagation Delay,
Output Rise-Time and Fall-Time Measurement
Using A Push-Pull Driver
2 × VCCO
50kΩ
S1
Open
From Output
Under Test
15pF
50kΩ
Load Circuit for Enable/Disable
Time Measurement
TEST
tPZL/tPLZ (tDIS)
tPHZ/tPZH (tEN)
S1
2 × VCCO
Open
tW
VCCI
Input
VCCI/2
VCCI/2
VCCA
0V
OE Input
Voltage Waveforms
Pulse Duration
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VCCO/2
VCCA/2
0V
0.9 × VCCO
0.1 × VCCO
tr
VOH
VCCO/2
VOL
tf
Voltage Waveforms
Propagation Delay Times
tPLZ
tPZL
VCCI
Input
VCCA/2
VOH
Output Waveform 1
S1 at 2 × VCCO
(see Note 2)
VCCO/2
VOH × 0.1
VOL
tPHZ
tPZH
Output Waveform 2
S1 at GND
(see Note 2)
VCCO/2
VOH × 0.9
VOH
0V
Voltage Waveforms
Enable and Disable Times
Figure 3. Load Circuits and Voltage Waveforms
NOTES:
1. CL includes probe and jig capacitance.
2. Waveform 1 is for an output with internal such that the output is high, except when OE is high. Waveform 2 is for an output with
conditions such that the output is low, except when OE is high.
3. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10MHz, ZO = 50Ω, dv/dt ≥ 1V/ns.
4. The outputs are measured one at a time, with one transition per measurement.
5. tPLZ and tPHZ are the same as tDIS.
6. tPZL and tPZH are the same as tEN.
7. tPLH and tPHL are the same as tPD.
8. VCCI is the VCC associated with the input ports.
9. VCCO is the VCC associated with the output ports.
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4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
DETAILED DESCRIPTION
Overview
The SGM4574 is a directionless voltage-level translator
specifically designed for translating logic voltage levels.
The A ports are able to accept I/O voltages ranging
from 1.65V to 5.5V, while the B ports can accept I/O
voltages from 2.3V to 5.5V. The device is a pass gate
architecture with edge rate accelerators (one-shots) to
improve the overall data rate. 10kΩ pull-up resistors,
commonly used in open-drain applications, have been
conveniently integrated so that an external resistor is
not needed. While this device is designed for
open-drain applications, the device can also translate
push-pull CMOS logic outputs.
Architecture
The SGM4574 architecture (see Figure 4) does not
require a direction-control signal in order to control the
direction of data flow from A to B or from B to A.
VCCB
VCCA
T1
One-Shot
One-Shot
T2
Input Driver Requirements
The fall time (tfA, tfB) of a signal depends on the output
impedance of the external device driving the data I/Os
of the SGM4574. Similarly, the tPHL and data rates also
depend on the output impedance of the external driver.
The values for tfA, tfB, tPHL, and data rates in the
datasheet assume that the output impedance of the
external driver is less than 50Ω.
Power Up
During operation, ensure that VCCA ≤ VCCB at all times.
During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be
ramped up first.
Enable and Disable
The SGM4574 has an OE input that disables the device
by setting OE low, which places all I/Os in the
high-impedance state. The disable time (tDIS) indicates
the delay between the time when the OE pin goes low
and when the outputs actually enter the highimpedance state. The enable time (tEN) indicates the
amount of time the user must allow for the one-shot
circuitry to become operational after the OE pin is taken
high.
Pull-Up or Pull-Down Resistors on I/O Lines
10kΩ
10kΩ
Gate Bias
A
B
Figure 4. Architecture of a SGM4574 Cell
Each A port I/O has an internal 10kΩ pull-up resistor to
VCCA, and each B port I/O has an internal 10kΩ pull-up
resistor to VCCB. The output one-shots detect rising
edges on the A or B ports. During a rising edge, the
one-shot turns on the PMOS transistors (T1, T2) for a
short duration which speeds up the low-to-high
transition.
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Each A port I/O has an internal 10kΩ pull-up resistor to
VCCA, and each B port I/O has an internal 10kΩ pull-up
resistor to VCCB. If a smaller value of pull-up resistor is
required, an external resistor must be added from the
I/O to VCCA or VCCB (in parallel with the internal 10kΩ
resistors).
Device Functional Modes
The SGM4574 has two functional modes, enabled and
disabled. To disable the device set the OE input low,
which places all I/Os in a high impedance state. Setting
the OE input high will enable the device.
JUNE 2018
11
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
SGM4574
APPLICATION INFORMATION
The SGM4574 can be used in level-translation
applications for interfacing devices or systems
operating at different interface voltages with one
another. The SGM4574 is ideal for use in applications
where an open-drain driver is connected to the data
I/Os. The SGM4574 can also be used in applications
where a push-pull driver is connected to the data I/Os,
but the SGM4574 might be a better option for such
push-pull applications.
Design Requirements
For this design example, use the parameters listed in
Table 1.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input Voltage Range
1.65V to 5.5V
Output Voltage Range
2.3V to 5.5V
Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
Use the supply voltage of the device that is driving the
SGM4574 to determine the input voltage range. For a
valid logic high the value must exceed the VIH of the
input port. For a valid logic low the value must be less
than the VIL of the input port.
Power-Supply Recommendations
The SGM4574 uses two separate configurable powersupply rails, VCCA and VCCB. VCCB accepts any supply
voltage from 2.3V to 5.5V and VCCA accepts any supply
voltage from 1.65V to 5.5V as long as VS is less than or
equal to VCCB. The A ports and B ports are designed to
track VCCA and VCCB respectively allowing for lowvoltage bidirectional translation between any of the
1.8V, 2.5V, 3.3V and 5V voltage nodes.
The SGM4574 does not require power sequencing
between VCCA and VCCB during power-up so the
power-supply rails can be ramped in any order. A VCCA
value greater than or equal to VCCB (VCCA ≥ VCCB) does
not damage the device, but during operation, VCCA must
be less than or equal to VCCB (VCCA ≤ VCCB) at all times.
The output-enable (OE) input circuit is designed so that
it is supplied by VCCA and when the (OE) input is low, all
outputs are placed in the high-impedance state. To
ensure the high-impedance state of the outputs during
power up or power down, the OE input pin must be tied
to GND through a pull-down resistor and must not be
enabled until VCCA and VCCB are fully ramped and stable.
The minimum value of the pull-down resistor to ground
is determined by the current-sourcing capability of the
driver.
Layout Guidelines
• Output voltage range
Use the supply voltage of the device that the SGM4574
is driving to determine the output voltage range.
To ensure reliability of the device, following common
printed-circuit board layout guidelines is recommended.
The SGM4574 has 10kΩ internal pull-up resistors.
External pull-up resistors can be added to reduce the
total RC of a signal trace if necessary.
• Short trace lengths should be used to avoid excessive
loading.
• An external pull-down resistor decreases the output
VOH and VOL. Use Equation 1 to calculate the VOH as a
result of an external pull-down resistor.
VOH = VCCX × RPD/(RPD + 10kΩ)
where,
VCCX is the supply voltage on either VCCA or VCCB.
RPD is the value of the external pull down resistor.
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(1)
• Bypass capacitors should be used on power supplies.
• PCB signal trace-lengths must be kept short enough
so that the round-trip delay of any reflection is less than
the one-shot duration, approximately 30ns, ensuring
that any reflection encounters low impedance at the
source driver.
• Placing pads on the signal paths for loading
capacitors or pull-up resistors to help adjust rise and fall
times of signals depending on the system requirements.
JUNE 2018
12
SGM4574
4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (JUNE 2018) to REV.A
Changed from product preview to production data ............................................................................................................................................. All
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JUNE 2018
13
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
TQFN-2×2-12L
PIN #1 DOT
BY MARKING
2.000± 0.050
0.400 Bsc
PIN #1
IDENTIFICATION
0.300± 0.050
0.200± 0.050
2.000± 0.050
0.900± 0.050
C0.12× 45° (× 8)
0.900± 0.050
BOTTOM VIEW
TOP VIEW
0.9
0.6
0.750± 0.050
0.9 1.4 2.6
0.000-0.050
0.203 Ref
SIDE VIEW
0.2
0.4
RECOMMENDED LAND PATTERN
NOTE: All linear dimensions are in millimeters.
SG Micro Corp
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TX00075.000
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
UTQFN-1.8×1.8-12L
PIN #1 DOT
BY MARKING
PIN #1 IDENTIFICATION
CHAMFER 0.100×45°
0.200± 0.050
1.800± 0.050
N12
N1
1.800± 0.050
0.425± 0.050
0.400 Bsc
0.400± 0.050
(× 11)
1.200 Ref
BOTTOM VIEW
TOP VIEW
2.55
0.75
2.55
0.550± 0.050
0.40
0.000-0.050
0.152 Ref
SIDE VIEW
0.20
RECOMMENDED LAND PATTERN
NOTE: All linear dimensions are in millimeters.
SG Micro Corp
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TX00092.000
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
SOIC-14
D
E
5.2
E1
2.2
e
b
0.6
1.27
RECOMMENDED LAND PATTERN (Unit: mm)
L1
R1
R
A3
A A2
h
L2
θ
A1
Symbol
h
L
Dimensions
In Millimeters
MIN
MAX
Dimensions
In Inches
MIN
MAX
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
A2
1.25
1.65
0.049
0.065
A3
0.55
0.75
0.022
0.030
b
0.36
0.49
0.014
0.019
D
8.53
8.73
0.336
0.344
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
e
L
1.27 BSC
0.45
L1
0.80
0.018
1.04 REF
L2
0.157
0.050 BSC
0.032
0.040 REF
0.25 BSC
0.01 BSC
R
0.07
0.003
R1
0.07
0.003
h
0.30
0.50
0.012
0.020
θ
0°
8°
0°
8°
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TX00011.001
PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
W
P0
Q1
Q2
Q1
Q2
Q1
Q2
Q3
Q4
Q3
Q4
Q3
Q4
B0
Reel Diameter
A0
P1
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel
Diameter
Reel Width
W1
(mm)
A0
(mm)
B0
(mm)
K0
(mm)
P0
(mm)
P1
(mm)
P2
(mm)
W
(mm)
Pin1
Quadrant
TQFN-2×2-12L
7″
9.5
2.30
2.30
0.90
4.0
4.0
2.0
8.0
Q2
UTQFN-1.8×1.8-12L
7″
9.0
2.10
2.10
0.80
4.0
4.0
2.0
8.0
Q2
SOIC-14
13″
16.4
6.60
9.30
2.10
4.0
8.0
2.0
16.0
Q1
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TX10000.000
DD0001
Package Type
PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Pizza/Carton
7″ (Option)
368
227
224
8
7″
442
410
224
18
13″
386
280
370
5
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DD0002
Reel Type
TX20000.000
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