S-8232 Series
BATTERY PROTECTION IC
FOR 2-SERIAL-CELL PACK
www.sii-ic.com
Rev.6.2_00
© Seiko Instruments Inc., 1999-2015
The S-8232 series is a lithium-ion / lithium-polymer rechargeable battery protection IC incorporating highaccuracy voltage detection circuit and delay circuit.
The S-8232 series is suitable for 2-cell serial lithium-ion / lithium-polymer battery packs.
Features
(1) Internal high-accuracy voltage detection circuit
• Overcharge detection voltage
3.85 V ± 25 mV to 4.60 V ± 25 mV
Applicable in 5 mV step
• Overcharge release voltage
3.60 V ± 50 mV to 4.60 V ± 50 mV
Applicable in 5 mV step
(The overcharge release voltage can be selected within the range where a difference from overcharge
detection voltage is 0 V to 0.3 V.)
• Overdischarge detection voltage 1.70 V ± 80 mV to 2.60 V ± 80 mV
Applicable in 50 mV step
• Overdischarge release voltage
1.70 V ± 100 mV to 3.80 V ± 100 mV Applicable in 50 mV step
(The overdischarge release voltage can be selected within the range where a difference from
overdischarge detection voltage is 0 V to 1.2 V.)
• Overcurrent detection voltage 1 0.07 V ± 20 mV to 0.30 V ± 20 mV
Applicable in 5 mV step
(2) High input-voltage device : Absolute maximum ratings 18 V.
(3) Wide operating voltage range : 2.0 V to 16 V
(4) The delay time for every detection can be set via an external capacitor.
(Each delay time for Overcharge detection, Overdischarge detection, Overcurrent detection are
“Proportion of hundred to ten to one”.)
(5) Two overcurrent detection levels (Protection for short-circuiting)
(6) Internal auxiliary over voltage detection circuit (Fail-safe for overcharge detection voltage)
(7) Internal charge circuit for 0 V battery (Unavailable is option)
(8) Low current consumption
• Operation mode
7.5 μA typ. 14.2 μA max. (− 40°C to + 85°C)
• Power-down mode 0.2 nA typ. 0.1 μA max. (− 40°C to + 85°C)
*1
(9) Lead-free, Sn100%, halogen-free
*1. Refer to “ Product Name Structure” for details.
Applications
• Lithium-ion rechargeable battery packs
• Lithium- polymer rechargeable battery packs
Package
• 8-Pin TSSOP
Seiko Instruments Inc.
1
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Block Diagram
VCC
SENS
Reference
voltage 1
−
+
−
+
−
+
Auxiliary
overcharge
detector 1
Overcharge
detector 1
Overdischarge
detector 1
DO
Delay circuit
control signal
Control
logic
VC
+
−
+
−
RCOL
Overcharge
detector 2
Over current
detection circuit
Delay circuit control signal
+
−
VSS
CO
Overdischarge
detector 2
Auxiliary
overcharge
Reference
detector 2
voltage 2
Delay circuit
control signal
VM
Delay circuit
control signal
Delay circuit
ICT
DO, CO control signal
Remark Resistor (RCOL) is connected to the Nch transistor although CO pin serves as a CMOS output.
For this, impedance becomes high when outputting “L” from CO pin. Refer to the “ Electrical
Characteristics” for the impedance value.
Figure 1
2
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
Product Name Structure
1. Product Name
S-8232 xx FT - T2 - x
Environmental code
U: Lead-free (Sn 100%), halogen-free
S: Lead-free, halogen-free
G: Lead-free (for details, please contact our sales office)
IC direction in tape specifications *1
Package code
FT : 8-Pin TSSOP
Serial code
Sequentially set from AA to ZZ
*1. Refer to the tape specifications.
2. Package
Package Name
8-Pin TSSOP
Package
FT008-A-P-SD
Drawing Code
Tape
FT008-E-C-SD
Seiko Instruments Inc.
Reel
FT008-E-R-SD
3
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
3. Product Name List
Table 1 (1 / 2)
Overcharge
detection
voltage 1, 2
[VCU]
Overcharge
release voltage 1, 2
[VCD]
Overdischarge
detection
voltage 1, 2
[VDD]
S-8232AAFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.40 V ± 80 mV
Overcharge
detection
0 V battery
delay time
charging
[tCU]
function
(C3 = 0.22 μF)
3.00 V ± 100 mV 0.150 V ± 20 mV
1.0 s
Available
S-8232ABFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.30 V ± 80 mV
3.00 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Available
S-8232ACFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.30 V ± 80 mV
3.00 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Unavailable
S-8232AEFT-T2-x
4.35 V ± 25 mV
4.28 V ± 50 mV
2.15 V ± 80 mV
2.80 V ± 100 mV 0.100 V ± 20 mV
1.0 s
Available
S-8232AFFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
2.70 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Available
S-8232AGFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.20 V ± 80 mV
2.40 V ± 100 mV 0.200 V ± 20 mV
1.0 s
Available
S-8232AHFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.20 V ± 80 mV
2.40 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Available
Product name
*1 *2
Overdischarge
release
voltage1, 2
[VDU]
Overcurrent
detection
voltage 1
[VIOV1]
S-8232AIFT-T2-x
4.325 V ± 25 mV 4.325 V ± 25 mV
2.40 V ± 80 mV
3.00 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Unavailable
S-8232AJFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.40 V ± 80 mV
3.00 V ± 100 mV 0.150 V ± 20 mV
1.0 s
Unavailable
S-8232AKFT-T2-x
4.20 V ± 25 mV
4.00 V ± 50 mV
2.30 V ± 80 mV
2.90 V ± 100 mV 0.200 V ± 20 mV
1.0 s
Available
S-8232ALFT-T2-x
4.30 V ± 25 mV
4.05 V ± 50 mV
2.00 V ± 80 mV
3.00 V ± 100 mV 0.200 V ± 20 mV
1.0 s
Available
2.00 V ± 80 mV
3.00 V ± 100 mV 0.190 V ± 20 mV
1.0 s
Available
*1 *3
4.325 V ± 25 mV 4.325 V ± 25 mV
2.40 V ± 80 mV
3.00 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Unavailable
S-8232AMFT-T2-x
S-8232ANFT-T2-x
4.19 V ± 25 mV
*1
4.19 V ± 25 mV
S-8232AOFT-T2-x
4.30 V ± 25 mV
4.05 V ± 50 mV
2.00 V ± 80 mV
3.00 V ± 100 mV 0.230 V ± 20 mV
1.0 s
Available
S-8232APFT-T2-x
4.28 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
2.90 V ± 100 mV 0.100 V ± 20 mV
1.0 s
Unavailable
*1 *3
4.325 V ± 25 mV 4.325 V ± 25 mV
2.00 V ± 80 mV
2.50 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Unavailable
4.20 V ± 50 mV*3
2.30 V ± 80 mV
3.00 V ± 100 mV 0.300 V ± 20 mV
1.0 s
Unavailable
S-8232ARFT-T2-x
*4
S-8232ASFT-T2-x
4.295 V ± 25 mV
*1
S-8232ATFT-T2-x
4.125 V ± 25 mV 4.125 V ± 25 mV
2.00 V ± 80 mV
3.00 V ± 100 mV 0.190 V ± 20 mV
1.0 s
Available
S-8232AUFT-T2-x
4.30 V ± 25 mV
4.10 V ± 50 mV
2.40 V ± 80 mV
3.00 V ± 100 mV 0.200 V ± 20 mV
1.0 s
Unavailable
S-8232AVFT-T2-x
4.30 V ± 25 mV
4.05 V ± 50 mV
2.00 V ± 80 mV
3.00 V ± 100 mV
0.300 V ± 20mV
1.0 s
Available
S-8232AWFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.30 V ± 80 mV
3.00 V ± 100 mV 0.150 V ± 20 mV
1.0 s
Unavailable
S-8232AXFT-T2-x
4.325 V ± 25 mV
4.200 V ± 50 mV
2.30 V ± 80 mV
3.00 V ± 100 mV
0.20 V ± 20 mV
1.0 s
Unavailable
S-8232AYFT-T2-x
4.30 V ± 25 mV
4.05 V ± 50 mV
2.00 V ± 80 mV
2.00 V ± 80 mV
0.20 V ± 20 mV
1.0 s
Available
4.30 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
2.30 V ± 80 mV
0.20 V ± 20 mV
1.0 s
Available
0.15 V ± 20 mV
1.0 s
Unavailable
S-8232AZFT-T2-x
S-8232NAFT-T2-x
*1 *3
4.325 V ± 25 mV 4.325 V ± 25 mV
2.40 V ± 80 mV 3.00 V ± 100 mV
S-8232NBFT-T2-x
4.35 V ± 25 mV
4.25 V ± 50 mV
3.00 V ± 80 mV
3.70 V ± 100 mV
0.30 V ± 20 mV
1.0 s
Unavailable
S-8232NCFT-T2-x
4.275 V ± 25 mV
4.05 V ± 50 mV
2.20 V ± 80 mV
3.00 V ± 100 mV
0.20 V ± 20 mV
1.0 s
Unavailable
S-8232NDFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.30 V ± 80 mV
2.30 V ± 80 mV
0.15 V ± 20 mV
1.0 s
Available
S-8232NEFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.30 V ± 80 mV
3.00 V ± 100 mV
0.23 V ± 20 mV
1.0 s
Available
*3
S-8232NFFT-T2-x
4.325 V ± 25 mV
4.1 V ± 50 mV
2.30 V ± 80 mV
2.90 V ± 100 mV
0.21 V ± 20 mV
1.0 s
Unavailable
S-8232NGFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.60 V ± 80 mV
3.00 V ± 100 mV
0.30 V ± 20 mV
1.0 s
Available
S-8232NHFT-T2-x
4.28 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
2.90 V ± 100 mV
0.11 V ± 20 mV
1.0 s
Unavailable
S-8232NIFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV*3
2.50 V ± 80 mV
3.00 V ± 100 mV
0.15 V ± 20 mV
1.0 s
Unavailable
S-8232NJFT-T2-x
4.28 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
2.90 V ± 100 mV
0.11 V ± 20 mV
1.0 s
Available
S-8232NKFT-T2-x
4.35 V ± 25 mV
4.15 V ± 50 mV
2.30 V ± 80 mV
2.30 V ± 80 mV
0.12 V ± 20 mV
1.0 s
Available
S-8232NLFT-T2-x
4.30 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
3.00 V ± 100 mV
0.23 V ± 20 mV
1.0 s
Available
S-8232NMFT-T2-x
4.28 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV
2.90 V ± 100 mV
0.08 V ± 20 mV
1.0 s
Available
4
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
Table 1 (2 / 2)
Overcharge
detection
voltage 1, 2
[VCU]
Overcharge
release voltage 1, 2
[VCD]
S-8232NNFT-T2-x
4.28 V ± 25 mV
4.08 V ± 50 mV*3
2.20 V ± 80 mV 2.40 V ± 100 mV
Overcharge
detection
0 V battery
delay time
charging
[tCU]
function
(C3 = 0.22 μF)
0.13 V ± 20 mV
1.0 s
Unavailable
S-8232NOFT-T2-x
4.295 V ± 25 mV
4.045 V ± 50 mV*3
2.20 V ± 80 mV 2.40 V ± 100 mV
0.13 V ± 20 mV
1.0 s
Unavailable
S-8232NPFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.30 V ± 80 mV 3.00 V ± 100 mV
0.30 V ± 20 mV
1.0 s
Unavailable
S-8232NQFT-T2-x
4.25 V ± 25 mV
4.05 V ± 50 mV
2.60 V ± 80 mV 3.00 V ± 100 mV
0.30 V ± 20 mV
1.0 s
Unavailable
S-8232NRFT-T2-x
4.15 V ± 25 mV
3.95 V ± 50 mV
2.60 V ± 80 mV 3.00 V ± 100 mV
0.30 V ± 20 mV
1.0 s
Unavailable
S-8232NSFT-T2-x
4.15 V ± 25 mV
3.95 V ± 50 mV
2.30 V ± 80 mV 3.00 V ± 100 mV
0.30 V ± 20 mV
1.0 s
Unavailable
S-8232NTFT-T2-x
4.225 V ± 25 mV
4.15 V ± 50 mV
2.00 V ± 80 mV
2.00 V ± 80 mV
0.09 V ± 20 mV
1.0 s
Unavailable
S-8232NUFT-T2-x
3.85 V ± 25 mV
3.75 V ± 50 mV
2.23 V ± 80 mV
2.23 V ± 80 mV
0.15 V ± 20 mV
1.0 s
Available
S-8232NWFT-T2-x
S-8232NXFT-T2-x
S-8232NYFT-T2-x
S-8232NZFT-T2-x
S-8232PAFT-T2-x
S-8232PBFT-T2-y
S-8232PCFT-T2-x
S-8232PFFT-T2-U
4.21 V ± 25 mV
4.25 V ± 25 mV
4.25 V ± 25 mV
4.21 V ± 25 mV
4.305 V ± 25 mV
4.35 V ± 25 mV
4.21 V ± 25 mV
4.225 V ± 25 mV
4.125 V ± 50 mV
4.05 V ± 50 mV
4.15 V ± 50 mV
3.98 V ± 50 mV
4.125 V ± 50 mV
4.15 V ± 50 mV
4.00 V ± 50 mV
*2
4.025 V ± 50 mV
2.00 V ± 80 mV
2.80 V ± 80 mV
2.90 V ± 80 mV
2.30 V ± 80 mV
2.00 V ± 80 mV
2.30 V ± 80 mV
2.40 V ± 80 mV
2.70 V ± 80 mV
2.00 V ± 80 mV
3.10 V ± 100 mV
3.10 V ± 100 mV
2.90 V ± 100 mV
2.00 V ± 80 mV
3.00 V ± 100 mV
3.00 V ± 100 mV
3.40 V ± 100 mV
0.09 V ± 20 mV
0.30 V ± 20 mV
0.30 V ± 20 mV
0.11 V ± 20 mV
0.09 V ± 20 mV
0.20 V ± 20 mV
0.20 V ± 20 mV
0.15 V ± 20 mV
1.0 s
1.0 s
1.0 s
1.0 s
1.0 s
1.0 s
1.0 s
1.0 s
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
Product name
*1.
*2.
*3.
*4.
Overdischarge
detection
voltage 1, 2
[VDD]
Overdischarge
release
voltage1, 2
[VDU]
Overcurrent
detection
voltage 1
[VIOV1]
No overcharge detection / release hysteresis
The magnification of final overcharge is 1.11; the others are 1.25.
No final overcharging function
Refer to the *2 in the “ Operation”.
(Overcharge detection/release hysteresis”, “no final overcharge function”, and “0 V battery charge inhibiting
function)
Remark 1. Please contact our sales office for the products with detection voltage value other than those
specified above.
2. x: G or U
y: S or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
4. The overdischarge detection voltage can be selected within the range from 1.7 to 3.0 V. When the
overdischarge detection voltage is higher than 2.6 V, the overcharge detection voltage and the
overcharge release voltage are limited as “Table 2”.
Table 2
Overdischarge
detection voltage 1, 2
[VDD]
1.70 V to 2.60 V
1.70 V to 2.80 V
1.70 V to 3.00 V
Overcharge
detection voltage 1, 2
[VCU]
3.85 V to 4.60 V
3.85 V to 4.60 V
3.85 V to 4.50 V
Voltage difference between overcharge detection
voltage and overcharge release voltage
[VCU − VCD]
0 V to 0.30 V
0 V to 0.20 V
0 V to 0.10 V
Seiko Instruments Inc.
5
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Pin Configuration
Table 3
8-Pin TSSOP
Top view
SENS
DO
CO
VM
8
7
6
5
1
2
3
4
Figure 2
6
VCC
VC
ICT
VSS
Pin No.
Symbol
1
SENS
2
DO
3
CO
4
VM
5
6
7
8
VSS
ICT
VC
VCC
Description
Detection pin for voltage between VC and
SENS (Detection pin for overcharge and
overdischarge)
FET gate connection pin for discharge
control (CMOS output)
FET gate connection pin for charge control
(CMOS output)
Detection pin for voltage between VSS and
VM (Overcurrent detection pin)
Input pin for negative power supply
Capacitor connection pin for detection delay
Input pin for middle voltage
Input pin for positive power supply
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
Absolute Maximum Ratings
Table 4
Item
Input voltage between VCC and VSS
SENS input pin voltage
ICT input pin voltage
VM input pin voltage
DO output pin voltage
CO output pin voltage
Symbol
VDS
VSENS
VICT
VVM
VDO
VCO
Power dissipation
PD
Applied Pin
VCC
SENS
ICT
VM
DO
CO
⎯
Operating ambient temperature
Topr
⎯
Storage temperature
Tstg
⎯
*1. When mounted on board
[Mounted board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Name :
JEDEC STANDARD51-7
(Ta = 25°C unless otherwise specified)
Absolute Maximum Rating
Unit
V
VSS − 0.3 to VSS + 18
V
VSS − 0.3 to VCC + 0.3
V
VSS − 0.3 to VCC + 0.3
V
VCC − 18 to VCC + 0.3
V
VSS − 0.3 to VCC + 0.3
V
VVM − 0.3 to VCC + 0.3
300 (When not mounted on board) mW
700*1
mW
− 40 to + 85
°C
− 40 to + 125
°C
Power Dissipation (PD) [mW]
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
800
700
600
500
400
300
200
100
0
0
100
150
50
Ambient Temperature (Ta) [°C]
Figure 3 Power Dissipation of Package (When Mounted on Board)
Seiko Instruments Inc.
7
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Electrical Characteristics
Table 5
Item
Symbol
DETECTION VOLTAGE
Condition
3.85 V to 4.60 V,
Adjustable
Overcharge detection voltage 1, 2
VCU1, 2
Auxiliary overcharge detection voltage 1, 2 *1
VCUaux1, VCUaux2 = VCU1, VCU2 × 1.25 or
VCUaux1, VCUaux2 = VCU1, VCU2 × 1.11
VCUaux1, 2
VCU1, 2 × 1.25
VCUaux1, 2
VCU1, 2 × 1.11
Overcharge release voltage 1, 2
VCD1, 2
Overdischarge detection voltage 1, 2
VDD1, 2
Overdischarge release voltage 1, 2
VDU1, 2
Overcurrent detection voltage 1
VIOV1
Overcurrent detection voltage 2
VIOV2
Temperature coefficient 1 for detection voltage
Temperature coefficient 2 for detection voltage *3
DELAY TIME (C3 = 0.22 μF)
Overcharge detection delay time 1, 2
Overdischarge detection delay time 1, 2
Overcurrent detection delay time 1
INPUT VOLTAGE
*2
Input voltage between VCC and VSS
OPERATING VOLTAGE
Operating voltage between VCC and VSS *5
CURRENT CONSUMPTION
Current consumption during normal operation
Current consumption at power down
OUTPUT VOLTAGE
TCOE1
TCOE2
(Ta = 25°C unless otherwise specified)
Test Test
Min. Typ. Max. Unit
Condition Circuit
VCU1, 2
− 0.025
VCU1, 2
× 1.21
VCU1, 2
× 1.07
VCD1, 2
− 0.050
VDD1, 2
− 0.080
VDU1, 2
− 0.100
VIOV1
− 0.020
VCU1, 2 VCU1, 2
+ 0.025
VCU1, 2 VCU1, 2
× 1.25 × 1.29
VCU1, 2 VCU1, 2
× 1.11 × 1.15
VCD1, 2 VCD1, 2
+ 0.050
VDD1, 2 VDD1 ,2
+ 0.080
VDU1, 2 VDU1, 2
+ 0.100
VIOV1 VIOV1
+ 0.020
V
1, 2
1
V
1, 2
1
V
1, 2
1
1, 2
1
1, 2
1
1, 2
1
3
1
3
1
⎯
⎯
⎯
⎯
3.60 V to 4.60 V,
V
Adjustable
1.70 V to 2.60 V,
V
Adjustable
1.70 V to 3.80 V,
V
Adjustable
0.07 V to 0.30 V,
V
Adjustable
Load short circuit,
− 1.57 − 1.20 − 0.83
V
VCC reference
*4
− 0.6
0
0.6 mV/°C
Ta = − 40°C to + 85°C
0
mV/°C
Ta = − 40°C to + 85°C *4 − 0.24 − 0.05
tCU1, 2
tDD1, 2
tIOV1
1.0 s
0.1 s
0.01 s
0.73
68
6.7
1.00
100
10
1.35
138
13.9
s
ms
ms
8, 9
8, 9
10
5
5
5
VDS
Absolute maximum
rating
− 0.3
⎯
18
V
⎯
⎯
VDSOP
Output logic fixed
2.0
⎯
16
V
⎯
⎯
IOPE
IPDN
V1 = V2 = 3.6 V
V1 = V2 = 1.5 V
2.1
0
7.5
0.0002
12.7
0.04
μA
μA
4
4
2
2
V
6
3
V
6
3
V
7
4
VCC
VCC
VCC
− 0.05 − 0.003
VSS
VSS
VSS
+ 0.003 + 0.05
VCC
VCC
VCC
− 0.15 − 0.019
DO voltage “H”
VDO(H)
IOUT = 10 μA
DO voltage “L”
VDO(L)
IOUT = 10 μA
CO voltage “H”
VCO(H)
IOUT = 10 μA
RCOL
VCO − VVM = 9.4 V
0.29
0.6
1.44
MΩ
7
4
RVCM
RVSM
VCC − VVM = 0.5 V
VVM − VSS = 1.1 V
105
511
240
597
575
977
kΩ
kΩ
5
5
2
2
CO PIN INTERNAL RESISTANCE
Resistance between VM and CO
INTERNAL RESISTANCE
Resistance between VCC and VM
Resistance between VSS and VM
0 V BATTERY CHARGE FUNCTION
0 V battery charging
0.38
0.75
1.12
V
11
6
function “available”
0 V battery charging
0 V battery charge inhibition battery voltage 1, 2 V0INH1, 2 function
0.88
1.44
V
12, 13
6
“unavailable” 0.32
*1. Auxiliary overcharge detection voltage is equal to the overcharge detection voltage times 1.11 for the
products without overcharge hysteresis, and times 1.25 for other products.
*2. Temperature coefficient 1 for detection voltage should be applied to overcharge detection voltage,
overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage.
*3. Temperature coefficient 2 for detection voltage should be applied to overcurrent detection voltage.
*4. Since products are not screened at high and low temperature, the specification for this temperature range is
guaranteed by design, not tested in production.
*5. The DO and CO pin logic are established at the operating voltage.
0 V battery charge starting charger voltage
8
V0CHA
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
Table 6
(Ta = − 20°C to + 70°C unless otherwise specified *1)
Test Test
Symbol
Condition
Min. Typ. Max. Unit Condition Circuit
Item
DETECTION VOLTAGE
3.85 V to 4.60 V,
Adjustable
Overcharge detection voltage 1, 2
VCU1, 2
Auxiliary overcharge detection voltage 1, 2 *2
VCUaux1, VCUaux2 = VCU1, VCU2 × 1.25 or
VCUaux1, VCUaux2 = VCU1, VCU2 × 1.11
VCUaux1, 2
VCU1, 2 × 1.25
VCUaux1, 2
VCU1, 2 × 1.11
Overcharge release voltage 1, 2
VCD1, 2
Overdischarge detection voltage 1, 2
VDD1, 2
Overdischarge release voltage 1, 2
VDU1, 2
Overcurrent detection voltage 1
VIOV1
Overcurrent detection voltage 2
VIOV2
Temperature coefficient 1 for detection voltage
Temperature coefficient 2 for detection voltage *4
DELAY TIME (C3 = 0.22 μF)
Overcharge detection delay time 1, 2
Overdischarge detection delay time 1, 2
Overcurrent detection delay time 1
INPUT VOLTAGE
*3
Input voltage between VCC and VSS
OPERATING VOLTAGE
Operating voltage between VCC and VSS *5
CURRENT CONSUMPTION
Current consumption during normal operation
Current consumption at power down
OUTPUT VOLTAGE
TCOE1
TCOE2
VCU1, 2
− 0.045
VCU1, 2
× 1.19
VCU1, 2
× 1.05
VCD1, 2
− 0.070
VDD1, 2
− 0.100
VDU1, 2
− 0.120
VIOV1
− 0.029
VCU1, 2 VCU1, 2
+ 0.040
VCU1, 2 VCU1, 2
× 1.25 × 1.31
VCU1, 2 VCU1, 2
× 1.11 × 1.17
VCD1, 2 VCD1, 2
+ 0.065
VDD1, 2 VDD1 ,2
+ 0.095
VDU1, 2 VDU1, 2
+ 0.115
VIOV1 VIOV1
+ 0.029
V
1, 2
1
V
1, 2
1
V
1, 2
1
1, 2
1
1, 2
1
1, 2
1
3
1
3
1
⎯
⎯
⎯
⎯
3.60 V to 4.60 V,
V
Adjustable
1.70 V to 2.60 V,
V
Adjustable
1.70 V to 3.80 V,
V
Adjustable
0.07 V to 0.30 V,
V
Adjustable
Load short circuit,
− 1.66 − 1.20 − 0.74
V
VCC reference
*1
0
0.6 mV/°C
Ta = − 40°C to + 85°C − 0.6
0
mV/°C
Ta = − 40°C to + 85°C *1 − 0.24 − 0.05
tCU1, 2
tDD1, 2
tIOV1
1.0 s
0.1 s
0.01 s
0.60
67
6.5
1.00
100
10
1.84
140
14.5
s
ms
ms
8, 9
8, 9
10
5
5
5
VDS
Absolute maximum
rating
− 0.3
⎯
18
V
⎯
⎯
VDSOP
Output logic fixed
2.0
⎯
16
V
⎯
⎯
IOPE
IPDN
V1 = V2 = 3.6 V
V1 = V2 = 1.5 V
1.9
0
7.5
0.0002
13.8
0.06
μA
μA
4
4
2
2
V
6
3
V
6
3
V
7
4
VCC
VCC
VCC
− 0.14 − 0.003
VSS
VSS
VSS
+ 0.003 + 0.14
VCC
VCC
VCC
− 0.24 − 0.019
DO voltage “H”
VDO(H)
IOUT = 10 μA
DO voltage “L”
VDO(L)
IOUT = 10 μA
CO voltage “H”
VCO(H)
IOUT = 10 μA
RCOL
VCO − VVM = 9.4 V
0.24
0.6
1.96
MΩ
7
4
RVCM
RVSM
VCC − VVM = 0.5 V
VVM − VSS = 1.1 V
86
418
240
597
785
1332
kΩ
kΩ
5
5
2
2
CO PIN INTERNAL RESISTANCE
Resistance between VM and CO
INTERNAL RESISTANCE
Resistance between VCC and VM
Resistance between VSS and VM
0 V BATTERY CHARGE FUNCTION
0 V battery charging
0.29
0.75
1.21
V
11
6
function “available”
0 V battery charging
0 V battery charge inhibition battery voltage 1, 2 V0INH1, 2 function
0.88
1.53
V
12, 13
6
“unavailable” 0.23
*1. Since products are not screened at high and low temperature, the specification for this temperature range is
guaranteed by design, not tested in production.
*2. Auxiliary overcharge detection voltage is equal to the overcharge detection voltage times 1.11 for the
products without overcharge hysteresis, and times 1.25 for other products.
*3. Temperature coefficient 1 for detection voltage should be applied to overcharge detection voltage,
overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage.
*4. Temperature coefficient 2 for detection voltage should be applied to overcurrent detection voltage.
*5. The DO pin and CO pin logic are established at the operating voltage.
0 V battery charge starting charger voltage
V0CHA
Seiko Instruments Inc.
9
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Table 7
Item
Symbol
DETECTION VOLTAGE
(Ta = − 40°C to +85°C unless otherwise specified *1)
Test Test
Condition
Min.
Typ.
Max.
Unit Condition Circuit
3.85 V to 4.60 V,
Adjustable
Overcharge detection voltage 1, 2
VCU1, 2
Auxiliary overcharge detection voltage 1, 2 *2
VCUaux1, VCUaux2 = VCU1, VCU2 × 1.25 or
VCUaux1, VCUaux2 = VCU1, VCU2 × 1.11
VCUaux1, 2
VCU1, 2 × 1.25
VCUaux1, 2
VCU1, 2 × 1.11
Overcharge release voltage 1, 2
VCD1, 2
Overdischarge detection voltage 1, 2
VDD1, 2
Overdischarge release voltage 1, 2
VDU1, 2
Overcurrent detection voltage 1
VIOV1
Overcurrent detection voltage 2
VIOV2
Temperature coefficient 1 for detection voltage
Temperature coefficient 2 for detection voltage *4
DELAY TIME (C3 = 0.22 μF)
Overcharge detection delay time 1, 2
Overdischarge detection delay time 1, 2
Overcurrent detection delay time 1
INPUT VOLTAGE
*3
Input voltage between VCC and VSS
OPERATING VOLTAGE
Operating voltage between VCC and VSS *5
CURRENT CONSUMPTION
Current consumption during normal operation
Current consumption at power down
OUTPUT VOLTAGE
TCOE1
TCOE2
VCU1, 2
− 0.055
VCU1, 2
× 1.19
VCU1, 2
× 1.05
VCD1, 2
− 0.080
VDD1, 2
− 0.110
VDU1, 2
− 0.130
VIOV1
− 0.033
3.60 V to 4.60 V,
Adjustable
1.70 V to 2.60 V,
Adjustable
1.70 V to 3.80 V,
Adjustable
0.07 V to 0.30 V,
Adjustable
Load short circuit,
− 1.70
VCC reference
*1
Ta = − 40°C to + 85°C − 0.6
Ta = − 40°C to + 85°C *1 − 0.24
VCU1, 2
+ 0.045
VCU1, 2
× 1.31
VCU1, 2
× 1.17
VCD1, 2
+ 0.070
VDD1 ,2
+ 0.100
VDU1, 2
+ 0.120
VIOV1
+ 0.033
V
1, 2
1
V
1, 2
1
V
1, 2
1
V
1, 2
1
V
1, 2
1
V
1, 2
1
V
3
1
− 1.20
− 0.71
V
3
1
0
− 0.05
0.6
0
mV/°C
mV/°C
⎯
⎯
⎯
⎯
VCU1, 2
VCU1, 2
× 1.25
VCU1, 2
× 1.11
VCD1, 2
VDD1, 2
VDU1, 2
VIOV1
tCU1, 2
tDD1, 2
tIOV1
1.0 s
0.1 s
0.01 s
0.55
67
6.3
1.00
100
10
2.06
141
14.7
s
ms
ms
8, 9
8, 9
10
5
5
5
VDS
Absolute maximum
rating
− 0.3
⎯
18
V
⎯
⎯
VDSOP
Output logic fixed
2.0
⎯
16
V
⎯
⎯
IOPE
IPDN
V1 = V2 = 3.6 V
V1 = V2 = 1.5 V
1.8
0
7.5
0.0002
14.2
0.10
μA
μA
4
4
2
2
VCC
VCC
− 0.17 − 0.003
VSS
VSS
+ 0.003
VCC
VCC
− 0.27 − 0.019
VCC
V
6
3
VSS
+ 0.17
VCC
V
6
3
V
7
4
DO voltage “H”
VDO(H)
IOUT = 10 μA
DO voltage “L”
VDO(L)
IOUT = 10 μA
CO voltage “H”
VCO(H)
IOUT = 10 μA
RCOL
VCO − VVM = 9.4 V
0.22
0.6
2.20
MΩ
7
4
RVCM
RVSM
VCC − VVM = 0.5 V
VVM − VSS = 1.1 V
79
387
240
597
878
1491
kΩ
kΩ
5
5
2
2
CO PIN INTERNAL RESISTANCE
Resistance between VM and CO
INTERNAL RESISTANCE
Resistance between VCC and VM
Resistance between VSS and VM
0 V BATTERY CHARGE FUNCTION
0 V battery charging 0.26
0.75
1.25
V
11
6
function “available”
0 V battery charge inhibition battery voltage 1, 2 V0INH1, 2 0 V battery charging 0.20
0.88
1.57
V
12, 13
6
function “unavailable”
*1. Since products are not screened at high and low temperature, the specification for this temperature range is
guaranteed by design, not tested in production.
*2. Auxiliary overcharge detection voltage is equal to the overcharge detection voltage times 1.11 for the
products without overcharge hysteresis, and times 1.25 for other products.
*3. Temperature coefficient 1 for detection voltage should be applied to overcharge detection voltage,
overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage.
*4. Temperature coefficient 2 for detection voltage should be applied to overcurrent detection voltage.
*5. The DO pin and CO pin logic are established at the operating voltage.
0 V battery charge starting charger voltage
10
V0CHA
Seiko Instruments Inc.
Rev6.2_00
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Test Circuits
(1) Test Condition 1, Test Circuit 1
Set S1 = OFF, V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V1 from 3.6 V gradually.
The V1 voltage when CO = “L” is overcharge detection voltage 1 (VCU1). Decrease V1 gradually. The V1
voltage when CO = “H” is overcharge release voltage 1 (VCD1). Further decrease V1. The V1 voltage
when DO = “L” is overdischarge voltage 1 (VDD1). Increase V1 gradually. The V1 voltage when DO = “H”
is overdischarge release voltage 1 (VDU1). Set S1 = ON, and V1 = V2 = 3.6 V and V3 = 0 V under normal
status. Increase V1 from 3.6 V gradually. The V1 voltage when CO = “L” is auxiliary overcharge detection
voltage 1 (VCUaux1).
(2) Test Condition 2, Test Circuit 1
Set S1 = OFF, V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V2 from 3.6 V gradually.
The V2 voltage when CO = “L” is overcharge detection voltage 2 (VCU2). Decrease V2 gradually. The V2
voltage when CO = “H” is overcharge release voltage 2 (VCD2). Further decrease V2. The V2 voltage
when DO = “L” is overdischarge voltage 2 (VDD2). Increase V2 gradually. The V2 voltage when DO = “H”
is overdischarge release voltage 2 (VDU2). Set S1 = ON, and V1 = V2 = 3.6 V and V3 = 0 V under normal
status. Increase V2 from 3.6 V gradually. The V2 voltage when CO = “L” is auxiliary overcharge
detection voltage 2 (VCUaux2).
(3) Test Condition 3, Test Circuit 1
Set S1 = OFF, V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V3 from 0 V gradually. The
V3 voltage when DO = “L” is overcurrent detection voltage 1 (VIOV1). Set S1 = ON, V1 = V2 = 3.6 V, V3 =
0 under normal status. Increase V3 from 0 V gradually. (The voltage change rate < 1.0 V / ms) V3 − (V1
+ V2) voltage when DO = “L” is overcurrent detection voltage 2 (VIOV2).
(4) Test Condition 4, Test Circuit 2
Set S1 = ON, V1 = V2 = 3.6 V, and V3 = 0 V under normal status and measure current consumption.
Current consumption I1 is the normal status current consumption (IOPE). Set S1 = OFF, V1 = V2 =
1.5 V under overdischarge status and measure current consumption. Current consumption I1 is the
power-down current consumption (IPDN).
(5) Test Condition 5, Test Circuit 2
Set S1 = ON, V1 = V2 = V3 = 1.5 V, and V3 = 2.5 V under overdischarge status. (V1 + V2 − V3) / I2 is the
internal resistance between VCC and VM (RVCM).
Set S1 = ON, V1 = V2 = 3.6 V, and V3 = 1.1 V under overcurrent status. V3 / I2 is the internal resistance
between VSS and VM (RVSM).
(6) Test Condition 6, Test Circuit 3
Set S1 = ON, S2 = OFF, V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V4 from 0 V
gradually. The V4 voltage when I1 = 10 μA is DO voltage “H” (VDO(H)).
Set S1 = OFF, S2 = ON, V1 = V2 = 3.6 V, and V3 = 0.5 V under overcurrent status. Increase V5 from 0 V
gradually. The V5 voltage when I2 = 10 μA is the DO voltage “L” (VDO(L)).
Seiko Instruments Inc.
11
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
(7) Test Condition 7, Test Circuit 4
Set S1 = ON, S2 = OFF, V1 = V2 = 3.6 V and V3 = 0 V under normal status. Increase V4 from 0 V
gradually. The V4 voltage when I1 = 10 μA is the CO “H” voltage (VCO(H)).
Set S1 = OFF, S2 = ON, V1 = V2 = 4.7, V3 = 0 V, and V5 = 9.4 V under overcharge status. (V5) / I2 is
the internal resistance between VM and CO (RCOL).
(8) Test Condition 8, Test Circuit 5
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V1 from (VCU1 − 0.2 V) to (VCU1 +
0.2 V) immediately (within 10 μs). The time after V1 becomes (VCU1 + 0.2 V) until CO goes “L” is the
overcharge detection delay time 1 (tCU1).
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Decrease V1 from (VDD1 + 0.2 V) to (VDD1 − 0.2
V) immediately (within 10 μs). The time after V1 becomes (VDD1 − 0.2 V) until DO goes “L” is the
overdischarge detection delay time 1 (tDD1).
(9) Test Condition 9, Test Circuit 5
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V2 from (VCU2 − 0.2 V) to (VCU2 +
0.2 V) immediately (within 10 μs). The time after V2 becomes (VCU2 + 0.2 V) until CO goes “L” is the
overcharge detection delay time 2 (tCU2).
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Decrease V2 from (VDD2 + 0.2 V) to (VDD2 − 0.2
V) immediately (within 10 μs). The time after V2 becomes (VDD2 − 0.2 V) until DO goes “L” is the
overdischarge detection delay time 2 (tDD2).
(10) Test Condition 10, Test Circuit 5
Set V1 = V2 = 3.6 V, and V3 = 0 V under normal status. Increase V3 from 0 V to 0.5 V immediately
(within 10 μs). The time after V3 becomes 0.5 V until DO goes “L” is the overcurrent detection delay time
1 (tIOV1).
(11) Test Condition 11, Test Circuit 6
Set V1 = V2 = 0 V, and V3 = 0 V, and increase V3 gradually. The V3 voltage when CO = “L” (VVM + 0.3 V
or higher) is the 0 V charge starting voltage (V0CHA).
(12) Test Condition 12, Test Circuit 6
Set V1 = 0 V, V2 = 3.6 V, and V3 = 12 V, and increase V1 gradually. The V1 voltage when CO = “H” (VVM
+ 0.3 V or higher) is the 0 V charge inhibiting voltage 1 (V0INH1).
(13) Test Condition 13, Test Circuit 6
Set V1 = 3.6 V, V2 = 0 V, and V3 = 12 V, and increase V2 gradually. The V2 voltage when CO = “H” (VVM
+ 0.3 V or higher) is the 0 V charge inhibiting voltage 2 (V0INH2).
12
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
SENS
SENS
I1
VCC
VCC
V1
S-8232 Series
ICT
VC
S-8232 Series
V1
S1
ICT
VC
V2
V2
VM
VSS
DO
VM
VSS
DO
CO
V3
CO
I2
V3
S1
Test Circuit 1
Test Circuit 2
SENS
SENS
VCC
VCC
S-8232 Series
V1
VC
S-8232 Series
V1
ICT
ICT
VC
V2
V2
VM
VSS
DO
VM
VSS
CO
DO
CO
V3
V3
V5
V4
S2
I2
V5
S1
I1
V4
Test Circuit 3
SENS
S-8232 Series
I2
S1
I1
Test Circuit 4
SENS
C3 = 0.22 μF
VCC
V1
S2
ICT
C3
VCC
S-8232 Series
V1
VC
ICT
VC
V2
V2
VM
VSS
DO
VM
VSS
CO
DO
V3
CO
V3
Test Circuit 5
4.7 MΩ
Test Circuit 6
Figure 4
Seiko Instruments Inc.
13
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Operation
Remark Refer to “ Battery Protection IC Connection Example”.
Normal Status *1, *2
This IC monitors the voltages of the two serially connected batteries and the discharge current to control charging and
discharging. When the voltages of two batteries are more than the overdischarge detection voltage (VDD1, 2), less than
the overcharge detection voltage (VCU1, 2), and the current flowing through the batteries becomes equal or lower than a
specified value (the VM pin voltage is equal or lower than overcurrent detection voltage 1), the charging and
discharging FETs are turned on. In this status, charging and discharging can be carried out freely. This is normal
status. In this status, the VM and VSS pins are shorted by the RVSM resistor.
Overcurrent Status
When the discharging current becomes equal to or higher than a specified value (the VM pin voltage is equal to or
higher than the overcurrent detection voltage1) during discharging under the normal status and it continues for the
overcurrent detection delay time (tIOV1) or longer, the discharging FET is turned off to stop discharging. This is
overcurrent status. The VM and VSS pins are shorted by the RVSM resistor in this status. The charging FET is also
turned off. While the discharging FET is off and a load is connected, the VM pin voltage is equal to the VCC potential.
The overcurrent status returns to the normal status when impedance between the EB− and EB+ pins (refer to Figure
8) is 200 MΩ or higher, by action such as releasing the load. When the load is released, the VM pin, which is shorted
to the VSS pin by the RVSM resistor, goes back to the VSS potential. The IC detects that the VM pin potential returns
to overcurrent detection voltage 1 (VIOV1) or lower and returns to the normal status.
Overcharge Status
Following two cases are detected as overcharge status :
(1) If any of the battery voltages becomes higher than the overcharge detection voltage (VCU1, 2) during charging
under the normal status and it continues for the overcharge detection delay time (tCU1, 2) or longer, the charging
FET turns off to stop charging. This is overcharge status. In this status, the VM and VSS pins are shorted by
the RVSM resistor.
(2) Although the status is shorter than the overcharge detection delay time (tCU1, 2), if any of the battery voltages
becomes higher than the auxiliary overcharge detection voltage (VCUaux1, 2), the charging FET turns off to stop
charging. This is also overcharge status. In this status, the VM and VSS pins are shorted by the RVSM
resistor.
The auxiliary overcharge detection voltages (VCUaux1, 2) are correlated with the overcharge detection voltages (VCU1, 2)
and are defined by following equations :
VCUaux1, 2 [V] = 1.25 × VCU1, 2 [V]
or VCUaux1, 2 [V] = 1.11 × VCU1, 2 [V]
The overcharge status is released in two cases :
(1) The battery voltage which exceeded the overcharge detection voltage (VCU1, 2) falls below the overcharge
release voltage (VCD1, 2), the charging FET turns on and the IC returns to the normal status.
(2) If the battery voltage which exceeded the overcharge detection voltage (VCU1, 2) is equal or higher than the
overcharge release voltage (VCD1, 2), however, discharging starts with removing the charger and connecting the
load, the charging FET turns on and the IC returns to the normal status.
The mechanism to release is as follows: the discharge current flows via an internal parasitic diode of the charging
FET, immediately after connecting the load and discharging starts. Therefore the VM pin’s voltage momentarily
increases about 0.6 V (voltage as much as VF voltage of the diode has) plus the VSS pin’s voltage. The IC detects this
voltage by using overcurrent detection voltage 1 (VIOV1) so that the IC releases the overcharge status and returns to
the normal status.
Overdischarge Status
If any of the battery voltages falls below the overdischarge detection voltage (VDD1, 2) during discharging under the
normal status and it continues for the overdischarge detection delay time (tDD1, 2) or longer, the discharging FET turns
off and discharging stops. This is overdischarge status. When the discharging FET turns off, the VM pin voltage
becomes equal to the VCC voltage and the IC’s current consumption falls below the power-down current consumption
(IPDN). This is power-down status. The VM and VCC pins are shorted by the RVCM resistor in the overdischarge and
power-down statuses.
The power-down status is released when the charger is connected and the voltage between VM and VCC is
overcurrent detection voltage 2 or higher. In this status, When all the battery voltages becomes equal to or higher
than the overdischarge release voltage (VDU1, 2) in this status, The IC returns to the normal status from the
overdischarge status.
14
Seiko Instruments Inc.
Rev6.2_00
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Delay Circuit
The overcharge detection delay time (tCU1, 2), the overdischarge detection delay time (tDD1, 2), and the overcurrent
detection delay time 1 (tIOV1) change with an external capacitor (C3). Since one capacitor determine each delay time,
delay times are correlated as seen in the following ratio :
Overcharge delay time : Overdischarge delay time : Overcurrent delay time = 100 : 10 : 1
The delay times are calculated by the following equations : (Ta = − 40°C to + 85°C)
Min.,
Typ.,
Max.
( 2.500, 4.545,
9.364 ) × C3 [μF]
Overcharge detection delay time tCU [s] = Delay factor
( 0.3045, 0.4545, 0.6409 ) × C3 [μF]
Overdischarge detection delay time tDD [s] = Delay factor
( 0.02864, 0.04545, 0.06682 ) × C3 [μF]
Overcurrent detection delay time tIOV1 [s] = Delay factor
Remark The overcurrent detection delay time 2 is not set Overcurrent detection voltage 2 (VIOV2).
0 V Battery Charging Function *3
This function is used to recharge both of two serially-connected batteries after they self-discharge to 0 V. When the 0
V charging start voltage (V0CHA) or higher is applied to between VM and VCC by connecting the charger, the charging
FET gate is fixed to VCC potential.
When the voltage between the gate and the source of the charging FET becomes equal to or higher than the turn-on
voltage by the charger voltage, the charging FET turns on to start charging. At this time, the discharging FET turns
off and the charging current flows through the internal parasitic diode in the discharging FET. If all the battery
voltages become equal to or higher than the overdischarge release voltage (VDU1, 2), the IC returns to the normal
status.
0 V Battery Charge Inhibiting Function *3
This function is used for inhibiting charging after either of the connected batteries goes 0 V due to its self-discharge.
When the voltage of either of the connected batteries goes below the 0 V charge inhibit voltage 1 and 2 (V0INH1, 2), the
charging FET gate is fixed to "EB−" to inhibit charging. Charging is possible only when the voltage of both connected
batteries goes 0 V charge inhibit voltage 1 and 2 (V0INH1, 2) or more.
Note that charging may be possible when the total voltage of both connected batteries is less than the minimum value
(VDSOPmin) of the operating voltage between VCC and VSS even if the voltage of either of the connected batteries is
the 0 V charge inhibit voltage 1 and 2 (V0INH1, 2) or less. Charging is inhibited when the total voltage of both
connected batteries reaches the minimum value (VDSOPmin) of the operating voltage between VCC and VSS.
When using this optional function, a resistor of 4.7 MΩ is needed between the gate and the source of the charging
control FET (refer to Figure 8).
*1. When connecting batteries for the first time, the IC may fail to enter the normal status (is not in the status to charge).
If so, once set the VM pin to VSS voltage (short between VM and VSS or connect a charger) to return to the normal
status.
*2. In this product with “overcharge detection/release hysteresis”, “no final overcharge function”, and “0 V battery charge
inhibiting function” (indicated in *4, in “2. Product Name List” in “ Product Name Structure”), the following action,
other products do not have, is seen. But it does not affect on actual use.
In the normal status, the battery voltage is the overcharge release voltage (VCD1, 2) or higher, and the overcharge
detection voltage (VCU1, 2) or lower but after that, the IC goes in the overcurrent status by connecting an overload.
Usually the IC returns to the normal status by detaching the overload, but the charging FET may turn off and the IC
may go in the overcharge status. After that, connect the load again to start charging. The FET turns on and the IC
returns to the normal status (Refer to “Overcharge status”).
*3. Some lithium ion batteries are not recommended to be recharged after having been completely discharged. Please
contact battery manufacturer when you select a 0 V battery charging function.
Seiko Instruments Inc.
15
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Timing Charts
1. Overcharge Detection
V2 battery
V1 battery
VCUaux
VCU
Battery VCD
voltage VDU
VDD
VSS
VCC
DO pin
voltage
V1 auxiliary over
voltage detect
V2 over voltage detect
V1 over voltage detect
V2 auxiliary over
voltage detect
VSS
VCC
CO pin
voltage
VSS
EB−
VCC
VIOV2
VM pin
voltage VIOV1
VSS
EB−
Charger connection
Load connection
Delay time = 0
Delay
Delay
Delay time = 0
Status *1
*1.
Normal status
Over charge status
Over discharge status
Over current status
Remark The charger is assumed to charge with a constant current.
Figure 5
16
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
2. Overdischarge Detection
V2 battery
V1 battery
VCU
VCD
Battery
VDU
voltage
VDD
VSS
VCC
DO pin
voltage
VSS
Vcc
CO pin
voltage
Vss
EB−
VCC
VM pin VIOV2
voltage VIOV1
VSS
EB−
Charger connection
Load connection
Delay
Delay
Status
*1.
No Delay
*1
&
Normal status
Over charge status
Over discharge status
Over current status
Remark The charger is assumed to charge with a constant current.
Figure 6
Seiko Instruments Inc.
17
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
3. Overcurrent Detection
V1 = V2 battery
VCU
Battery
VCD
voltage
VDU
VDD
VCC
DO pin
voltage
VSS
CO pin
voltage
VCC
VSS
EB−
VM pin
voltage
VCC
VIOV2
VIOV1
VSS
EB−
Charger connection
Load connection
delay = tIOV1
Status
delay = tIOV2
< tIOV1
*1
*1.
Normal status
Over charge status
Over discharge status
Over current status
Remark The charger is assumed to charge with a constant current.
Figure 7
18
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
Battery Protection IC Connection Example
EB+
R4
1 kΩ
SENS
R1
1 kΩ
VCC
Battery 1
C1
0.22 μF
R2
1 kΩ
S-8232 Series
VC
Battery 2
C2
0.22 μF
ICT
VSS
DO
CO
VM
Delay time setting
C3
0.22 μF
FET1
R5
4.7 MΩ
FET2
R3
1 kΩ
EB−
Figure 8
Table 8 Constants for External Components
Symbol
FET1
FET2
R1
C1
R2
C2
R4
Parts
Nch MOS FET
Nch MOS FET
Chip resistor
Chip capacitor
Chip resistor
Chip capacitor
Chip resistor
Purpose
Discharge control
Charge control
ESD protection
For power fluctuation
ESD protection
For power fluctuation
ESD protection
C3
Chip capacitor Delay time setting
R3
Chip resistor
Protection for
charger reverse
connection
R5
Chip resistor
0 V battery
charging inhibition
Typ.
⎯
⎯
1 kΩ
0.22 μF
1 kΩ
0.22 μF
1 kΩ
0.22 μF
1 kΩ
(4.7 MΩ)
Min.
Max.
Remark
⎯
⎯
⎯
⎯
⎯
⎯
300 Ω
1 kΩ
⎯
0 μF
1 μF
⎯
300 Ω
1 kΩ
⎯
0 μF
1 μF
⎯
= R1 min. = R1 max. Same value as R1 and R2. *1
Attention should be paid to leak
0 μF
1 μF
*2
current of C3.
Discharge can’t be stopped at less
300 Ω
5 kΩ
than 300 Ω when a charger is
*3
reverse-connected.
R5 should be added when the
product has 0 V battery charge
(1 MΩ)
(10 MΩ)
inhibition. Lower resistance
*4
increases current consumption.
*1. R4 = R1 is required. Overcharge detection voltage increases by R4. For example 10 kΩ (R4) increases overcharge
detection voltage by 20 mV.
*2. The overcharge detection delay time (tCU), the overdischarge detection delay time (tCD), and the over current detection
delay time (tIOV) change with the external capacitor C3.
*3. When the resistor R3 is set less than 300 Ω and a charger is reverse-connected, current which exceeds the power
dissipation of the package will flow and the IC may break. But excessive R3 causes increase of overcurrent detection
voltage 1 (VIOV1). VIOV1 changes to VIOV1 = (R3 + RVSM) / RVSM × VIOV1. For example, 50 kΩ resistor (R3) increases
overcurrent detection voltage 1 (VIOV1) from 0.100 V to 0.113 V.
*4. A 4.7 MΩ resistor is needed for R5 to inhibit 0 V battery charging. Current consumption increases when the R5
resistance is below 4.7 MΩ. R5 should be connected when the product has 0 V battery charging inhibition.
Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above example
of connection. In addition, the example of connection shown above and the constant do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the constant.
Seiko Instruments Inc.
19
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Precautions
• After the overcurrent detection delay, if either one of battery voltages equals the overdischarge detection
voltage (VDD1,2) or lower, the overdischarge detection delay time becomes shorter than 10ms (min.). It
occurs because capacitor C3 sets all of delay times (refer to the Figure 9) .
B attery
voltage
The battery voltage is equal to
or less the overdischarge voltage (VDD)
after stopping the overcurrent.
V DD
0 V
V CC
D O pin
voltage
V SS
V M pin
voltage
V CC
V IO V 2
V IO V 1
V SS
EB −
Load connect
The over current delay
The over discharge delay
The delay time becomes shorter than typical
Figure 9
[Cause]
When overcurrent detection is released until tIOV1, the capacitor C3 is charged by S-8232 Series. If all
battery voltage is lower than VDD1, 2 at that time, charging goes on. So delay time is shorter than
typical.
[Conclusion]
This phenomenon occurs when all battery voltage is nearly equal to the overdischarge voltage (VDD1, 2)
after overcurrent detected. It means that the battery capacity is small and those must be charged in
the future. Even if the state changes to overdischarge status, the battery package capacity is same as
typical.
• When one of the battery voltages is overdischarge detection voltage (VDD1, 2) or lower and the other one
becomes higher than the overcharge detection voltage (VCU1, 2), the IC detects the overcharge without the
overcharge detection delay time (tCU) (refer to the Figure 10) .
V CU
B attery
voltage
V1
V CD
V DU
Overcharge detect
Overdischarge state
V DD
V CU
B attery
voltage
V2
V CD
V DU
V DD
V CC
C O pin
voltage
V SS
EB−
D elay tim e = 0
Charger connected
Figure 10
[Cause]
It is same as the overdischarge detection under the overcurrent status. It occurs because capacitor
C3 sets all of delay times.
[Conclusion]
This phenomenon occurs when one battery voltage is lower than overdischarge voltage (VDD1, 2) and
batteries are charged by charger. Since voltage difference between two batteries is large in this
situation, the S-8232 Series immediately stops the charging of the other battery to reduce voltage
difference. This action improves the safety of a battery pack and dose not do any harm to the pack.
20
Seiko Instruments Inc.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
• After the overcurrent detection, the load was connected for a long time, even if one of the battery voltage
became lower than overdischarge detection voltage (VDD1, 2), the IC can’t detects the overdischarge as
long as the load is connected. Therefore the IC’s current consumption at the one of the battery voltage is
lower than the overdischarge detection voltage is same as normal status current consumption (IOPE) (refer
to the Figure 11).
The battery voltage is less than the overdischarge
detection voltage, by self current consum ption
B attery
voltage
VDD
C urrent
consum ption
IO P E
D O pin
voltage
0 V
A s long as the load is connected, the IC ’s current is
sam e as norm al current consum ption (I O P E )
IP D N
0 A
VCC
V SS
V M pin
voltage
V CC
V IO V 2
V IO V 1
V SS
E B−
Load connect
The over current delay
Long haul load connected
Figure 11
[Cause]
The reason is as follows. If the overcurrent detection and overdischarge detection occur at same time,
the overcurrent detection takes precedence the overdischarge detection. As long as the IC detects
overcurrent, the IC can’t detect overdischarge.
[Conclusion]
If the load is taken off at least one time, the overcurrent is released and the overdischarge detection
works.
Unless keeping the IC with load for a long time, the reduction of battery voltage will be neglected,
because of the IC’s current consumption (typ. 7.5 μA) is small.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement
of the products including this IC upon patents owned by a third party.
Seiko Instruments Inc.
21
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
Characteristics (Typical Data)
1. Detection Voltage Temperature Characteristics
Overcharge detection voltage1 vs. temperature
4.3
-20
0
20
40
60
80
VCU2 = 4.30 V
4.4
VCU2 [V]
VCU1 [V]
4.4
4.2
-40
Overcharge detection voltage2 vs. temperature
VCU1 = 4.30 V
4.3
4.2
-40
100
-20
0
Overcharge release voltage1 vs. temperature
0
20
40
VCD1 [V]
100
60
80
4
3.9
-40
100
-20
0
20
40
60
80
100
Ta [°C]
Ta [°C]
Auxiliary overcharge detection voltage1 vs. temperature
Auxiliary overcharge detection voltage2 vs. temperature
VCUaux1 = 5.375 V
5.35
5.25
-40
-20
0
20
40
60
80
100
VCUaux2 = 5.375 V
5.45
VCUaux2 [V]
VCUaux1 [V]
5.45
5.35
5.25
-40
Ta [°C]
22
80
VCD2 = 4.00 V
4.1
VCD2 [V]
-20
60
Overcharge release voltage2 vs. temperature
VCD1 = 4.00 V
4
3.9
-40
40
Ta [°C]
Ta [°C]
4.1
20
-20
0
20
40
Ta [°C]
Seiko Instruments Inc.
60
80
100
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8232 Series
Rev6.2_00
Overdischarge detection voltage1 vs. temperature
2
1.9
-40
VDD2 = 2.00 V
2.1
VDD2 [V]
2.1
VDD1 [V]
Overdischarge detection voltage2 vs. temperature
VDD1 = 2.00 V
2
1.9
-20
0
20
40
60
80
100
-40
-20
0
20
Ta [°C]
80
100
Overdischarge release voltage1 vs. temperature
VDU1 = 2.60 V
2.6
VDU2 = 2.60 V
2.7
VDU2 [V]
VDU1 [V]
60
Ta [°C]
Overdischarge release voltage1 vs. temperature
2.7
40
2.5
2.6
2.5
-40
-20
0
20
40
60
80
100
-40
-20
0
20
Ta [°C]
60
80
100
Ta [°C]
Overcurrent1 detection voltage vs. temperature
Overcurrent1 detection voltage vs. temperature
VIOV1 = 0.1 V
0.12
40
VIOV2 = 1.20 V (VCC reference)
-1.10
VIOV2 [V]
VIOV1 [V]
-1.15
0.10
-1.20
-1.25
0.08
-40
-1.30
-20
0
20
40
60
80
100
Ta [°C]
-40
-20
0
20
40
60
80
100
Ta [°C]
Seiko Instruments Inc.
23
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S8232 Series
Rev.6.2_00
2. Current Consumption Temperature Characteristics
Current consumption vs. temperature in normal mode
15
VCC = 3.0 V
100
10
IPDN [nA]
IOPE [μA]
Current consumption vs. temperature in power-down mode
VCC = 7.2 V
5
0
-40
-20
0
20
40
60
80
100
50
0
Ta [°C]
-40
-20
0
20
40
60
80
100
Ta [°C]
3. Delay Time Temperature Characteristics
Overcharge detection1 time vs. temperature
1
0.5
-40
-20
0
20
40
60
80
C3 = 0.22 μF
150
TDD [ms]
1.5
tCU [s]
Overcharge detection1 time vs. temperature
C3 = 0.22 μF
100
50
-40
100
Ta [°C]
-20
0
20
40
Ta [°C]
Overcurrent1 detection time vs. temperature
C3 = 0.22 μF
12
tIOV1 [ms]
11
10
9
8
7
-40
-20
0
20
40
60
80
100
Ta [°C]
Caution Please design all applications of the S-8232 Series with safety in mind.
24
Seiko Instruments Inc.
60
80
100
+0.3
3.00 -0.2
8
5
1
4
0.17±0.05
0.2±0.1
0.65
No. FT008-A-P-SD-1.1
TITLE
TSSOP8-E-PKG Dimensions
FT008-A-P-SD-1.1
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1
2.0±0.05
ø1.55±0.05
0.3±0.05
+0.1
8.0±0.1
ø1.55 -0.05
(4.4)
+0.4
6.6 -0.2
1
8
4
5
Feed direction
No. FT008-E-C-SD-1.0
TITLE
TSSOP8-E-Carrier Tape
FT008-E-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
13.4±1.0
17.5±1.0
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.5
No. FT008-E-R-SD-1.0
TITLE
TSSOP8-E-Reel
No.
FT008-E-R-SD-1.0
SCALE
QTY.
UNIT
mm
Seiko Instruments Inc.
3,000
www.sii-ic.com
•
•
The information described herein is subject to change without notice.
•
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
•
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
•
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, vehicle equipment,
in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment, without prior
written permission of Seiko Instruments Inc.
•
•
The products described herein are not designed to be radiation-proof.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.
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