C8051F331

C8051F331 25 MIPS, 8 kB Flash, 20-Pin Mixed-Signal MCU Analog Peripherals Comparator High-Speed 8051 µC Core - - Programmable hysteresis and response time Configurable to generate interrupts or reset Low current (0.4 µA) Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 25 MIPS throughput with 25 MHz clock Expanded interrupt handler 768 bytes data RAM 8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are reserved) 17 port I/O; all are 5 V tolerant Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports available concurrently Programmable 16-bit counter/timer array with three capture/compare modules, WDT 4 general-purpose 16-bit counter/timers Real-time clock mode using PCA or timer and external clock source Two internal oscillators: Memory On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) Provides breakpoints, single stepping, watchpoints Inspect/modify memory, registers, and stack Superior performance to emulation systems using ICE-chips, target pods, and sockets Digital Peripherals Supply Voltage: 2.7 to 3.6 V - Typical operating current: 6.4 mA at 25 MHz 9 µA at 32 kHz Typical stop mode current: