Si5338
I 2 C - P R O GRA MM A B LE A NY - F R E Q U E N C Y, A NY - O UTPUT
Q UAD C LOCK G ENERATOR
Features
External feedback mode allows
zero-delay mode
Loss of lock and loss of signal
alarms
crystal: 8 to 30 MHz
CMOS input: 5 to 200 MHz
SSTL/HSTL input: 5 to 350 MHz
Differential input: 5 to 710 MHz
Independently configurable outputs
support any frequency or format:
LVPECL/LVDS:
0.16 to 710 MHz
HCSL: 0.16 to 250 MHz
CMOS: 0.16 to 200 MHz
SSTL/HSTL: 0.16 to 350 MHz
Pin Assignments
External
frequency from 5 to 350 MHz
spread from 0.5 to 5.0%
Any modulation rate from 33 to
63 kHz
Any
Independent output voltage per driver:
1.5, 1.8, 2.5, or 3.3 V
I2C/SMBus compatible interface
Easy to use programming software
Small size: 4 x 4 mm, 24-QFN
Low power: 45 mA core supply typ
Wide temperature range: –40 to
+85 °C
24
Top View
SDA
Any
VDDO0
CLK0B
Ordering Information:
See page 42.
RSVD_GND
Single supply core with excellent
PSRR: 1.8, 2.5, 3.3 V
Independent frequency increment/
decrement feature enables
glitchless frequency adjustments in
1 ppm steps
Independent phase adjustment on
each of the output drivers with an
accuracy of
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