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MXL7225-1-ABA-T

MXL7225-1-ABA-T

  • 厂商:

    SIPEX(迈凌)

  • 封装:

    BGA144

  • 描述:

    DUAL 25A OR SINGLE 50A POWER MOD

  • 数据手册
  • 价格&库存
MXL7225-1-ABA-T 数据手册
MxL7225 / MxL7225-1 Data Sheet Dual 25A or Single 50A Power Module General Description Features The MxL7225 is a dual channel, 25A step-down power module. It includes a wide 4.5V to 15V input voltage range and supports two outputs each with an output voltage range of 0.6V to 1.8V, set by a single external resistor. The MxL7225 requires only a few input and output capacitors, which simplifies design and shortens time-to-market. The module supplies either two 25A outputs, a single 50A output or up to 300A when paralleled with additional MxL7225 modules. A unique package design where inductors are mounted externally provides improved thermal performance and lower cost relative to devices with the same industry standard pinout. ■ ■ ■ ■ Dual 25A or single 50A output ■ ■ ■ Frequency synchronization The complete switch mode DC/DC power supply integrates the control, drivers, bootstrap diodes, bootstrap capacitors, inductors, MOSFETs and HF bypass capacitors in a single package for point-of-load conversions. ■ ■ ■ ■ Adjustable switching frequency (400kHz to 780kHz) ■ Thermally enhanced 16mm x 16mm x 5.01mm BGA package The MxL7225 includes a temperature diode that enables device temperature monitoring. It also has an adjustable switching frequency and utilizes a peak current mode architecture which allows fast line and load transient response. ■ ■ ■ The MxL7225 is available in a space saving 16mm x 16mm x 5.01mm RoHS compliant BGA package. The MxL7225-1 is identical to the MxL7225 except that there are no internal feedback loop compensation components. When more flexibility is desired in dealing with loop characteristics, the MxL7225-1 allows the system designer to use an external compensation network entirely different from that embedded in the MxL7225. INTVCC Output voltage range: 0.6V to 1.8V Multiphase current sharing with multiple MxL7225s for up to 300A output Differential remote sense amplifier Peak current mode architecture for fast transient response Overcurrent protection Output overvoltage protection Internal temperature monitor and thermal shutdown protection Applications A host of protection features, including overcurrent, overtemperature, output overvoltage and UVLO, help this module achieve safe operation under abnormal operating conditions. Typical Application Input voltage range: 4.5V to 15V Telecom and Networking Equipment Industrial Equipment Test Equipment Ordering Information - page 35 95 INTVCC CVCC 4.7μF RPGOOD 10kŸ 90 VIN 4.5V to 15V CIN RTEMP CSS 0.1μF 121kŸ MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VOUT1 VIN VOUTS1 TEMP RUN1 DIFFOUT RUN2 SW1 TRACK1 VFB1 TRACK2 VFB2 COMP1 fSET MxL7225 COMP2 PHASMD MxL7225-1 VOUTS2 VOUT2 SW2 PGOOD2 SGND GND DIFFP DIFFN Efficiency (%) PGOOD COUT1 CFF RFB 60.4kŸ VOUT 1.2V 50A PGOOD COUT2 TBD 80 75 fSW = 500kHz 70 MxL7225-1 ONLY RC CC Figure 1: Typical Application: 50A, 1.2V Output DC/DC Power Module • www.maxlinear.com• 201DSR04 85 VIN = 5V VIN = 12V 65 0 10 20 30 40 Load Current (A) Figure 2: 1.2VOUT Efficiency vs IOUT 50 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Revision History Revision History Document No. Release Date Change Description 201DSR04 June 9, 2021 Updated: ■ "Mechanical Dimensions, BGA" figure. ■ "Recommended Land Pattern and Stencil, BGA" figure. ■ Disclaimer text. 201DSR03 June 9, 2021 9/29/20 ■ Initial release. 201DSR04 ii MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Table of Contents Table of Contents General Description ..............................................................................................................................................................i Features..................................................................................................................................................................................i Applications ...........................................................................................................................................................................i Typical Application ................................................................................................................................................................i Specifications .......................................................................................................................................................................1 Absolute Maximum Ratings...........................................................................................................................................1 ESD Ratings ..................................................................................................................................................................1 Operating Conditions.....................................................................................................................................................2 Electrical Characteristics ...............................................................................................................................................3 Pin Information .....................................................................................................................................................................6 Pin Configuration ...........................................................................................................................................................6 Pin Description ..............................................................................................................................................................6 Typical Performance Characteristics .................................................................................................................................9 Efficiency .......................................................................................................................................................................9 Load Transient Response, Dual Phase, Single Output ...............................................................................................10 Start-Up, Single Phase ................................................................................................................................................11 Short Circuit Protection, Single Phase ........................................................................................................................11 Functional Block Diagrams ...............................................................................................................................................12 Operation.............................................................................................................................................................................14 Power Module Description ..........................................................................................................................................14 Applications Information ...................................................................................................................................................14 Typical Application Circuit ...........................................................................................................................................14 VIN to VOUT Step-Down Ratios....................................................................................................................................14 Output Voltage Programming ......................................................................................................................................16 Input Capacitors ..........................................................................................................................................................16 Output Capacitors .......................................................................................................................................................16 Pulse-Skipping Mode Operation..................................................................................................................................16 Forced Continuous Operation .....................................................................................................................................16 Multiphase Operation ..................................................................................................................................................16 Input Ripple Current Cancellation ...............................................................................................................................19 Frequency Selection and Phase-Locked Loop............................................................................................................19 Minimum On-Time .......................................................................................................................................................20 Soft-Start and Output Voltage Tracking ......................................................................................................................20 Power Good ................................................................................................................................................................21 Stability and Compensation.........................................................................................................................................21 June 9, 2021 201DSR04 iii MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Table of Contents Enabling Channels ......................................................................................................................................................22 INTVCC and EXTVCC...................................................................................................................................................23 Differential Remote Sense Amplifier............................................................................................................................23 SW Pins.......................................................................................................................................................................23 Temperature Monitoring (TEMP).................................................................................................................................23 Fault Protection ...........................................................................................................................................................25 Thermal Considerations and Output Current Derating ................................................................................................25 Power Derating............................................................................................................................................................26 Layout Guidelines and Example..................................................................................................................................30 Mechanical Dimensions.....................................................................................................................................................32 16mm x 16mm x 5.01mm BGA ...................................................................................................................................32 Recommended Land Pattern and Stencil.........................................................................................................................33 16mm x 16mm x 5.01mm BGA ...................................................................................................................................33 Module Pinout.....................................................................................................................................................................34 Ordering Information..........................................................................................................................................................35 June 9, 2021 201DSR04 iv MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet List of Figures List of Figures Figure 1: Typical Application: 50A, 1.2V Output DC/DC Power Module ................................................................................. i Figure 2: 1.2VOUT Efficiency vs IOUT ....................................................................................................................................... i Figure 3: Pin Configuration.....................................................................................................................................................6 Figure 4: Efficiency: Single Phase, VIN = 5V ..........................................................................................................................9 Figure 5: Efficiency: Single Phase, VIN = 12V ........................................................................................................................9 Figure 6: Efficiency: Dual Phase, VIN = 12V...........................................................................................................................9 Figure 7: Efficiency: Pulse-Skipping Mode, VIN = 12V, VOUT = 1.2V, 500kHz .......................................................................9 Figure 8: 12V to 1V, 500kHz, 12.5A Load Step, 10A/µs Step-Up and Step-Down ..............................................................10 Figure 9: 12V to 1.2V, 500 kHz, 12.5A Load Step,10A/µs Step-Up and Step-Down ...........................................................10 Figure 10: 12V to 1.5V, 600kHz, 12.5A Load Step,10A/µs Step-Up and Step-Down ..........................................................10 Figure 11: 12V to 1.8V, 600kHz, 12.5A Load Step, 10A/µs Step-Up and Step-Down .........................................................10 Figure 12: No Load, 12V to 1.2V, 500kHz............................................................................................................................11 Figure 13: 25 A, 12V to 1.2V, 500kHz ..................................................................................................................................11 Figure 14: No Load, 12V to 1.2V, 500kHz............................................................................................................................11 Figure 15: 25 A, 12V to 1.2V, 500kHz ..................................................................................................................................11 Figure 16: MxL7225 Functional Block Diagram....................................................................................................................12 Figure 17: MxL7225-1 Functional Block Diagram ................................................................................................................13 Figure 18: Typical 4.5VIN to 15VIN, 1.5V and 1.2V at 25A Outputs, MxL7225.....................................................................15 Figure 19: Typical 4.5VIN to 15VIN, 1.5V and 1.2V at 25A Outputs, MxL7225-1..................................................................15 Figure 20: MxL7225 2-Module, 4-Phase, 1.2V, 100A Regulator..........................................................................................17 Figure 21: 4-Phase Parallel Configuration............................................................................................................................18 Figure 22: Examples of 2-Phase, 4-Phase and 6-Phase Operation with PHASMD Table...................................................18 Figure 23: Input RMS Current to DC Load Current Ratio as a Function of Duty Cycle........................................................19 Figure 24: Operating Frequency vs. fSET Pin Voltage ..........................................................................................................20 Figure 25: VOUT and VTRACK versus Time ...........................................................................................................................20 Figure 26: Example of Output Tracking Application Circuit ..................................................................................................21 Figure 27: Output Coincident Tracking Waveform ...............................................................................................................21 Figure 28: RUNx Pin Driven by a Logic Signal.....................................................................................................................22 Figure 29: Self-Start for VIN Range of 5.5V to 15V ..............................................................................................................22 Figure 30: Self-Start for VIN Range of 4.5V to 5.5V .............................................................................................................22 Figure 31: Diode Voltage vs. Temperature...........................................................................................................................23 Figure 32: 2-Phase, 1V at 50A with Temperature Monitoring ..............................................................................................24 Figure 33: Thermal Image 12V to 1V, 50A with No Air Flow ................................................................................................25 Figure 34: Current Derating Curves Measurement Setup ....................................................................................................26 Figure 35: Two-Phase Single Output Configuration .............................................................................................................27 Figure 36: Recommended PCB Layout................................................................................................................................30 June 9, 2021 201DSR04 v MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet List of Figures Figure 37: 0.9V Output Power Loss .....................................................................................................................................31 Figure 38: 1.5V Output Power Loss .....................................................................................................................................31 Figure 39: 12V to 1.5V Current Derating ..............................................................................................................................31 Figure 40: 12V to 0.9V Current Derating ..............................................................................................................................31 Figure 41: 5V to 1.5V Current Derating ................................................................................................................................31 Figure 42: 5V to 0.9V Current Derating ................................................................................................................................31 Figure 43: Mechanical Dimensions, BGA.............................................................................................................................32 Figure 44: Recommended Land Pattern and Stencil, BGA ..................................................................................................33 June 9, 2021 201DSR04 vi MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet List of Tables List of Tables Table 1: Absolute Maximum Ratings......................................................................................................................................1 Table 2: ESD Ratings .............................................................................................................................................................1 Table 3: Operating Conditions................................................................................................................................................2 Table 4: Electrical Characteristics ..........................................................................................................................................3 Table 5: Pin Description .........................................................................................................................................................6 Table 6: VFB Resistor Table vs. Various Output Voltages....................................................................................................16 Table 7: MxL7225 Load Step Response vs. Components, 2-Phase, 1 Output ...................................................................28 Table 8: MxL7225-1 Load Step Response vs. Components, 2-Phase, 1 Output ................................................................29 Table 9: Module Pinout.........................................................................................................................................................34 Table 10: Ordering Information.............................................................................................................................................35 June 9, 2021 201DSR04 vii MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Specifications Specifications Absolute Maximum Ratings Important: Stress above what is listed in Table 1 may cause permanent damage to the device. This is a stress rating only—functional operation of the device above what is listed in Table 1 or any other conditions beyond what MaxLinear recommends is not implied. Exposure to conditions above what is listed in Table 3 for extended periods of time may affect device reliability. Solder reflow profile is specified in the IPC/JEDEC J-STD-020C standard. Table 1: Absolute Maximum Ratings Parameter Minimum Maximum Units -0.3 18 V -1 25 V PGOOD1, PGOOD2, COMP1, COMP2 -0.3 6 V INTVCC, EXTVCC VIN VSW1, VSW2 -0.3 6 V MODE/PLLIN, fSET, TRACK1, TRACK2 -0.3 INTVCC V DIFFOUT -0.3 INTVCC - 1.1V V PHASMD -0.3 INTVCC V VOUT1, VOUT2, VOUTS1, VOUTS2 -0.3 6 V DIFFP, DIFFN -0.3 INTVCC V RUN1, RUN2, VFB1, VFB2 -0.3 INTVCC V 100 mA 150 °C 245 °C INTVCC Peak Output Current Storage Temperature Range -65 Peak Package Body Temperature ESD Ratings Table 2: ESD Ratings Parameter Limit HBM (Human Body Model) CDM (Charged Device Model) June 9, 2021 201DSR04 Units 2k V 500 V 1 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Operating Conditions Operating Conditions Table 3: Operating Conditions Parameter Minimum Maximum Units VIN 4.5 15 V INTVCC 4.5 5.5 V EXTVCC 4.7 5.5 V PGOOD 0 5.5 V Switching Frequency 400 780 kHz Junction Temperature Range (TJ) -40 125 °C 7 °C/W Thermal Resistance from Junction to PCB (ѲJB) 1.5 °C/W Thermal Resistance from Junction to Top of Module Case (ѲJCtop) 3.86 °C/W Thermal Resistance from Junction to Ambient (ѲJA) June 9, 2021 201DSR04 2 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Electrical Characteristics Electrical Characteristics Specifications are for Operating Junction Temperature of TJ = 25°C only; limits applying over the full Operating Junction Temperature range are denoted by a "•". Typical values represent the most likely parametric norm at TJ = 25°C and are provided for reference purposes only. Unless otherwise indicated, VIN = 12V and VRUN1, VRUN2 = 5V. Per Figure 18 and Figure 19. Table 4: Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units DC Specifications VIN(DC) VOUT1(RANGE) VOUT2(RANGE) Input DC voltage Output DC range VIN = 4.5V to 15V • 4.5 15 V • 0.6 1.8 V • 1.182 1.2 1.218 V 1.10 1.25 1.40 V CIN = 22 µF x 3 VOUT1 (DC) VOUT2 (DC) VOUT total variation with line and load COUT = 100µF x 2 Ceramic, 470µF POSCAP, MODE_PLLIN = GND VIN = 12V, VOUT = 1.2V, IOUT = 0A to 25A Input Specifications VRUN1, VRUN2 RUN pin on/off threshold VRUN1HYS, VRUN2HYS RUN pin ON hysteresis IINRUSH(VIN) Input inrush current at start-up IQ(VIN) IS(VIN) Input supply bias current Input supply current RUN rising 168 mV 1 A VIN = 12V, VOUT1 = VOUT2 = 1.2V, pulse-skipping mode 4.95 mA VIN = 12V, VOUT1 = VOUT2 = 1.2V, 500kHz CCM 160 mA Shutdown, RUN = 0, VIN = 12V 56 µA VIN = 4.5V, VOUT = 1.2V, IOUT = 25A 7.9 A VIN = 12V, VOUT = 1.2V, IOUT = 25A 2.9 A IOUT = 0A, CIN = 3 x 22µF, CSS = 0.01µF, COUT = 3 x 100µF, VOUT1 = 1.5V, VOUT2 = 1.5V, VIN = 12V Output Specifications IOUT1(DC), IOUT2(DC) Output continuous current range(1) VIN = 12V, VOUT = 1.2V ∆VOUT1(LINE)/VOUT1 ∆VOUT2(LINE)/VOUT2 Line regulation accuracy VOUT = 1.2V, VIN from 4.5V to 15V IOUT = 0A for each output • ∆VOUT1(LOAD)/VOUT1 ∆VOUT2(LOAD)/VOUT2 Load regulation accuracy(1) Each output; VOUT = 1.2V, 0A to 25A, VIN = 12V • VOUT1(AC), VOUT2(AC) Output ripple voltage For each output; IOUT = 0A, COUT = 100µF x 3 / X7R / ceramic, 470µF POSCAP, VIN = 12V, VOUT = 1.2V, frequency = 500kHz 22 mVPP fS (each channel) Output ripple voltage frequency(2) VIN = 12V, VOUT = 1.2V, fSET = 1.2V 500 kHz June 9, 2021 201DSR04 0 25 A 0.01 0.1 %/V 0.5 0.75 % 3 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Electrical Characteristics Table 4: Electrical Characteristics (Continued) Symbol Parameter fSYNC (each channel) SYNC capture range Conditions Min Typ 400 Max Units 780 kHz Turn-on overshoot COUT = 100µF / X5R / ceramic, 470µF POSCAP, VOUT = 1.2V, IOUT = 0A, VIN = 12V Each channel 0 mV tSTART1, tSTART2 Turn-on time COUT = 100µF / X5R / ceramic, 470µF POSCAP, No load, TRACK/SS with 0.01µF to GND, VIN = 12V Each channel 5 ms ∆VOUT(LS) (Each channel) Peak deviation for dynamic load Load: 0% to 50% to 0% of full load, COUT = 22µF x3 Ceramic, 470µF POSCAP VIN = 12V, VOUT = 1.5V 30 mV tSETTLE (Each channel) Settling time for dynamic load step Load: 0% to 50% to 0% of full load, VIN = 12V, COUT = 100µF, 470µF POSCAP 20 µs Output current limit VIN = 12V, VOUT = 1.2V Each channel 35 A VFB1, VFB2 Voltage at VFB pins IOUT = 0A, VOUT = 1.2V IFB Current at VFB pins VOVL Feedback overvoltage lockout TRACK1 (I), TRACK2 (I) Track pin soft-start pull-up current UVLO Undervoltage lockout ∆VOUT1START ∆VOUT2START IOUT1(PK) IOUT2(PK) Control Section • • TRACK1 (I), TRACK2 (I) start at 0V 0.594 0.600 0.606 V –5 –20 nA 0.64 0.66 0.68 V 1 1.25 1.5 µA VIN falling 3.6 V VIN rising 4.2 V UVLO hysteresis tON(MIN) Minimum on-time RFBHI1, RFBHI2 Resistance between VOUTS1, VOUTS2 and VFB1, VFB2 Each output VPGOOD1 LOW, VPGOOD2 LOW PGOOD voltage low IPGOOD = 2mA IPGOOD PGOOD leakage current VPGOOD = 5V VPGOOD June 9, 2021 PGOOD trip level 60.05 0.6 V 90 ns 60.4 60.75 kΩ 34 300 mV 5 µA VFB with respect to its steady state value VFB ramping negative –10 VFB with respect to its steady state value VFB ramping positive 10 201DSR04 % 4 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Electrical Characteristics Table 4: Electrical Characteristics (Continued) Symbol Parameter Conditions Min Typ Max Units VINTVCC Internal VCC voltage 6V < VIN < 15V 4.8 5.0 5.2 V VINTVCC INTVCC load regulation ICC = 0mA to 50mA 1.05 2.00 % VEXTVCC EXTVCC switchover voltage EXTVCC ramping positive VEXTVCC(DROP) EXTVCC dropout ICC = 20mA, VEXTVCC = 5V VEXTVCC(HYST) EXTVCC hysteresis INTVCC Linear Regulator load regulation 4.5 4.7 50 V 100 150 mV mV Oscillator and Phase-Locked Loop Frequency nominal Nominal frequency fSET = 1.2V Frequency low Lowest frequency fSET = 0.93V 400 kHz Frequency high Highest frequency fSET > 2.4V, up to INTVCC 780 kHz IFSET Frequency set current RMODE_PLLIN MODE_PLLIN input resistance CLKOUT Phase (relative to SW1) CLK high Clock High output voltage CLK low Clock Low output voltage 450 9 500 10 550 11 kHz µA 250 kΩ PHASMD = GND 60 Deg PHASMD = float 90 Deg PHASMD = INTVCC 120 Deg 2 V 0.2 V Differential Amplifier AV Gain RIN Input resistance Measured at DIFFP Input VOS Input offset voltage VDIFFP = VDIFFOUT = 1.5V, IDIFFOUT = 100µA PSRR Power Supply Rejection Ratio 5V < VIN < 15V ICL Maximum Output current VDIFFOUT(MAX) Maximum output voltage GBW Gain Bandwidth Product 2.7 MHz VTEMP Diode Connected PNP I = 100µA 0.6 V TCVTEMP Temperature Coefficient I = 25µA –2.1 mV/°C OT Thermal shutdown threshold Rising temperature 145 °C 15 °C V/V 82 kΩ 3 • mV 90 dB 3 mA INTVCC - 1.4 IDIFFOUT = 300µA Thermal hysteresis 1 V 1. See output current derating curves for different VIN, VOUT and TA. 2. The MxL7225 module is designed to operate from 400kHz to 780kHz. June 9, 2021 201DSR04 5 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Pin Information Pin Information Pin Configuration TEMP EXTVCC M L VIN K J CLKOUT SW1 H INTVCC SW2 PGOOD1 PGOOD2 RUN2 G RUN1 PHASMD MODE_PLLIN TRACK1 VFB1 VOUTS1 SGND F DIFFOUT DIFFP DIFFN COMP1 COMP2 GND E SGND VFB2 TRACK2 D GND fSET SGND VOUTS2 C B VOUT1 VOUT2 GND A 1 2 3 4 5 6 7 8 9 10 11 12 BGA, Top View 144-Lead 16mm x 16mm x 5.01mm Figure 3: Pin Configuration Pin Description Table 5: Pin Description Pin Number Pin Name Description A1, A2, A3, A4, A5, B1, B2, B3, B4, B5, C1, C2, C3, C4 VOUT1 Output of the channel 1 power stage. Connect the corresponding output load from the VOUT1 pins to the PGND pins. Direct output decoupling capacitance from VOUT1 to PGND is recommended. A6, A7, B6, B7, D1, D2, D3, D4, D9, D10, D11, D12, E1, E2, E3, E4, E10, E11, E12, F1, F2, F3, F10, F11, F12, G1, G3, G10, G12, H1, H2, H3, H4, H5, H6, H7, H9, H10, H11, H12, J1, J5, J8, J12, K1, K5, K6, K7, K8, K12, L1, L12, M1, M12 GND Ground for the power stage. Connect to the application’s power ground plane. A8, A9, A10, A11, A12, B8, B9, B10, B11, B12, C9, C10, C11, C12 VOUT2 Output of the channel 2 power stage. Connect the corresponding output load from the VOUT2 pins to the PGND pins. Direct output decoupling capacitance from VOUT2 to PGND is recommended. June 9, 2021 201DSR04 6 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Pin Description Table 5: Pin Description (Continued) Pin Number Pin Name Description VOUTS1, VOUTS2 These pins are connected internally to the top of the feedback resistor for each output. Connect this pin directly to its specific output or to DIFFOUT when using the remote sense amplifier. When paralleling modules, connect one of the VOUTS pins to DIFFOUT when remote sensing or directly to VOUT when not remote sensing. These pins must be connected to either DIFFOUT or VOUT. This connection provides the feedback path and cannot be left open. C6 fSET This pin is used to set the operating frequency via one of two methods: Connect a resistor from this pin to ground Drive this pin with a DC voltage This pin sources a 10µA current. See Figure 24 for frequency of operation vs. fSET voltage. C7, D6, G6, G7, F6, F7 SGND Ground pin for all analog signals and low power circuits. Connect to GND in one place. See layout guidelines in Figure 36. VFB1, VFB2 Feedback input to the negative side of the error amplifier for each channel. These pins are each internally connected to VOUTS1 and VOUTS2 via a precision 60.4kΩ resistor. Vary each output voltage by adding a feedback resistor from VFB to SGND. Tie VFB1 and VFB2 together for parallel operation. TRACK1, TRACK2 Soft-Start and Output Voltage Tracking pins. Each channel has a 1.25μA pull-up current source. When one channel is configured as a master, adding a capacitor from this pin to ground sets a soft-start ramp rate. The other channel can be set up as the slave and have the master output applied through a voltage divider to the slave’s output TRACK pin. For coincidental tracking, this voltage divider is equal to the slave’s output feedback divider. E6, E7 COMP1, COMP2 Current control threshold and error amplifier compensation point for each channel. The current comparator threshold increases with this control voltage. The MxL7225 is internally compensated, however a feed-forward CFF is frequently required. RC and CC are required for MxL7225-1 (not MxL7225). Refer to Figure 18, Table 7 and Stability and Compensation in the Applications Information section. When paralleling both channels, connect the COMP1 and COMP2 pins together. E8 DIFFP This pin is the remote sense amplifier’s positive input and is connected to the output voltage’s remote sense point. If the remote sense amplifier is not used, connect this pin to SGND. E9 DIFFN This pin is the remote sense amplifier’s negative input and is connected to the remote sense point GND. If the remote sense amplifier is not used, connect this pin to SGND. C5, C8 D5, D7 E5, D8 F4 Selects between Forced Continuous Mode or Pulse-Skipping Mode, or connects to an external clock for frequency synchronization. There are three connection options: 1. Connect this pin to SGND to force both channels into Forced Continuous Mode. MODE_PLLIN 2. Connect this pin to INTVCC or leave it floating to enable Pulse-Skipping Mode. 3. Connect this pin to an external clock. Both channels will be synchronized to the clock and operate in Forced Continuous Mode. F5, F9 RUN1, RUN2 The RUN1 and RUN2 pins each enable and disable their corresponding channel. A voltage above 1.27V on the RUN pin will turn on the corresponding channel. The RUN pin has a hysteresis of about 170mV. There are two supported methods to drive the RUN pin. Either drive it with a logic signal or connect it to a voltage divider whose upper resistor is connected to VIN and lower resistor to ground. See Applications Information for important details. F8 DIFFOUT Output of the internal remote sense amplifier. If remote sensing on channel 1, connect to VOUTS1. If remote sensing on channel 2, connect to VOUTS2. When paralleling modules, connect one of the VOUTS pins to DIFFOUT when remote sensing. G2, G11 SW1, SW2 Use these pins to access the switching node of each channel. An RC snubber can be connected to reduce switch node ringing. Otherwise, leave these pins floating. June 9, 2021 201DSR04 7 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Pin Description Table 5: Pin Description (Continued) Pin Number G4 Pin Name PHASMD Description This pin selects the CLKOUT phase as follows: Connect to SGND for 60 degrees Connect to INTVCC for 120 degrees Leave floating for 90 degrees G5 CLKOUT This is the clock output. Its phase is set with the PHASMD pin. It is used to synchronize multiple modules so that all channels evenly share load current and operate in a multiphase manner. Refer to the Application Section on Multiphase Operation for more details. G9, G8 PGOOD1, PGOOD2 Power Good outputs. This open-drain output is pulled low when the VOUT of its respective channel is more than ±10% outside regulation. H8 INTVCC Internal 5V Regulator Output. This voltage powers the control circuits and internal gate driver. Decouple to GND with a 4.7μF ceramic capacitor. INTVCC is activated when either RUN1 or RUN2 is activated. TEMP The internal temperature sensing diode monitors the temperature change with voltage change on VBE. Connect to VIN through a resistor (RTEMP) to limit the current to 100µA. RTEMP = (VIN - 0.6V) / 100μA EXTVCC External power input that is connected through an internal switch to INTVCC whenever EXTVCC is > 4.7V. Do not exceed 6V on this input. Connect this pin to VIN when operating VIN on 5V. An efficiency increase that is a function of (VIN - INTVCC) multiplied by the power MOSFET driver current occurs when the feature is used. VIN must be applied before EXTVCC, and EXTVCC must be removed before VIN. J6 J7 M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, L2, L3, L4, L5, L6, L7, L8, VIN L9, L10, L11, J2, J3, J4, J9, J10, J11, K2, K3, K4, K9, K10, K11 Power input pins. Connect input voltage between these pins and GND. Direct input decoupling capacitance from VIN to GND is recommended. 1. Use test points to monitor signal pin connections. June 9, 2021 201DSR04 8 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Typical Performance Characteristics Typical Performance Characteristics Efficiency 95 95 90 90 Efficiency (%) Efficiency (%) See Figure 18 for typical application schematic. 85 80 1.8VOUT, 600kHz 1.5VOUT, 600kHz 1.2VOUT, 500kHz 1.0VOUT, 500kHz 0.8VOUT, 400kHz 75 70 65 0 5 10 15 20 85 80 1.8VOUT, 600kHz 1.5VOUT, 600kHz 1.2VOUT, 500kHz 1.0VOUT, 500kHz 0.8VOUT, 400kHz 75 70 65 25 0 5 10 Load Current (A) 20 25 Load Current (A) Figure 5: Efficiency: Single Phase, VIN = 12V Figure 4: Efficiency: Single Phase, VIN = 5V 95 100 90 90 80 Efficiency (%) Efficiency (%) 15 85 80 1.8VOUT, 600kHz 1.5VOUT, 600kHz 1.2VOUT, 500kHz 1.0VOUT, 500kHz 0.8VOUT, 400kHz 75 70 65 0 10 20 30 40 June 9, 2021 60 50 40 30 CCM 20 Pulse-Skip Mode 10 50 0.01 Load Current (A) Figure 6: Efficiency: Dual Phase, VIN = 12V 70 0.1 1 10 Load Current (A) Figure 7: Efficiency: Pulse-Skipping Mode, VIN = 12V, VOUT = 1.2V, 500kHz 201DSR04 9 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Load Transient Response, Dual Phase, Single Output See Figure 18 for typical application schematic. VOUT(AC), 20mV/div VOUT(AC), 20mV/div IOUT, 10A/div IOUT, 10A/div COUT = 8 x 220µF Ceramic COUT = 8 x 220µF Ceramic CFF = 470pF CFF = 470pF Figure 8: 12V to 1V, 500kHz, 12.5A Load Step, 10A/µs Step-Up and Step-Down Figure 9: 12V to 1.2V, 500 kHz, 12.5A Load Step, 10A/µs Step-Up and Step-Down VOUT(AC), 20mV/div VOUT(AC), 20mV/div IOUT, 10A/div IOUT, 10A/div COUT = 8 x 220µF Ceramic CFF = 470pF COUT = 8 x 220µF Ceramic CFF = 470pF Figure 10: 12V to 1.5V, 600kHz, 12.5A Load Step, 10A/µs Step-Up and Step-Down June 9, 2021 Figure 11: 12V to 1.8V, 600kHz, 12.5A Load Step, 10A/µs Step-Up and Step-Down 201DSR04 10 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Start-Up, Single Phase Start-Up, Single Phase See Figure 18 for typical application schematic. VSW, 10V/div VSW, 10V/div VOUT, 0.5V/div VOUT, 0.5V/div I_IN, 1A/div I_IN, 0.2A/div COUT = 1 x 470µF POSCAP + 2 x 100µF Ceramic COUT = 1 x 470µF POSCAP + 2 x 100µF Ceramic CSS = 0.1µF CSS = 0.1µF Figure 12: No Load, 12V to 1.2V, 500kHz Figure 13: 25 A, 12V to 1.2V, 500kHz Short Circuit Protection, Single Phase See Figure 18 for typical application schematic. VSW, 10V/div VSW, 10V/div VOUT, 0.5V/div VOUT, 0.5V/div I_IN, 1A/div I_IN, 2.5A/div COUT = 1 x 470µF POSCAP + 2 x 100µF Ceramic COUT = 1 x 470µF POSCAP + 2 x 100µF Ceramic CSS = 0.1µF CSS = 0.1µF Figure 15: 25 A, 12V to 1.2V, 500kHz Figure 14: No Load, 12V to 1.2V, 500kHz June 9, 2021 201DSR04 11 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Functional Block Diagrams Functional Block Diagrams VIN TRACK1 CSS RTEMP = 100μA VIN RTEMP GND TEMP Q TOP CLKOUT RUN1 0.12μH Q BOTTOM MODE_PLLIN GND PHASMD 60.4k COUT1 VFB1 INTERNAL COMP SGND PGOOD1 POWER CONTROL RFB1 PGOOD2 VIN TRACK2 CVCC 4.7μF VOUT1 VOUTS1 COMP1 CSS SW1 VOUT1 INTVCC 1μF CIN GND Q TOP EXTVCC 0.12μH RUN2 SW2 VOUT2 Q BOTTOM GND VOUT2 COUT2 LOAD VIN - 0.6V CIN 1μF VOUTS2 60.4k COMP2 Optional External Control fSET RFSET SGND + – INTERNAL COMP VFB2 RFB2 INTERNAL FILTER MxL7225 DIFFOUT DIFFN DIFFP Figure 16: MxL7225 Functional Block Diagram June 9, 2021 201DSR04 12 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Functional Block Diagrams VIN TRACK1 CSS VIN - 0.6V RTEMP = 100μA VIN CIN 1ȝF RTEMP GND TEMP Q TOP CLKOUT 0.12ȝH RUN1 SW1 VOUT1 Q BOTTOM MODE_PLLIN GND PHASMD VOUT1 COUT1 VOUTS1 COMP1 60.4k VFB1 RC1 10pF SGND PGOOD1 POWER CONTROL PGOOD2 VIN TRACK2 INTVCC CSS CVCC 4.7μF 1ȝF CIN GND Q TOP EXTVCC 0.12ȝH RUN2 SW2 VOUT2 Q BOTTOM GND COMP2 60.4k 10pF CC2 VOUT2 COUT2 VOUTS2 RC2 Optional External Control RFSET RFB1 + – LOAD CC1 VFB2 RFB2 fSET INTERNAL FILTER MxL7225-1 SGND DIFFOUT DIFFN DIFFP Figure 17: MxL7225-1 Functional Block Diagram June 9, 2021 201DSR04 13 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Operation Operation Power Module Description The MxL7225 is a dual-channel, standalone, synchronous step-down power module that provides two 25A outputs or one 50A output. This power module has a continuous input voltage range of 4.5V to 15V and has been optimized for 12V conversions. It provides precisely regulated output voltages from 0.6V to 1.8V that are set by a single external resistor. See the typical application schematic in Figure 18. The module employs a constant frequency, peak current mode control loop architecture. It also has an internal feedback loop compensation. These features ensure the MxL7225 has sufficient stability margins as well as good transient performance over a wide range of output capacitors, including low ESR ceramic capacitors. The peak current mode control supports cycle-by-cycle fast current limit and current limit hiccup in overcurrent or output short circuit conditions. The open-drain PGOOD outputs are pulled low when the output voltage exceeds ±10% of its set point. Once the output voltage exceeds +10%, the high side MOSFET is kept off while the low side MOSFET turns on, clamping the output voltage. The overvoltage and undervoltage detection are referenced to the feedback pin. The RUN1 and RUN2 pins enable and disable the module’s two channels. Pulling a RUN pin below 1.1V forces the respective regulator into shutdown mode and turns off both the high side and low side MOSFETs. The TRACK pins are used for either programming the output voltage ramp and voltage tracking during start-up, or for soft-starting the channels. The MxL7225 includes a differential remote sense amplifier (with a gain of +1). This amplifier can be used to accurately sense the voltage at the load point on one of the module’s two outputs or on a single parallel output. The switching frequency is programmed from 400kHz to 780kHz using an external resistor on the fSET pin. For noise sensitive applications, the module can be synchronized to an external clock. The MxL7225 module can be configured to current share between channels or can also be set to current share between modules (multiphase or ganged operation). Using the MODE_PLLIN, PHASMD and CLKOUT pins, multiphase operation of up to 12 phases is possible with multiple MxL7225s running in parallel. The EXTVCC pin allows an external 5V supply to power the module and eliminate power dissipation in the internal 5V LDO. EXTVCC has a threshold of 4.7V for activation and a max operating rating of 5.5V. It must sequence on after VIN and sequence off before VIN. Monitor the internal die temperature by using the TEMP pin. Pull the anode up to VIN through an external resistor to set the bias current in the diode. Thermal simulation has shown that the thermal monitor on the controller die is within 5°C of the MOSFETs. The MxL7225-1 is identical to the MxL7225 except that there are no internal control loop compensation components. When dealing with an atypical selection of output capacitors or when further loop optimization is desired, the MxL7225-1 offers more flexibility. Applications Information Typical Application Circuit The typical MxL7225 application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 7 for a selection of various design solutions. Additional information about selecting external compensation components can be found in the Stability and Compensation section. VIN to VOUT Step-Down Ratios For a given input voltage, there are limitations to the maximum possible VIN and VOUT step-down ratios. The MxL7225 has a maximum duty cycle of 90% at 500kHz, meaning that the maximum output voltage will be approximately 0.9 x VIN. When running at a high duty cycle, output current can be limited by the power dissipation in the high-side MOSFET. The minimum output voltage from a given input is controlled by the minimum on-time, which is 90ns. The minimum output voltage is either VIN x fSW(MHz) x 0.09µs or 0.6V, whichever is higher. To get a lower output voltage, reduce the switching frequency. Using the MODE_PLLIN pin to operate in pulse-skipping mode results in high efficiency performance at light loads. This light load feature extends battery life. June 9, 2021 201DSR04 14 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet INTVCC VIN to VOUT Step-Down Ratios INTVCC CVCC 4.7μF RPGOOD1 10kȍ PGOOD1 MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 C1-C4 22ȝF 25V CSS1 0.1μF RTEMP 100kȍ TEMP VOUTS1 RUN1 SW1 RUN2 VFB1 TRACK1 VFB2 TRACK2 COMP1 MxL7225 fSET CSS2 0.1μF COUT2 470ȝF 6.3V RFB1 40.2kȍ SW2 GND PGOOD2 DIFFN DIFFOUT DIFFP VOUT1 1.5V 25A CFF2 100pF VOUT2 1.2V 25A VOUTS2 VOUT2 SGND RFB2 60.4kȍ COMP2 PHASMD RFSET 121kȍ CFF1 100pF COUT1 100ȝF 6.3V COUT3 INTVCC 100ȝF RPGOOD2 6.3V 10kȍ PGOOD2 COUT4 470ȝF 6.3V LOAD VIN Figure 18: Typical 4.5VIN to 15VIN, 1.5V and 1.2V at 25A Outputs, MxL7225 INTVCC INTVCC CVCC 4.7μF RPGOOD1 10kȍ PGOOD1 C1-C4 22ȝF 25V CSS1 0.1μF MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 RTEMP 100kȍ TEMP VOUTS1 RUN1 SW1 RUN2 VFB1 TRACK1 VFB2 TRACK2 COMP1 fSET CSS2 0.1μF MxL7225-1 VOUTS2 VOUT2 SW2 SGND GND DIFFP 2.55kȍ 2.2nF COMP2 PHASMD RFSET 121kȍ CFF1 100pF COUT1 100ȝF 6.3V PGOOD2 DIFFN DIFFOUT RFB2 60.4kȍ 2.55kȍ 2.2nF COUT3 100ȝF RPGOOD2 6.3V 10kȍ PGOOD2 INTVCC COUT2 470ȝF 6.3V RFB1 40.2kȍ VOUT1 1.5V 25A CFF2 100pF VOUT2 1.2V 25A COUT4 470ȝF 6.3V LOAD VIN Figure 19: Typical 4.5VIN to 15VIN, 1.5V and 1.2V at 25A Outputs, MxL7225-1 June 9, 2021 201DSR04 15 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Output Voltage Programming Output Voltage Programming Pulse-Skipping Mode Operation The PWM controller has an internal 0.6V reference. A resistor RFB between the VFB and SGND pins programs the output voltage. A 60.4kΩ internal feedback resistor is connected from VOUTS1 to VFB1 and from VOUTS2 to VFB2, as illustrated in the functional block diagram. The pulse-skipping mode enables the module to skip cycles at light loads which reduces switching losses and increases efficiency at low to intermediate currents. To enable this mode, connect the MODE_PLLIN pin to the INTVCC pin. RFB values for corresponding standard VOUT values are shown in Table 6. Use the following equation to determine the RFB value for other VOUT levels: Forced Continuous Operation R FB 0.6V  60.4k = --------------------------------------V OUT – 0.6V Equation 1 In the case of paralleling multiple channels and devices, when all VFB pins are tied together and only one VOUTS pin is connected to the output, a common RFB resistor may be used. Select the RFB as explained above. Note that each VFB pin has an IFB max of 20nA. To reduce VOUT error due to IFB, use an additional RFB and connect the corresponding VOUTS to VOUT as shown in Figure 21. Table 6: VFB Resistor Table vs. Various Output Voltages VOUT 0.6V 0.8V 1.0V 1.2V 1.5V 1.8V RFB Open 182k 90.9k 60.4k 40.2k 30.2k Input Capacitors Use four 22µF ceramic input capacitors to reduce RMS ripple current on the regulator input. A bulk input capacitor is required if the source impedance is high or the source capacitance is low. For additional bulk input capacitance, use a surface mount 47µF to 100µF aluminum electrolytic bulk capacitor. Output Capacitors The output capacitors, denoted as COUT, need to have low enough equivalent series resistance (ESR) to meet output voltage ripple and transient requirements. The MxL7225 can use low ESR tantalum capacitors, low ESR polymer capacitors, ceramic capacitors or a combination of those for COUT. Refer to Table 7 for COUT recommendations that optimize performance for different output voltages. June 9, 2021 Forced continuous operation is recommended when fixed frequency is more important than light load efficiency, and when the lowest output ripple is desired. To enable this mode, connect the MODE_PLLIN pin to GND. Multiphase Operation Multiphase operation is used to achieve output currents greater than 25A. It can be used with both MxL7225 channels to achieve one 50A output. It can also be used by paralleling multiple MxL7225s and running them out of phase to attain one single high current output, up to 300A. Ripple current in both the input and output capacitors is substantially lower using a multiphase design, especially when the number of phases multiplied by the output voltage is less than the input voltage. Input RMS ripple current and output ripple amplitude is reduced by the number of phases used while the effective ripple frequency is multiplied by the number of phases used. The MxL7225 is a peak current mode controlled device which results in very good current sharing between parallel modules and balances the thermal loading. Figure 20 shows an example of a 2-module, 4-phase, single output regulator that can handle load current up to 100A. Up to 12 phases can be paralleled by using each MxL7225 channel’s PHASMD, MODE_PLLIN and CLKOUT pins. When the CLKOUT pin is connected to the following stage’s MODE_PLLIN pin, the frequency and the phase of both devices are locked. Phase difference can be obtained between MODE_PLLIN and CLKOUT of 120 degrees, 60 degrees or 90 degrees respectively by connecting the PHASMD pin to INTVCC, SGND or by floating it. Figure 21 shows an example of parallel operation and Figure 22 shows examples of 2-phase, 4-phase and 6-phase designs. 201DSR04 16 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet INTVCC INTVCC C10 4.7μF CLK1 VIN = 4.5V to 15V Multiphase Operation R2 5k PGOOD MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 CIN1 22μF 25V x3 R6 100k TEMP RUN TRACK VOUTS1 RUN1 SW1 RUN2 VFB1 TRACK1 VFB2 TRACK2 COMP1 MxL7225 fSET COMP2 PHASMD VFB COUT2 470μF 6.3V COUT1 100μF 6.3V COUT2 470μF 6.3V R5 60.4k COMP VOUT2 VOUTS2 SW2 R4 121k SGND COUT1 100μF 6.3V GND DIFFP PGOOD2 DIFFN DIFFOUT PGOOD VOUT 1.2V 100A C16 4.7μF CLK1 PGOOD MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 CIN2 22μF 25V x3 R9 100k TEMP VOUTS1 RUN1 SW1 RUN RUN2 VFB1 TRACK TRACK1 VFB2 TRACK2 COMP1 MxL7225 fSET C19 0.22μF COUT1 100μF 6.3V COUT2 470μF 6.3V COUT1 100μF 6.3V COUT2 470μF 6.3V VFB COMP COMP2 PHASMD VOUTS2 VOUT2 SW2 R10 121k SGND GND DIFFP PGOOD2 DIFFN DIFFOUT PGOOD INTVCC Figure 20: MxL7225 2-Module, 4-Phase, 1.2V, 100A Regulator June 9, 2021 201DSR04 17 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet VOUT1 VOUT2 COMP1 COMP2 4 Paralleled Outputs for 1.2V at 100A 60.4k VOUTS1 VOUTS2 Optional Connection When paralleling multiple channels and devices: ■ ■ ■ VFB1 60.4k VFB2 TRACK1 TRACK2 Optional RFB 60.4k VOUT1 VOUT2 COMP1 COMP2 60.4k VOUTS1 VOUTS2 VFB2 TRACK2 CSS 0.1μF RFB 60.4k Tie all RUN pins together. Connect only one of the VOUTS pins to VOUT (or DIFFOUT in the case of remote sensing). In this case, only the RFB corresponding to that VOUTS pin should be populated. Refer to Output Voltage Programming for the calculation of RFB. All other VOUTS pins should be left floating. If VOUT offset created by IFB (20nA max per channel) is a concern, additional RFB resistors may be populated to mitigate the effect. In such a configuration, each RFB should be the same resistance value as that in the single RFB case, and the corresponding VOUTS pin should be connected to VOUT (or DIFFOUT in the case of remote sensing). ■ If remote sensing, only one differential amplifier should be used. ■ In MxL7225-1, external RC and CC components are required. Only one RC and one CC are needed given that all COMP pins are tied together. 60.4k TRACK1 Tie all VFB pins together. ■ Use to lower total equivalent resistance to lower IFB voltage error VFB1 Multiphase Operation Figure 21: 4-Phase Parallel Configuration PHASMD SGND FLOAT INTVCC 0 0 0 2-PHASE DESIGN CHANNEL1 FLOAT CLKOUT MODE_PLLIN 0 PHASE 180 PHASE VOUT1 VOUT2 PHASMD CHANNEL2 180 180 240 CLKOUT 60 90 120 4-PHASE DESIGN 90 DEGREE CLKOUT MODE_PLLIN 0 PHASE 180 PHASE VOUT1 VOUT2 FLOAT PHASMD CLKOUT MODE_PLLIN 90 PHASE 270 PHASE VOUT1 VOUT2 FLOAT PHASMD 6-PHASE DESIGN 60 DEGREE 60 DEGREE CLKOUT MODE_PLLIN 0 PHASE 180 PHASE VOUT1 VOUT2 SGND PHASMD CLKOUT MODE_PLLIN 60 PHASE 240 PHASE VOUT1 VOUT2 SGND PHASMD CLKOUT MODE_PLLIN 120 PHASE 300 PHASE VOUT1 VOUT2 FLOAT PHASMD Figure 22: Examples of 2-Phase, 4-Phase and 6-Phase Operation with PHASMD Table June 9, 2021 201DSR04 18 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Input Ripple Current Cancellation Input Ripple Current Cancellation Figure 23 illustrates the RMS ripple current reduction that is expected as a function of the number of interleaved phases. 0.60 0.55 0.50 1-Phase 2-Phase 3-Phase 4-Phase 6-Phase RMS Input Ripple Current DC Load Current 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Duty Factor (VOUT/VIN) Figure 23: Input RMS Current to DC Load Current Ratio as a Function of Duty Cycle Frequency Selection and Phase-Locked Loop To increase efficiency, the MxL7225 works over a range of frequencies. For lower output voltages or duty cycles, lower frequencies are recommended to lower MOSFET switching losses and improve efficiency. For higher output voltages or duty cycles, higher frequencies are recommended to limit inductor ripple current. Refer to the efficiency graphs and their operating frequency conditions. When selecting an operating frequency, keep the highest output voltage in mind. Use an external resistor between the fSET pin and SGND to set the switching frequency. An accurate 10µA current source into the resistor sets a voltage that programs the frequency. Alternatively, a DC voltage can be applied to June 9, 2021 fSET to program the frequency. Figure 24 illustrates the operating frequency versus the fSET pin voltage. An external clock with a frequency range of 400kHz to 780kHz and a voltage range of 0V to INTVCC can be connected to the MODE_PLLIN pin. The high level threshold of the clock input is 1.6V and the low level threshold of the clock input is 1V. The MxL7225 integrates the PLL loop filter components. Ensure that the initial switching frequency is set with an external resistor before locking to an external clock. Both regulators will operate in continuous mode while being synchronized to an external clock signal. 201DSR04 19 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet The PLL phase detector output charges and discharges the internal filter network with a pair of complementary current sources. When an external clock is connected, an internal switch disconnects the external fSET resistor. The switching frequency then locks to the incoming external clock. If no external clock is connected, then the internal switch is on, which connects the external fSET resistor. 900 700 Soft-Start and Output Voltage Tracking A capacitor CSS can be connected from the TRACK pin to ground to implement soft-start. The TRACK pin is charged by a 1.25µA current source up to the reference voltage and then on to INTVCC. The MxL7225 has a smooth transition from TRACK to VOUT as shown in Figure 25. If the RUN pin is below 1.2V, the TRACK pin is pulled low. The following equation can be used to calculate soft-start time, defined as when PGOOD asserts: C SS t SOFTSTART = -------------------  0.65V 1.25A 600 500 400 Equation 3 1000 300 900 VTRACK 200 800 VOUT = 0.6V 100 0 0.0 0.5 1.0 1.5 2.0 2.5 Voltage (V) Voltage (mV) Frequency (kHz) 800 Minimum On-Time Figure 24: Operating Frequency vs. fSET Pin Voltage 700 600 500 400 300 200 100 0 Minimum On-Time 0 Minimum On-Time tON(MIN) is the shortest time that the controller can turn on the high-side MOSFET of either channel. Approaching this time may be more of an issue in low duty cycle applications. Use the following equation to make sure the on-time is above this minimum: V OUT --------------------------------t V IN  FREQ ON  MIN  Equation 2 If the on-time falls below this minimum, the channel will start to skip cycles. In this case, the output voltage continues to regulate, however output ripple increases. Lowering the switching frequency increases on-time. The minimum on-time specified in the electrical characteristics is 90ns. 1 2 3 4 5 6 7 8 9 10 time (ms) Figure 25: VOUT and VTRACK versus Time The MODE_PLLIN pin selects between forced continuous mode or pulse-skipping mode during steady-state operation. Regardless of the mode selected, the module channels will always start in the pulse-skipping mode up to TRACK = 0.54V, beyond which point the operation mode will follow the MODE_PLLIN setting. The TRACK pins can be used to externally program the output voltage tracking. The output may be tracked up and down with another regulator. The master regulator’s output is divided down with an external resistor divider that is the same as the slave regulator’s feedback divider to implement coincident tracking. Note that each MxL7225 channel has an internal accurate 60.4kΩ for the top feedback resistor. Refer to the equation below, which is applicable for VTRACK(SLAVE) < 0.8V. An example of coincident tracking is shown in Figure 26. 60.4k V OUT  SLAVE  =  1 + ---------------  V TRACK  SLAVE  R TA  Equation 4 June 9, 2021 201DSR04 20 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet INTVCC Power Good INTVCC CVCC 4.7μF RPGOOD1 10kȍ PGOOD1 CIN CSS 0.1μF RTEMP RTB 60.4kȍ MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 MASTER TEMP CFF1 33pF VOUTS1 RUN1 SW1 RUN2 VFB1 TRACK1 VFB2 TRACK2 COMP1 MxL7225 fSET RTA 60.4kȍ PHASMD RFB1 40.2kȍ VOUT1 1.5V SW2 121kȍ GND DIFFP PGOOD2 DIFFN DIFFOUT VOUT1 1.5V 25A COUT2 470ȝF 6.3V CFF2 100pF VOUT2 VOUTS2 VOUT2 SGND RFB2 60.4kȍ COMP2 COUT1 100ȝF 6.3V SLAVE 1.2V 25A COUT3 100ȝF RPGOOD2 6.3V 10kȍ PGOOD2 INTVCC COUT4 470ȝF 6.3V LOAD VIN Figure 26: Example of Output Tracking Application Circuit Power Good Each channel’s open drain PGOOD pin can be used to monitor if its respective VOUT is outside ±10% of the set point. The PGOOD pin is pulled low when the output of the corresponding channel is outside the monitoring window, the RUN pin is below its threshold (1.25V), or the MxL7225 is in the soft-start or tracking phase. The PGOOD pin will go high impedance immediately after VFB voltage is within the monitoring window. Note that there is an internal 20µs glitch filtering in PGOOD when VFB voltage goes out of the monitoring window. MASTER OUTPUT OUTPUT VOLTAGE SLAVE OUTPUT TIME Figure 27: Output Coincident Tracking Waveform The ramping voltage is applied to the track pin of the slave. Since the same resistor values are used to divide down the output of the master and to set the output of the slave, the slave tracks with the master coincidentally until its final value is achieved. The master continues from the slave’s regulation point to its final value. In Figure 26, RTA is equal to RFB2 for coincident tracking. June 9, 2021 If desired, a pullup resistor can be connected from the PGOOD pins to a supply voltage with a maximum level of 6V. Stability and Compensation The MxL7225 module is internally compensated for stability over a wide range of operating conditions. Refer to Table 7 for recommended configurations. For other configurations or for MxL7225-1 loop compensation, please consult a Maxlinear Field Applications Engineer. 201DSR04 21 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Enabling Channels Enabling Channels RUN threshold. Equation 5 shows the relationship between R1, R2 and VIN(TH) which is the VIN value when the RUNx voltage crosses 1.26V: There are two supported methods to enable and disable each channel. Method 1 Method 1 is to drive the RUNx pin of the channel to be enabled (CHx) with a logic signal as shown in Figure 28. R1 V IN  TH  1 + ------- = ------------------R2 1.26V Equation 5 Select R1 and R2 by letting VIN(TH) = 5V. 4.5V to 15V If the application is for VIN = 12V, the choice of VIN(TH) for Equation 5 can be higher than 5V but less than the minimum of the VIN tolerance band. For example, if VIN is 12V ± 10%, then choose a VIN(TH) between 5V and 10V. A zener diode from RUNx pin to ground is optional for protection of the RUNx pin (to clamp RUNx to 5V) in the event of the R2 resistor not being connected due to a board level fault. VIN RUNx Figure 28: RUNx Pin Driven by a Logic Signal VIN should be in the operating range (4.5V to 15V) before the logic signal at RUNx goes high. The logic high level must be above 1.3V in order to ensure that the RUNx threshold is crossed. To disable a channel (CHx), the logic signal at the corresponding RUNx pin must be brought down to 1.1V or below. Figure 30 shows the self-start method for an application where VIN is in the range of 4.5V to 5.5V. 4.5V to 5.5V R1 Method 2 10kŸ 1% VIN RUNx Method 2 is a self-start method. This method uses a resistor divider to divide down VIN and drive the RUNx pin with the divided voltage. The choice of the resistor divider ratio depends on the VIN range. R2 3.24kŸ 1% A combination of Method 1 and Method 2 is also recommended where an open drain output drives the RUNx pin with the voltage divider (R1 and R2) in place. Criteria for the selection of R1 and R2 must be followed as described above. VIN RUNx DZ EXTVCC In an application where VIN is the range of 4.5V to 5.5V, it is required to connect VIN to EXTVCC. Select R1 and R2 based on Equation 5, but use 4V for VIN(TH). 5.5V to 15V 10kŸ 1% 4.53kŸ 1% Figure 30: Self-Start for VIN Range of 4.5V to 5.5V Figure 29 shows the self-start method for an application where VIN is in the range of 5.5V to 15V. R1 R2 It is important to note that starting up the channels with RUNx floating is not allowed. Figure 29: Self-Start for VIN Range of 5.5V to 15V Resistors R1 and R2 divide VIN down and the divided voltage drives the RUNx pin. The R1 and R2 values are chosen such that VIN reaches 5V before RUNx crosses the June 9, 2021 201DSR04 22 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet INTVCC and EXTVCC INTVCC and EXTVCC Temperature Monitoring (TEMP) The VIN input voltage powers an internal 5V low dropout linear regulator. The regulator output (INTVCC) provides voltage to the control circuitry of the module. Alternatively, the EXTVCC pin allows an external 5V supply to be used to eliminate the 5V LDO power dissipation in power sensitive applications. An internal temperature sensing diode / PNP transistor is used to monitor its VBE voltage over temperature, thus serving as a temperature monitor. Its forward voltage and temperature coefficient are shown in the electrical characteristics section and plotted in Figure 31. It is connected to VIN through a pullup resistor RTEMP to limit the current to 100μA. It is recommended to set a 60µA minimum current in applications where VIN varies over a wide range. See Figure 32 for an example on how to use this feature. The MxL7225’s differential remote sense amplifier can be used to accurately sense voltages at the load. This is particularly useful in high current load conditions. The DIFFP and DIFFN pins must be connected properly to the remote load point, and the DIFFOUT pin must be connected to the corresponding VOUTS1 or VOUTS2 pin. The differential amplifier is able to handle an input up to 3.3V. If a CFF feed-forward capacitor is desirable in a channel employing the differential amplifier, connect the capacitor between VFB and DIFFP instead of DIFFOUT. 0.80 I = 100μA 0.75 0.70 0.65 V TEMP (V) Differential Remote Sense Amplifier 0.60 0.55 0.50 0.45 0.40 0.35 SW Pins 0.30 -60 Use the SW pins to monitor the switching node of each channel. These pins are generally used for testing or monitoring. During normal operation, these pins should be unconnected and left floating. However, in conjunction with an external series R-C snubber circuit, these pins can be used to dampen ringing on the switch node caused by LC parasitics in the switched current paths. June 9, 2021 -40 -20 0 20 40 60 80 100 120 140 Temperature (ࣙC) Figure 31: Diode Voltage vs. Temperature For accurate temperature measurement, the temperature sensing diode should first be characterized in a controlled temperature environment such as an oven. Without powering up the module, push a constant current such as 100µA into the TEMP pin and out the GND. Measure the diode voltage at two extreme temperature points. TEMP voltage vs diode temperature for said current is simply a straight line between those two points. 201DSR04 23 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Temperature Monitoring (TEMP) INTVCC VIN – 0.6V VIN RTEMP = 100μA RTEMP INTVCC CVCC 4.7μF RPGOOD 10kŸ A/D PGOOD MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 VIN = 4.5V to 15V CIN TEMP VOUTS1 RUN1 SW1 RUN2 VFB1 TRACK1 VFB2 TRACK2 COMP1 MxL7225 fSET CSS 0.1μF PHASMD COUT1 RFB 90.9kŸ COMP2 VOUTS2 VOUT 1V 50A VOUT2 SW2 121kŸ SGND GND DIFFP PGOOD2 DIFFN DIFFOUT PGOOD COUT2 Figure 32: 2-Phase, 1V at 50A with Temperature Monitoring June 9, 2021 201DSR04 24 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Fault Protection Fault Protection Thermal Considerations and Output Current Derating The MxL7225 module has built-in overcurrent, output overvoltage, and over-temperature protection. The overcurrent triggers at a nominal load of 35A. Overcurrent during four consecutive switching cycles initiates a hiccup mode. During hiccup, the high-side and low-side MOSFETs are turned off for 100ms. A soft-start is attempted following the hiccup. If the overcurrent persists, the hiccup will continue. The overvoltage triggers when the output voltage is 10% above the set-point. In overvoltage mode, the gate-source voltage of the top FET is kept at 0V and the bottom FET is kept on. The over-temperature triggers at 145°C. In an overtemperature state, both top and bottom FETs are kept off. When the temperature cools down below 130°C, the module soft-starts. Since an output overvoltage event is likely caused by a top FET that has failed short, in the case of an input supply that is capable of delivering high power, it is recommended that a fuse be used at the input. This is so that the bottom FET when kept on would cause high input current to flow through the fuse and quickly disengage the input supply and therefore de-energize the faulty module, preventing further damage to the end product. The design of the MxL7225 module removes heat from the bottom side of the package effectively. Thermal resistance from the bottom substrate material to the printed circuit board is very low. Proper thermal design is critical in controlling device temperatures and in achieving robust designs. There are many factors that affect the thermal performance. One key factor is the temperature rise of the devices in the package, which is a function of the thermal resistances of the devices inside the package and the power being dissipated. The thermal resistances of the MxL7225 are shown in the Operating Conditions section of this datasheet. The JEDEC ѲJA thermal resistance provided is based on tests that comply with the JESD51-2A “Integrated Circuit Thermal Test Method Environmental Conditions – Natural Convection” standard. JESD51 is a group of standards whose intent is to provide comparative data based on a standard test condition which includes a defined board construction. Since the actual board design in the final application will be different from the board defined in the standard, the thermal resistances in the final design may be different from those shown. Figure 33: Thermal Image 12V to 1V, 50A with No Air Flow(1) 1. Based on a 6-layer 3.9" x 5.1" Printed Circuit Board with 2oz copper on the outer layers and 1 oz copper on all internal layers). June 9, 2021 201DSR04 25 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Power Derating Power Derating The current derating curves in Figure 39 through Figure 42 were acquired with the test setup in Figure 34. The EVK (see details in Figure 33) was placed in a 0.5 cubic feet enclosed space with no forced air flow. The EVK was configured as a dual-phase single-output converter. The EVK was first loaded to 50A at room temperature. Ambient temperature was then gradually elevated until the module's temperature sensing diode reached 125°C. This is where Load Current starts to decrease from 50A in the curves. Beyond this point as ambient temperature increased, Load Current was decreased to maintain the 125°C diode temperature. These curves are accurate for the test setup in Figure 34 and natural convection. Figure 37 and Figure 38 are the corresponding power dissipation in the module at room temperature. 12” 12” Thermocouple for TAMBIENT 1” X 3” Module EVK 1.5” Stand Off Figure 34: Current Derating Curves Measurement Setup June 9, 2021 201DSR04 26 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet INTVCC Power Derating INTVCC CVCC 4.7μF RPGOOD 10kŸ PGOOD VIN 5.5V to 15V 10kŸ MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1 VIN VOUT1 TEMP VOUTS1 CIN RTEMP RUN1 RUN2 TRACK1 3.24kŸ SW1 fSET PHASMD MxL7225 MxL7225-1 COMP2 VOUTS2 VOUT2 SW2 PGOOD2 RFSET SGND GND DIFFP CFF VFB1 VFB2 COMP1 TRACK2 CSS 0.1μF MxL7225-1 ONLY DIFFOUT RC CC CP RFB VOUT PGOOD COUT DIFFN Figure 35: Two-Phase Single Output Configuration June 9, 2021 201DSR04 27 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Power Derating Table 7: MxL7225 Load Step Response vs. Components, 2-Phase, 1 Output (refer to Figure 35) CIN Vendors BULK Panasonic CERAMIC Murata Wurth COUT Part Number Value Vendors 25SVPF330M 330µF, 25V Panasonic ETPF470M5H 470µF, 2.5V, 5mΩ Murata GRM32ER60J227M 220µF, 6.3V, 1206, X5R Wurth 885012109004 100µF, 6.3V, 1210, X5R GRM31CR61E226KE15L 22µF, 25V, 1206, X5R 885012109014 22µF, 25V, 1210, X5R Part Number Value 25% Load Step (0 to 12.5A, 10A/µs), Ceramic Output Capacitor Only Solutions (mV)(1) Feedback Loop Bandwidth (kHz) Phase Margin (deg) RFB (kΩ) PWM Freq (kHz) 220 48 52 46 90.9kΩ 500kHz 220µF x8 220 53 54 46 60.4kΩ 500kHz None 220µF x8 150 55 51 55 40.2kΩ 600kHz None 220µF x8 150 56 50 62 30.2kΩ 600kHz VIN VOUT CIN (BULK) CIN (Ceramic) COUT (BULK) COUT (MLCC) CFF (pF) 12V 1.0V 330µF 22µF x4 None 220µF x8 12V 1.2V 330µF 22µF x4 None 12V 1.5V 330µF 22µF x4 12V 1.8V 330µF 22µF x4 P-P Deviation 25% Load Step (0 to 12.5A, 10A/µs), Bulk + Ceramic Output Capacitor Solutions VIN VOUT CIN (BULK) 12V 1.0V 330µF CIN (Ceramic) COUT (BULK) COUT (MLCC) CFF (pF) 22µF x4 470µF x2 220µF x3 100 (mV)(1) Feedback Loop Bandwidth (kHz) Phase Margin (deg) RFB (kΩ) PWM Freq (kHz) 61 48 63 90.9kΩ 500kHz P-P Deviation 12V 1.2V 330µF 22µF x4 470µF x2 220µF x3 100 62 49 64 60.4kΩ 500kHz 12V 1.5V 330µF 22µF x4 470µF x2 220µF x3 100 66 47 76 40.2kΩ 600kHz 12V 1.8V 330µF 22µF x4 470µF x2 220µF x3 100 64 43 82 30.2kΩ 600kHz 1. Worst case. June 9, 2021 201DSR04 28 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Power Derating Table 8: MxL7225-1 Load Step Response vs. Components, 2-Phase, 1 Output (refer to Figure 35) CIN (Ceramic) Vendors Value COUT (Ceramic) Part Number Vendors Value COUT (Bulk) Vendors Value Part Number Murata 100µF, 6.3V, GRM32ER60J107ME20L X5R, 1210 Panasonic 680µF, 2.5V, 6mΩ 2R5TPF680M6L 22µF, 16V, GRM31CR61C226KE15K X5R, 1206 Murata 220µF, 6.3V, GRM32ER60J227ME05L X5R, 1210 Panasonic 470µF, 2.5V, 3mΩ EEFGX0E471R 22µF, 16V, C3225X5R1C226M250AA X5R, 1210 Wurth 100µF, 6.3V, 885012109004 X5R, 1210 Murata 22µF, 16V, GRM32ER61C226KE20L X5R, 1210 Murata TDK Part Number 25% Load Step (0A to 12.5A, 10A/µs) Ceramic Output Capacitor Only Solutions VIN VOUT CIN (BULK) CIN (Ceramic) COUT (BULK) COUT (MLCC) CP (pF) RC (kΩ) CC (nF) CFF (pF) P-P Deviation (mV)(1) Feedback Phase Loop Margin Bandwidth (deg) (kHz) RFB (kΩ) PWM Freq (kHz) 12V 1V 330µF 22µF x 4 None 220µFx 6 None 3.24 10 68 55 80 45 90.9 500 12V 1.2V 330µF 22µF x 4 None 220µFx 5 None 2.55 10 68 65 79 50 60.4 500 12V 1.5V 330µF 22µF x 4 None 220µFx 4 None 2.55 10 68 70 87 53 40.2 600 12V 1.8V 330µF 22µF x 4 None 220µFx 4 None 2.55 10 68 72 98 60 30.2 600 RFB (kΩ) PWM Freq (kHz) 90.9 500 25% Load Step (0A to 12.5A, 10A/µs) Bulk + Ceramic Output Capacitor Solutions CIN (Ceramic) COUT (BULK) COUT (MLCC) CP (pF) RC (kΩ) CC (nF) CFF (pF) 47 P-P Deviation Feedback Phase Loop Margin Bandwidth (deg) (kHz) VIN VOUT CIN (BULK) 12V 1V 330µF 22µF x 4 470µFx 2 100µFx 4 None 4.52 4.7 12V 1.2V 330µF 22µF x 4 470µFx 2 100µFx 4 None 4.52 4.7 47 58 82 59 60.4 500 12V 1.5V 330µF 22µF x 4 470µFx 2 100µFx 4 None 5.11 4.7 None 64 70 46 40.2 600 12V 1.8V 330µF 22µF x 4 470µFx 2 100µFx 4 None 5.11 4.7 None 68 69 51 30.2 600 (mV)(1) 52 89 58 1. Worst case. June 9, 2021 201DSR04 29 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Layout Guidelines and Example Layout Guidelines and Example The MxL7225’s high level of integration simplifies PCB board design. However, some layout considerations are still recommended for optimal electrical and thermal performance. ■ Use large PCB copper areas for high current paths, including VIN, VOUT1 and VOUT2 and GND to minimize conduction loss and thermal stress in the PCB. ■ Use a dedicated power ground layer, placed under the module. ■ Use multiple vias to interconnect the top layer and other power layers to minimize via conduction loss and module thermal stress. ■ Cap or plate over any vias that are directly placed on the pad. ■ Use a separated SGND ground copper area for components that are connected to the signal pins. The SGND to GND should be connected underneath the module. ■ Place high frequency ceramic input and output capacitors next to the VIN, VOUT and PGND pins to minimize high frequency noise. ■ When paralleling modules, connect the VFB, VOUT, and COMP pins together closely with an internal layer. For soft-start mode, the TRACK pins may be tied together via a common capacitor. ■ Test points can be brought out for monitoring the signal pins. Only bring out signals for testing purposes when absolutely necessary. Keep test points as close as possible to the module, if possible, to minimize chances of noise coupling. ■ COMP1 and COMP2 are sensitive nodes. Make every effort to avoid overlapping a COMP trace with a signal that has fast edges, such as the CLKOUT, the synchronization clock, and the SW. If overlapping is unavoidable, place the COMP trace and the fast edge signal on layers that are separated by a ground plane. An example layout for the top PCB layer for the BGA package is recommended in Figure 36. BGA CIN1 CIN2 VIN M L K GND GND J H G SGND F COUT1 COUT2 E D C B A 1 2 3 4 5 VOUT1 6 7 8 9 GND CNTRL 10 11 12 VOUT2 CNTRL Figure 36: Recommended PCB Layout June 9, 2021 201DSR04 30 10 10 9 9 8 8 7 Power Loss (W) Power Loss (W) MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet 6 5 4 3 2 VIN = 12V 1 0 10 20 30 40 7 6 5 4 3 2 VIN = 12V 1 VIN = 5V 0 Layout Guidelines and Example VIN = 5V 0 50 0 10 Load Current (A) 30 40 50 Figure 38: 1.5V Output Power Loss 50 50 40 40 Load Current (A) Load Current (A) Figure 37: 0.9V Output Power Loss 30 20 10 30 20 10 0LFM 0LFM 0 0 25 35 45 55 65 75 85 95 105 25 115 35 45 55 65 75 85 95 105 115 Ambient Temperature (°C) Ambient Temperature (°C) Figure 40: 12V to 0.9V Current Derating Figure 39: 12V to 1.5V Current Derating 50 50 40 40 Load Current (A) Load Current (A) 20 Load Current (A) 30 20 10 30 20 10 0LFM 0LFM 0 0 25 35 45 55 65 75 85 95 105 115 Figure 41: 5V to 1.5V Current Derating June 9, 2021 25 35 45 55 65 75 85 95 105 115 Ambient Temperature (°C) Ambient Temperature (°C) Figure 42: 5V to 0.9V Current Derating 201DSR04 31 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Mechanical Dimensions Mechanical Dimensions 16mm x 16mm x 5.01mm BGA                    # $ % &                                                                    3: "": 3: :             -5')%: ()': &4: :     -0(: ): 8:     -1-0,0: 0 !$(--:  :       ')%: 0 !$(--:  :   :    :    %%: !'0,:   %%: )+(!(:         :   :  %%: +!0 :   %%: )1(0:    8:   )5: (0,: 0: )(00: %%:  :  %%: 7!0 : : %%: (0,: 0: (0,: :  9:   -:    .:     : :  : :    : ')%: %0(--: : +$: : 0)%,(:  )'&)(: !'(-!)(-: '!(: 0)0:%: 0 !$(--: )5: -!6:     )+%(,:!0 : 5:   %%: )-0: +$:   %%: )-0: %2:     /*: :                                             :%A05-C 7C  C )@0=075C C Figure 43: Mechanical Dimensions, BGA June 9, 2021 201DSR04 32 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Recommended Land Pattern and Stencil Recommended Land Pattern and Stencil 16mm x 16mm x 5.01mm BGA                                              '*)%=W           %(%W ###%W "(%W *%W '"%W  '"%W *%W "(%W ###%W %(%W                                                                                                                '*)%W U##RW V'T%W                                                        '*)% W                                                        %(% W         ###% W         "(%W         *%W         '"% W          '"% W         *%W         "(%W                ###% W  %(% W         '*)% W      ##RW V%(T%W                               /L>QDHBW 6I,W 87/  $+W 9@PDMDJH,W .W Figure 44: Recommended Land Pattern and Stencil, BGA June 9, 2021 201DSR04 33 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Module Pinout Module Pinout Table 9: Module Pinout Pin ID Function Pin ID Function Pin ID Function Pin ID Function Pin ID Function Pin ID Function A1 VOUT1 B1 VOUT1 C1 VOUT1 D1 GND E1 GND F1 GND A2 VOUT1 B2 VOUT1 C2 VOUT1 D2 GND E2 GND F2 GND A3 VOUT1 B3 VOUT1 C3 VOUT1 D3 GND E3 GND F3 GND A4 VOUT1 B4 VOUT1 C4 VOUT1 D4 GND E4 GND F4 MODE_PLLIN A5 VOUT1 B5 VOUT1 C5 VOUTS1 D5 VFB1 E5 TRACK1 F5 RUN1 A6 GND B6 GND C6 fSET D6 SGND E6 COMP1 F6 SGND A7 GND B7 GND C7 SGND D7 VFB2 E7 COMP2 F7 SGND A8 VOUT2 B8 VOUT2 C8 VOUTS2 D8 TRACK2 E8 DIFFP F8 DIFFOUT A9 VOUT2 B9 VOUT2 C9 VOUT2 D9 GND E9 DIFFN F9 RUN2 A10 VOUT2 B10 VOUT2 C10 VOUT2 D10 GND E10 GND F10 GND A11 VOUT2 B11 VOUT2 C11 VOUT2 D11 GND E11 GND F11 GND A12 VOUT2 B12 VOUT2 C12 VOUT2 D12 GND E12 GND F12 GND G1 GND H1 GND J1 GND K1 GND L1 GND M1 GND G2 SW1 H2 GND J2 VIN K2 VIN L2 VIN M2 VIN G3 GND H3 GND J3 VIN K3 VIN L3 VIN M3 VIN G4 PHASMD H4 GND J4 VIN K4 VIN L4 VIN M4 VIN G5 CLKOUT H5 GND J5 GND K5 GND L5 VIN M5 VIN G6 SGND H6 GND J6 TEMP K6 GND L6 VIN M6 VIN G7 SGND H7 GND J7 EXTVCC K7 GND L7 VIN M7 VIN G8 PGOOD2 H8 INTVCC J8 GND K8 GND L8 VIN M8 VIN G9 PGOOD1 H9 GND J9 VIN K9 VIN L9 VIN M9 VIN G10 GND H10 GND J10 VIN K10 VIN L10 VIN M10 VIN G11 SW2 H11 GND J11 VIN K11 VIN L11 VIN M11 VIN G12 GND H12 GND J12 GND K12 GND L12 GND M12 GND June 9, 2021 201DSR04 34 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Ordering Information Ordering Information Table 10: Ordering Information Ordering Part Number MxL7225-ABA-T MxL7225-1-ABA-T MxL7225-EVK-1 MxL7225-EVK-2 Operating Temperature Range MSL Rating Lead-Free Package Packaging Method -40°C ≤ TJ ≤ 125°C 3 Yes BGA144 16x16 Tray MxL7225 Evaluation Board, Single Device, Dual Output MxL7225 Evaluation Board, 4 Devices, Multiphase MxL7225-1-EVK-1 MxL7225-1 Evaluation Board, Single Device, Dual Output MxL7225-1-EVK-2 MxL7225-1 Evaluation Board, 4 Devices, Multiphase For most up-to-date ordering information and additional information on environmental rating, go to www.maxlinear.com/MxL7225. June 9, 2021 201DSR04 35 MxL7225 / MxL7225-1 Dual 25A or Single 50A Power Module Data Sheet Disclaimer MaxLinear, Inc. 5966 La Place Court, Suite 100 Carlsbad, CA 92008 Tel.: +1 (760) 692-0711 Fax: +1 (760) 444-8598 www.maxlinear.com The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc. MaxLinear, Inc. assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. Without limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of MaxLinear, Inc. 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MaxLinear, the MaxLinear logo, any MaxLinear trademarks (MxL, Full-Spectrum Capture, FSC, G.now, AirPHY, Puma, and AnyWAN), and the MaxLinear logo on the products sold are all property of MaxLinear, Inc. or one of MaxLinear’s subsidiaries in the U.S.A. and other countries. All rights reserved. Other company trademarks and product names appearing herein are the property of their respective owners. © 2021 MaxLinear, Inc. All rights reserved.
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