SP3220CT

® SP3220 +3.0V to +5.5V RS-232 Driver/Receiver Pair ■ Meets True RS-232 Protocol Operation From A +3.0V to +5.5V Power Supply ■ Minimum 120 Kbps Data Rate Under Full Load ■ 1µA Low-Power Shutdown With Receivers Active ■ Interoperable With RS-232 Down To +2.7V Power Source ■ Pin-Compatible With The MAX3221E Device Without The AUTO ON-LINE® Feature ■ ESD Specifications: +2kV Human Body Model DESCRIPTION The SP3220 device is an RS-232 driver/receiver solution intended for portable or hand-held applications such as notebook or palmtop computers. The SP3220 device has a highefficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump allows the SP3220 device to deliver true RS-232 performance from a single power supply ranging from +3.3V to +5.0V. The SP3220 device has a low-power shutdown mode where the driver outputs and charge pumps are disabled. During shutdown, the supply current falls to less than 1µA. VCC + 15 VCC 2 C1+ 0.1µF 4 C15 C2+ C2 + 0.1µF 6 C211 T1IN 9 R1OUT 5kΩ 1 EN GND 14 *can be returned to either VCC or GND SHDN 16 T1OUT R1IN 13 8 V+ 3 *C3 + 0.1µF C5 0.1µF C1 + SP3220 V- 7 C4 + 0.1µF LOGIC INPUTS LOGIC OUTPUTS RS-232 OUTPUTS RS-232 INPUTS Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 1 SP 32 20 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC.............................................................-0.3V to +6.0V V+ (NOTE 1)..............................................-0.3V to +7.0V V- (NOTE 1).............................................+0.3V to -7.0V V+ + |V-| (NOTE 1)...................................................+13V ICC (DC VCC or GND current)..........................+100mA Input Voltages TxIN, EN .............................................. -0.3V to +6.0V RxIN ................................................................... +15V Output Voltages TxOUT ............................................................. +15.0V RxOUT ................................................ -0.3V to +6.0V Short-Circuit Duration TxOUT ...................................................... Continuous Storage Temperature ....................... -65°C to +150°C Power Dissipation Per Package 16-pin SSOP (derate 9.69mW/oCabove+70oC) ........ 775mW 16-pin TSSOP (derate 10.5mW/oC above +70oC) ..... 840mW 16-pin Wide SOIC (derate 11.2mW/oC above+70oC) 900mW NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. SPECIFICATIONS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX. Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC. PARAMETER DC CHARACTERISTICS Supply Current Shutdown Supply Current 0.3 1.0 1.0 10 mA µA no load, TAMB = +25oC, VCC = 3.3V SHDN = GND, TAMB = +25oC, VCC = +3.3V MIN. TYP. MAX. UNITS CONDITIONS LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW Input Logic Threshold HIGH Input Leakage Current Output Leakage Current Output Voltage LOW Output Voltage HIGH DRIVER OUTPUTS Output Voltage Swing ±5.0 ±5.4 V 3kΩ load to ground at all driver outputs, TAMB = +25oC VCC = V+ = V- = 0V, TOUT = +2V VOUT = 0V VOUT = +15V VOUT = +12V,VCC= 0V to 5.5V,drivers disabled VCC-0.6 VCC-0.1 2.0 2.4 ±0.01 ±0.05 ±1.0 ±10 0.4 0.8 V V µA µA V V TxIN, EN, SHDN, Note 2 VCC = 3.3V, Note 2 VCC = 5.0V, Note 2 TxIN, EN, SHDN, TAMB = +25oC receivers disabled IOUT = 1.6mA IOUT = -1.0mA Output Resistance Output Short-Circuit Current Output Leakage Current 300 ±35 ±70 ±60 ±100 ±25 Ω mA mA µA Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 2 SPECIFICATIONS (continued) Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX. Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC. PARAMETER RECEIVER INPUTS Input Voltage Range Input Threshold LOW Input Threshold HIGH Input Hysteresis Input Resistance TIMING CHARACTERISTICS Maximum Data Rate Driver Propagation Delay Receiver Propagation Delay Receiver Output Enable Time Receiver Output Disable Time Driver Skew Receiver Skew Transition-Region Slew Rate 120 235 1.0 1.0 0.3 0.3 200 2 00 100 200 500 1000 30 kbps µs µs µs ns ns ns ns V/µs | tPHL - tPLH |, TAMB = 25oC | tPHL - tPLH | VCC = 3.3V, RL = 3KΩ, TAMB = 25oC, measurements taken from -3.0V to +3.0V or +3.0V to -3.0V RL=3kΩ, CL=1000pF, one driver switching tPHL, RL = 3KΩ, CL = 1000pF tPLH, RL = 3KΩ, CL = 1000pF tPHL, RxIN to RxOUT, CL=150pF tPLH, RxIN to RxOUT, CL=150pF 3 -15 0.6 0.8 1.2 1.5 1.5 1.8 0.3 5 7 2.4 2.4 +15 V V V V kΩ VCC=3.3V VCC=5.0V VCC=3.3V VCC=5.0V MIN. TYP. MAX. UNITS CONDITIONS NOTE 2: Driver input hysteresis is typically 250mV. Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 3 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rates, all drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C. 14 6 12 Transmitter Output Voltage [V] 4 2 0 0 -2 -4 -6 Load Capacitance [pF] 500 1000 1500 2000 Vout+ VoutSlew Rate [V/µs] 10 8 6 4 2 0 0 500 1000 1500 Load Capacitance [pF] 2000 2330 +Slew -Slew Figure 1. Transmitter Output Voltage VS. Load Capacitance for the SP3220 Figure 2. Slew Rate VS. Load Capacitance for the SP3220 50 45 40 35 Supply Current [mA] 30 25 20 15 10 5 0 0 500 1000 1500 2000 2330 Load Capacitance [pF] 118KHz 60KHz 10KHz Figure 3. Supply Current VS. Load Capacitance when Transmitting Data for the SP3220 Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 4 NAME EN C1+ V+ C1C2+ C2VR1IN R1OUT N.C. T1IN T1OUT GND VCC SHDN FUNCTION Receiver Enable Control. Drive LOW for normal operation. Drive HIGH to TriState the receiver outputs (high-Z state). Positive terminal of the voltage doubler charge-pump capacitor. +5.5V generated by the charge pump. Negative terminal of the voltage doubler charge-pump capacitor. Positive terminal of the inverting charge-pump capacitor. Negative terminal of the inverting charge-pump capacitor. -5.5V generated by the charge pump. RS-232 receiver input. TTL/CMOS reciever output. No Connect. TTL/CMOS driver input. RS-232 driver output. Ground. +3.0V to +5.5V supply voltage Shutdown Control Input. Drive HIGH for normal device operation. Drive LOW to shutdown the drivers (high-Z output) and the on-board charge pump power supply. PIN NUMBER 1 2 3 4 5 6 7 8 9 10, 12 11 13 14 15 16 Table 1. Device Pin Description Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 5 EN 1 16 SHDN 15 VCC 14 GND SP3220 13 T1OUT 12 No Connect 11 T1IN 10 9 No Connect R1OUT C1+ 2 V+ C13 4 C2+ 5 C2VR1IN 6 7 8 Figure 4. Pinout Configurations for the SP3220 Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 6 VCC + 15 VCC 2 C1+ 0.1µF 4 C15 C2+ C2 + 0.1µF 6 C211 T1IN 9 R1OUT 5kΩ 1 EN GND 14 *can be returned to either VCC or GND SHDN 16 T1OUT R1IN 13 8 V+ 3 *C3 + 0.1µF C5 0.1µF C1 + SP3220 V- 7 C4 + 0.1µF LOGIC INPUTS LOGIC OUTPUTS RS-232 OUTPUTS RS-232 INPUTS Figure 5. SP3220 Typical Operating Circuits Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 7 DESCRIPTION The SP3220 device meets the EIA/TIA-232 and V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. The SP3220 device features Sipex's proprietary on-board charge pump circuitry that generates 2 x VCC for RS-232 voltage levels from a single +3.0V to +5.5V power supply. This series is ideal for +3.3V-only systems, mixed +3.0V to +5.5V systems, or +5.0V-only systems that require true RS-232 performance. The SP3220 device has a driver that operates at a typical data rate of 235Kbps fully loaded. The SP3220 is a 1-driver/1-receiver device ideal for portable or hand-held applications. The SP3220 features a 1µA shutdown mode that reduces power consumption and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1µA supply current. THEORY OF OPERATION The SP3220 device is made up of three basic circuit blocks: 1. Drivers, 2. Receivers, and 3. the Sipex proprietary charge pump. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to +5.0V EIA/TIA-232 levels inverted relative to the input logic levels. Typically, the RS-232 output voltage swing is +5.5V with no load and at least +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. Driver outputs will meet EIA/TIA-562 levels of +3.7V with supply voltages as low as 2.7V. The drivers typically can operate at a data rate of 235Kbps. The drivers can guarantee a data rate of 120Kbps fully loaded with 3KΩ in parallel with 1000pF, ensuring compatibility with PC-to-PC communication software. Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation The slew rate of the driver output is internally limited to a maximum of 30V/µs in order to meet the EIA standards (EIA RS-232D 2.1.7, Paragraph 5). The transition of the loaded output from HIGH to LOW also meets the monotonicity requirements of the standard. The SP3220 driver can maintain high data rates up to 235Kbps fully loaded. Figure 6 shows a loopback test circuit used to test the RS-232 driver. Figure 7 shows the test results of the loopback circuit with the driver active at 120Kbps with an RS-232 load in parallel with a 1000pF capacitor. Figure 8 shows the test results where the driver was active at 235Kbps and loaded with an RS-232 receiver in parallel with a 1000pF capacitor. A solid RS-232 data transmission rate of 120Kbps provides compatibility with many designs in personal computer peripherals and LAN applications. The SP3220 driver's output stage is turned off (high-Z) when the device is in shutdown mode. When the power is off, the SP3220 device permits the outputs to be driven up to +12V. The driver's input does not have pull-up resistors. Designers should connect an unused input to VCC or GND. In the shutdown mode, the supply current falls to less than 1µA, where SHDN = LOW. When the SP3220 device is shut down, the device's driver output is disabled (high-Z) and the charge pump is turned off with V+ pulled down to VCC and V- pulled to GND. The time required to exit shutdown is typically 100µs. Connect SHDN to VCC if the shutdown mode is not used. SHDN has no effect on RxOUT. Note that the driver is enabled only when the magnitude of V- exceeds approximately 3V. 8 VCC + C5 0.1µF C1+ 0.1µF C1C2+ 0.1µF C2- VCC V+ C3 + 0.1µF C1 + SP3220 C2 + VC4 + 0.1µF LOGIC INPUTS LOGIC OUTPUTS TxIN TxOUT RxOUT 5kΩ EN GND RxIN *SHDN VCC 1000pF Figure 6. SP3220 Driver Loopback Test Circuit [ T ] [ T ] T1 IN 1 T T1 IN 1 T T1 OUT 2 T T R1 OUT 3 Ch1 5.00V Ch3 5.00V Ch2 5.00V M 5.00µs Ch1 0V T1 OUT 2 T T R1 OUT 3 Ch1 5.00V Ch3 5.00V Ch2 5.00V M 2.50µs Ch1 0V Figure 7. Driver Loopback Test Results at 120kbps Figure 8. Driver Loopback Test Results at 235kbps Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 9 Receivers The receiver converts EIA/TIA-232 levels to TTL or CMOS logic output levels. The receiver has an inverting high-impedance output. This receiver output (RxOUT) is at high-impedance when the enable control EN = HIGH. In the shutdown mode, the receiver can be active or inactive. EN has no effect on TxOUT. The truth table logic of the SP3220 driver and receiver outputs can be found in Table 2. Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, a 5kΩ pulldown resistor to ground will commit the output of the receiver to a HIGH state. Charge Pump The charge pump is a Sipex–patented design (U.S. 5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (VCC) over the +3.0V to +5.5V range. In most circumstances, decoupling the power supply can be achieved adequately using a 0.1µF bypass capacitor at C5 (refer to Figures 5). In applications that are sensitive to powersupply noise, decouple VCC to ground with a capacitor of the same value as charge-pump capacitor C1. Physically connect bypass capacitors as close to the IC as possible. The charge pumps operate in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pumps are enabled. If the output voltage exceed a magnitude of 5.5V, the charge pumps are disabled. This oscillator controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 — VSS charge storage — During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1– is transferred to C2–. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. Phase 2 — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C 3. This generated voltage is regulated to a minimum voltage of -5.5V. Simultaneous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC. SHDN 0 0 1 1 EN 0 1 0 1 TxOUT Tri-state Tri-state Active Active RxOUT Active Tri-state Active Tri-state Table 2. Truth Table Logic for Shutdown and Enable Control Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 10 Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. Since both V+ and V– are separately generated from VCC; in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 250kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. ESD Tolerance The SP3220 device incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 14. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5kΩ and 100pF, respectively. VCC = +5V +5V C1 + – C4 + – + C2 + – – VDD Storage Capacitor VSS Storage Capacitor –5V –5V C3 Figure 9. Charge Pump — Phase 1 VCC = +5V C4 + – + C1 + – C2 + – – VDD Storage Capacitor VSS Storage Capacitor –10V C3 Figure 10. Charge Pump — Phase 2 Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 11 [ +6V a) C2+ T ] GND 1 GND 2 b) C2- T -6V T Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V Figure 11. Charge Pump Waveforms VCC = +5V +5V C1 + – C4 + – + C2 + – – VDD Storage Capacitor VSS Storage Capacitor –5V –5V C3 Figure 12. Charge Pump — Phase 3 VCC = +5V +10V C1 + – C4 + – + C2 + – – VDD Storage Capacitor VSS Storage Capacitor C3 Figure 13. Charge Pump — Phase 4 RC RC SW1 SW1 DC Power Source RS RS SW2 SW2 CS CS Device Under Test Figure 14. ESD Test Circuit for Human Body Model Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 12 PACKAGE: PLASTIC SHRINK SMALL OUTLINE (SSOP) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H L Ø 16–PIN 0.068/0.078 (1.73/1.99) 0.002/0.008 (0.05/0.21) 0.010/0.015 (0.25/0.38) 0.239/0.249 (6.07/6.33) 0.205/0.212 (5.20/5.38) 0.0256 BSC (0.65 BSC) 0.301/0.311 (7.65/7.90) 0.022/0.037 (0.55/0.95) 0°/8° (0°/8°) 20–PIN 0.068/0.078 (1.73/1.99) 0.002/0.008 (0.05/0.21) 0.010/0.015 (0.25/0.38) 0.278/0.289 (7.07/7.33) 0.205/0.212 (5.20/5.38) 0.0256 BSC (0.65 BSC) 0.301/0.311 (7.65/7.90) 0.022/0.037 (0.55/0.95) 0°/8° (0°/8°) 24–PIN 0.068/0.078 (1.73/1.99) 0.002/0.008 (0.05/0.21) 0.010/0.015 (0.25/0.38) 0.317/0.328 (8.07/8.33) 0.205/0.212 (5.20/5.38) 0.0256 BSC (0.65 BSC) 0.301/0.311 (7.65/7.90) 0.022/0.037 (0.55/0.95) 0°/8° (0°/8°) 28–PIN 0.068/0.078 (1.73/1.99) 0.002/0.008 (0.05/0.21) 0.010/0.015 (0.25/0.38) 0.397/0.407 (10.07/10.33) 0.205/0.212 (5.20/5.38) 0.0256 BSC (0.65 BSC) 0.301/0.311 (7.65/7.90) 0.022/0.037 (0.55/0.95) 0°/8° (0°/8°) Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 13 PACKAGE: PLASTIC SMALL OUTLINE (SOIC) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H L Ø 16–PIN 0.090/0.104 (2.29/2.649) 0.004/0.012 (0.102/0.300) 0.013/0.020 (0.330/0.508) 0.398/0.413 (10.10/10.49) 0.291/0.299 (7.402/7.600) 0.050 BSC (1.270 BSC) 0.394/0.419 (10.00/10.64) 0.016/0.050 (0.406/1.270) 0°/8° (0°/8°) 18–PIN 0.090/0.104 (2.29/2.649)) 0.004/0.012 (0.102/0.300) 0.013/0.020 (0.330/0.508) 0.447/0.463 (11.35/11.74) 0.291/0.299 (7.402/7.600) 0.050 BSC (1.270 BSC) 0.394/0.419 (10.00/10.64) 0.016/0.050 (0.406/1.270) 0°/8° (0°/8°) Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 14 PACKAGE: PLASTIC THIN SMALL OUTLINE (TSSOP) E2 E D A Ø e B A1 L DIMENSIONS in inches (mm) Minimum/Maximum A A1 B D E e E2 L Ø 16–PIN - /0.043 (- /1.10) 0.002/0.006 (0.05/0.15) 0.007/0.012 (0.19/0.30) 0.193/0.201 (4.90/5.10) 0.169/0.177 (4.30/4.50) 0.026 BSC (0.65 BSC) 0.126 BSC (3.20 BSC) 0.020/0.030 (0.50/0.75) 0°/8° 20–PIN - /0.043 (- /1.10) 0.002/0.006 (0.05/0.15) 0.007/0.012 (0.19/0.30) 0.252/0.260 (6.40/6.60) 0.169/0.177 (4.30/4.50) 0.026 BSC (0.65 BSC) 0.126 BSC (3.20 BSC) 0.020/0.030 (0.50/0.75) 0°/8° Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 15 ORDERING INFORMATION Model Temperature Range Package Type SP3220CA ............................................... 0˚C to +70˚C .......................................... 16-Pin SSOP SP3220CT ................................................ 0˚C to +70˚C .................................. 16-Pin Wide SOIC SP3220CY ............................................... 0˚C to +70˚C ........................................ 16-Pin TSSOP SP3220EA .............................................. -40˚C to +85˚C ........................................ 16-Pin SSOP SP3220ET ............................................... -40˚C to +85˚C ................................ 16-Pin Wide SOIC SP3220EY .............................................. -40˚C to +85˚C ...................................... 16-Pin TSSOP Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. Rev. 6/25/03 SP3220 True +3.0 to +5.0V RS-232 Transceivers © Copyright 2003 Sipex Corporation 16